1.\" Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd September 14, 2010 28.Dt HPET 4 29.Os 30.Sh NAME 31.Nm hpet 32.Nd High Precision Event Timer driver 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device acpi" 39.Ed 40.Pp 41The following tunables are settable from the 42.Xr loader 8 : 43.Bl -ohang 44.It Va hint.hpet. Ns Ar X Ns Va .allowed_irqs 45is a 32bit mask. 46Each set bit allows driver to use respective IRQ, 47if BIOS also set respective capability bit in comparator's configuration 48register. 49Default value is 0xffff0000, except some known broken hardware. 50.It Va hint.hpet. Ns Ar X Ns Va .clock 51controls event timers functionality support. 52Setting to 0, disables it. 53Default value is 1. 54.It Va hint.hpet. Ns Ar X Ns Va .legacy_route 55controls "LegacyReplacement Route" mode. 56If enabled, HPET will steal IRQ0 of i8254 timer and IRQ8 of RTC. 57Before using it, make sure that respective 58drivers are not using interrupts, by setting also: 59.Bd -literal 60hint.attimer.0.clock=0 61hint.atrtc.0.clock=0 62.Ed 63Default value is 0. 64.It Va hint.hpet. Ns Ar X Ns Va .per_cpu 65controls how much per-CPU event timers should driver attempt to register. 66This functionality requires every comparator in a group to have own unshared 67IRQ, so it depends on hardware capabilities and interrupts configuration. 68Default value is 1. 69.El 70.Sh DESCRIPTION 71This driver uses High Precision Event Timer hardware (part of the chipset, 72usually enumerated via ACPI) to supply kernel with one time counter and 73several (usually from 3 to 8) event timers. 74This hardware includes single main counter with known increment frequency 75(10MHz or more), and several programmable comparators (optionally with 76automatic reload feature). 77When value of the main counter matches current value of any comparator, 78interrupt can be generated. 79Depending on hardware capabilities and configuration, interrupt can be 80delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31, 81or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called 82"LegacyReplacement Route" HPET can steal IRQ0 of i8254 and IRQ8 of the RTC. 83Interrupt can be either edge- or level-triggered. 84In last case they could be safely shared with PCI IRQs. 85Driver prefers to use FSB interrupts, if supported, to avoid sharing. 86If it is not possible, it uses single sharable IRQ from PCI range. 87Other modes (LegacyReplacement and ISA IRQs) require special care to setup, 88but could be configured manually via device hints. 89.Pp 90Event timers provided by the driver support both one-shot an periodic modes 91and irrelevant to CPU power states. 92.Pp 93Depending on hardware capabilities and configuration, driver can expose each 94comparator as separate event timer or group them into one or several per-CPU 95event timers. 96In last case interrupt of every of those comparators within 97group is bound to specific CPU core. 98This is possible only when each of these comparators has own unsharable IRQ. 99.Sh SEE ALSO 100.Xr acpi 4 , 101.Xr apic 4 , 102.Xr atrtc 4 , 103.Xr attimer 4 , 104.Xr eventtimers 4 , 105.Xr timecounters 4 106.Sh HISTORY 107The 108.Nm 109driver first appeared in 110.Fx 6.3 . 111Support for event timers was added in 112.Fx 9.0 . 113