1.\" Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 3. The name of the author may not be used to endorse or promote products 13.\" derived from this software without specific prior written permission. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25.\" 26.\" $FreeBSD$ 27.\" 28.Dd September 14, 2010 29.Dt HPET 4 30.Os 31.Sh NAME 32.Nm hpet 33.Nd High Precision Event Timer driver 34.Sh SYNOPSIS 35To compile this driver into the kernel, 36place the following lines in your 37kernel configuration file: 38.Bd -ragged -offset indent 39.Cd "device acpi" 40.Ed 41.Pp 42The following tunables are settable from the 43.Xr loader 8 : 44.Bl -ohang 45.It Va hint.hpet. Ns Ar X Ns Va .allowed_irqs 46is a 32bit mask. Each set bit allows driver to use respective IRQ, 47if BIOS also set respective capability bit in comparator's configuration 48register. 49Default value is 0xffff0000, except some known broken hardware. 50.It Va hint.hpet. Ns Ar X Ns Va .clock 51controls event timers functionality support. Setting to 0, disables it. 52Default value is 1. 53.It Va hint.hpet. Ns Ar X Ns Va .legacy_route 54controls "LegacyReplacement Route" mode. If enabled, HPET will steal IRQ0 of 55i8254 timer and IRQ8 of RTC. Before using it, make sure that respective 56drivers are not using interrupts, by setting also: 57.Bd -literal 58hint.attimer.0.clock=0 59hint.atrtc.0.clock=0 60.Ed 61Default value is 0. 62.It Va hint.hpet. Ns Ar X Ns Va .per_cpu 63controls how much per-CPU event timers should driver attempt to register. 64This functionality requires every comparator in a group to have own unshared 65IRQ, so it depends on hardware capabilities and interrupts configuration. 66Default value is 1. 67.El 68.Sh DESCRIPTION 69This driver uses High Precision Event Timer hardware (part of the chipset, 70usually enumerated via ACPI) to supply kernel with one time counter and 71several (usually from 3 to 8) event timers. 72This hardware includes single main counter with known increment frequency 73(10MHz or more), and several programable comparators (optionally with 74automatic reload feature). 75When value of the main counter matches current value of any comparator, 76interrupt can be generated. 77Depending on hardware capabilities and configuration, interrupt can be 78delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31, 79or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called 80"LegacyReplacement Route" HPET can speal IRQ0 of i8254 and IRQ8 of the RTC. 81Interrupt can be either edge- or level-triggered. In last case they could be 82safely shared with PCI IRQs. 83Driver prefers to use FSB interrupts, if supported, to avoid sharing. 84If it is not possible, it uses single sharable IRQ from PCI range. 85Other modes (LegacyReplacement and ISA IRQs) require special care to setup, 86but could be configured manually via device hints. 87.Pp 88Event timers provided by the driver support both one-shot an periodic modes 89and irrelevant to CPU power states. 90.Pp 91Depending on hardware capabilities and configuration, driver can expose each 92comparator as separate event timer or group them into one or several per-CPU 93event timers. In last case interrupt of every of those comparators within 94group is bound to specific CPU core. This is possible only when each 95of these comparators has own unsharable IRQ. 96.Sh SEE ALSO 97.Xr acpi 4 , 98.Xr eventtimers 7 99.Sh HISTORY 100The 101.Nm 102driver first appeared in 103.Fx 6.3 . 104Support for event timers was added in 105.Fx 9.0 . 106