xref: /freebsd/share/man/man4/gpioiic.4 (revision 8ce07fe72eb5ca0925f192cb74ff8097a81f68c2)
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25*8ce07fe7SLuiz Otavio O Souza.\" $FreeBSD$
26*8ce07fe7SLuiz Otavio O Souza.\"
27*8ce07fe7SLuiz Otavio O Souza.Dd November 5, 2013
28*8ce07fe7SLuiz Otavio O Souza.Dt GPIOIIC 4
29*8ce07fe7SLuiz Otavio O Souza.Os
30*8ce07fe7SLuiz Otavio O Souza.Sh NAME
31*8ce07fe7SLuiz Otavio O Souza.Nm gpioiic
32*8ce07fe7SLuiz Otavio O Souza.Nd GPIO I2C bit-banging device driver
33*8ce07fe7SLuiz Otavio O Souza.Sh SYNOPSIS
34*8ce07fe7SLuiz Otavio O Souza.Cd "device gpio"
35*8ce07fe7SLuiz Otavio O Souza.Cd "device gpioiic"
36*8ce07fe7SLuiz Otavio O Souza.Cd "device iic"
37*8ce07fe7SLuiz Otavio O Souza.Cd "device iicbb"
38*8ce07fe7SLuiz Otavio O Souza.Cd "device iicbus"
39*8ce07fe7SLuiz Otavio O Souza.Sh DESCRIPTION
40*8ce07fe7SLuiz Otavio O SouzaThe
41*8ce07fe7SLuiz Otavio O Souza.Em gpioiic
42*8ce07fe7SLuiz Otavio O Souzadriver provides an IIC bit-banging interface using two GPIO pins for the
43*8ce07fe7SLuiz Otavio O SouzaSCL and SDA on the
44*8ce07fe7SLuiz Otavio O Souza.Em gpiobus .
45*8ce07fe7SLuiz Otavio O Souza.Nm
46*8ce07fe7SLuiz Otavio O Souzaimplements an open colector kind of output, as recommended by the standard,
47*8ce07fe7SLuiz Otavio O Souzawhen driving the pins on the
48*8ce07fe7SLuiz Otavio O Souza.Em gpiobus ,
49*8ce07fe7SLuiz Otavio O Souzai.e, they are never switched to the logical value of '1',
50*8ce07fe7SLuiz Otavio O Souzaor they are '0' or simply open (Hi-Z/tri-state).
51*8ce07fe7SLuiz Otavio O SouzaSo the pullup resistors are required so
52*8ce07fe7SLuiz Otavio O Souza.Nm
53*8ce07fe7SLuiz Otavio O Souzacan work.
54*8ce07fe7SLuiz Otavio O Souza.Pp
55*8ce07fe7SLuiz Otavio O SouzaOn a hint based system, like
56*8ce07fe7SLuiz Otavio O Souza.Li MIPS , these values are configureable for the
57*8ce07fe7SLuiz Otavio O Souza.Nm gpioiic :
58*8ce07fe7SLuiz Otavio O Souza.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
59*8ce07fe7SLuiz Otavio O Souza.It Va hint.gpioiic.%d.at
60*8ce07fe7SLuiz Otavio O SouzaThe gpiobus you are attaching to.
61*8ce07fe7SLuiz Otavio O SouzaNormally just gpiobus0.
62*8ce07fe7SLuiz Otavio O Souza.It Va hint.gpioiic.%d.pins
63*8ce07fe7SLuiz Otavio O SouzaThis is a bitmask of the pins on the
64*8ce07fe7SLuiz Otavio O Souza.Em gpiobus
65*8ce07fe7SLuiz Otavio O Souzathat are to be used for SCLOCK and SDATA from the GPIO IIC
66*8ce07fe7SLuiz Otavio O Souzabit-banging bus.
67*8ce07fe7SLuiz Otavio O SouzaTo configure pin 0 and 7, use the bitmask of
68*8ce07fe7SLuiz Otavio O Souza10000001 and convert it to a hexadecimal value of 0x0081.
69*8ce07fe7SLuiz Otavio O SouzaPlease note that this mask should only ever have two bits set
70*8ce07fe7SLuiz Otavio O Souza(any others bits - i.e., pins - will be ignored).
71*8ce07fe7SLuiz Otavio O Souza.It Va hint.gpioiic.%d.scl
72*8ce07fe7SLuiz Otavio O SouzaIndicates which bit in the
73*8ce07fe7SLuiz Otavio O Souza.Va hint.gpioiic.%d.pins
74*8ce07fe7SLuiz Otavio O Souzashould be used as the SCLOCK
75*8ce07fe7SLuiz Otavio O Souzasource.
76*8ce07fe7SLuiz Otavio O Souza.It Va hint.gpioiic.%d.sda
77*8ce07fe7SLuiz Otavio O SouzaIndicates which bit in the
78*8ce07fe7SLuiz Otavio O Souza.Va hint.gpioiic.%d.pins
79*8ce07fe7SLuiz Otavio O Souzashould be used as the SDATA
80*8ce07fe7SLuiz Otavio O Souzasource.
81*8ce07fe7SLuiz Otavio O Souza.El
82*8ce07fe7SLuiz Otavio O Souza.Sh SEE ALSO
83*8ce07fe7SLuiz Otavio O Souza.Xr gpio 4 ,
84*8ce07fe7SLuiz Otavio O Souza.Xr gpioled 4 ,
85*8ce07fe7SLuiz Otavio O Souza.Xr iic 4 ,
86*8ce07fe7SLuiz Otavio O Souza.Xr iicbb 4 ,
87*8ce07fe7SLuiz Otavio O Souza.Xr iicbus 4
88*8ce07fe7SLuiz Otavio O Souza.Sh HISTORY
89*8ce07fe7SLuiz Otavio O SouzaThe
90*8ce07fe7SLuiz Otavio O Souza.Nm
91*8ce07fe7SLuiz Otavio O Souzamanual page first appeared in
92*8ce07fe7SLuiz Otavio O Souza.Fx 11.0 .
93*8ce07fe7SLuiz Otavio O Souza.Sh AUTHORS
94*8ce07fe7SLuiz Otavio O SouzaThis
95*8ce07fe7SLuiz Otavio O Souzamanual page was written by
96*8ce07fe7SLuiz Otavio O Souza.An Luiz Otavio O Souza .
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