1.\" Copyright (c) 2013, Sean Bruno <sbruno@freebsd.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd June 26, 2019 28.Dt GPIO 4 29.Os 30.Sh NAME 31.Nm gpiobus 32.Nd GPIO bus system 33.Sh SYNOPSIS 34To compile these devices into your kernel and use the device hints, place the 35following lines in your kernel configuration file: 36.Bd -ragged -offset indent 37.Cd "device gpio" 38.Cd "device gpioc" 39.Cd "device gpioiic" 40.Cd "device gpioled" 41.Ed 42.Pp 43Additional device entries for the 44.Li ARM 45architecture include: 46.Bd -ragged -offset indent 47.Cd "device a10_gpio" 48.Cd "device bcm_gpio" 49.Cd "device imx51_gpio" 50.Cd "device lpcgpio" 51.Cd "device mv_gpio" 52.Cd "device ti_gpio" 53.Cd "device gpio_avila" 54.Cd "device gpio_cambria" 55.Cd "device zy7_gpio" 56.Cd "device pxagpio" 57.Ed 58.Pp 59Additional device entries for the 60.Li MIPS 61architecture include: 62.Bd -ragged -offset indent 63.Cd "device ar71xxx_gpio" 64.Cd "device octeon_gpio" 65.Cd "device rt305_gpio" 66.Ed 67.Pp 68Additional device entries for the 69.Li POWERPC 70architecture include: 71.Bd -ragged -offset indent 72.Cd "device wiigpio" 73.Cd "device macgpio" 74.Ed 75.Sh DESCRIPTION 76The 77.Nm 78system provides a simple interface to the GPIO pins that are usually 79available on embedded architectures and can provide bit banging style 80devices to the system. 81.Pp 82The acronym 83.Li GPIO 84means 85.Dq General-Purpose Input/Output. 86.Pp 87The BUS physically consists of multiple pins that can be configured 88for input/output, IRQ delivery, SDA/SCL 89.Em iicbus 90use, etc. 91.Pp 92On some embedded architectures (like MIPS), discovery of the bus and 93configuration of the pins is done via 94.Xr device.hints 5 95in the platform's kernel 96.Xr config 5 97file. 98.Pp 99On some others (like ARM), where 100.Xr FDT 4 101is used to describe the device tree, the bus discovery is done via the DTS 102passed to the kernel, being either statically compiled in, or by a variety 103of ways where the boot loader (or Open Firmware enabled system) passes the 104DTS blob to the kernel at boot. 105.Pp 106On a 107.Xr device.hints 5 108based system these hints can be used to configure drivers for devices 109attached to 110.Nm 111pins: 112.Bl -tag -width ".Va hint.driver.unit.pins" 113.It Va hint.driver.unit.at 114The 115.Nm gpiobus 116where the device is attached. 117For example, 118.Qq gpiobus0 . 119.Ar driver 120and 121.Ar unit 122are the driver name and the unit number for the device driver. 123.It Va hint.driver.unit.pins 124This is a bitmask of the pins on the 125.Nm gpiobus 126that are connected to the device. 127The pins will be allocated to the specified driver instance. 128.El 129.Pp 130The following 131.Xr device.hints 5 132are only provided by the 133.Cd ar71xx_gpio 134driver: 135.Bl -tag -width ".Va hint.gpio.function_clear" 136.It Va hint.gpio.%d.pinmask 137This is a bitmask of pins on the GPIO board that we would like to expose 138for use to the host operating system. 139To expose pin 0, 4 and 7, use the bitmask of 14010010001 converted to the hexadecimal value 0x0091. 141.It Va hint.gpio.%d.pinon 142This is a bitmask of pins on the GPIO board that will be set to ON at host 143start. 144To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of 14510000000010010 converted to the hexadecimal value 0x2012. 146.It Va hint.gpio.function_set 147.It Va hint.gpio.function_clear 148These are bitmasks of pins that will remap a pin to handle a specific 149function (USB, UART TX/RX, etc) in the Atheros function registers. 150This is mainly used to set/clear functions that we need when they are set up or 151not set up by uBoot. 152.El 153.Pp 154Simply put, each pin of the GPIO interface is connected to an input/output 155of some device in a system. 156.Sh SEE ALSO 157.Xr gpioiic 4 , 158.Xr gpioled 4 , 159.Xr iicbus 4 , 160.Xr device.hints 5 , 161.Xr gpioctl 8 162.Sh HISTORY 163The 164.Nm 165manual page first appeared in 166.Fx 10.0 . 167.Sh AUTHORS 168This 169manual page was written by 170.An Sean Bruno Aq Mt sbruno@FreeBSD.org . 171