1.\" Copyright (c) 2013, Sean Bruno <sbruno@freebsd.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.\" $FreeBSD$ 26.\" 27.Dd June 27, 2019 28.Dt GPIO 4 29.Os 30.Sh NAME 31.Nm gpiobus 32.Nd GPIO bus system 33.Sh SYNOPSIS 34To compile these devices into your kernel and use the device hints, place the 35following lines in your kernel configuration file: 36.Bd -ragged -offset indent 37.Cd "device gpio" 38.Cd "device gpioc" 39.Cd "device gpioiic" 40.Cd "device gpioled" 41.Ed 42.Pp 43Additional device entries for the 44.Li ARM 45architecture include: 46.Bd -ragged -offset indent 47.Cd "device a10_gpio" 48.Cd "device bcm_gpio" 49.Cd "device imx51_gpio" 50.Cd "device lpcgpio" 51.Cd "device mv_gpio" 52.Cd "device ti_gpio" 53.Cd "device gpio_avila" 54.Cd "device gpio_cambria" 55.Cd "device zy7_gpio" 56.Cd "device pxagpio" 57.Ed 58.Pp 59Additional device entries for the 60.Li MIPS 61architecture include: 62.Bd -ragged -offset indent 63.Cd "device ar71xxx_gpio" 64.Cd "device octeon_gpio" 65.Cd "device rt305_gpio" 66.Ed 67.Pp 68Additional device entries for the 69.Li POWERPC 70architecture include: 71.Bd -ragged -offset indent 72.Cd "device wiigpio" 73.Cd "device macgpio" 74.Ed 75.Pp 76Additional device entries for the 77.Li RISC-V 78architecture include: 79.Bd -ragged -offset indent 80.Cd "device sifive_gpio" 81.Ed 82.Sh DESCRIPTION 83The 84.Nm 85system provides a simple interface to the GPIO pins that are usually 86available on embedded architectures and can provide bit banging style 87devices to the system. 88.Pp 89The acronym 90.Li GPIO 91means 92.Dq General-Purpose Input/Output. 93.Pp 94The BUS physically consists of multiple pins that can be configured 95for input/output, IRQ delivery, SDA/SCL 96.Em iicbus 97use, etc. 98.Pp 99On some embedded architectures (like MIPS), discovery of the bus and 100configuration of the pins is done via 101.Xr device.hints 5 102in the platform's kernel 103.Xr config 5 104file. 105.Pp 106On some others (like ARM), where 107.Xr FDT 4 108is used to describe the device tree, the bus discovery is done via the DTS 109passed to the kernel, being either statically compiled in, or by a variety 110of ways where the boot loader (or Open Firmware enabled system) passes the 111DTS blob to the kernel at boot. 112.Pp 113On a 114.Xr device.hints 5 115based system these hints can be used to configure drivers for devices 116attached to 117.Nm 118pins: 119.Bl -tag -width ".Va hint.driver.unit.pin_list" 120.It Va hint.driver.unit.at 121The 122.Nm gpiobus 123where the device is attached. 124For example, 125.Qq gpiobus0 . 126.Ar driver 127and 128.Ar unit 129are the driver name and the unit number for the device driver. 130.It Va hint.driver.unit.pins 131This is a bitmask of the pins on the 132.Nm gpiobus 133that are connected to the device. 134The pins will be allocated to the specified driver instance. 135Only pins with numbers from 0 to 31 can be specified using this hint. 136.It Va hint.driver.unit.pin_list 137This is a list of pin numbers of pins on the 138.Nm gpiobus 139that are connected to the device. 140The pins will be allocated to the specified driver instance. 141This is a more user friendly alternative to the 142.Ar pins 143hint. 144Additionally, this hint allows specifying pin numbers greater than 31. 145The numbers can be decimal or hexadecimal with 0x prefix. 146Any non-digit character can be used as a separator. 147For example, it can be a comma, a slash or a space. 148The separator can be followed by any number of space characters. 149.El 150.Pp 151The following 152.Xr device.hints 5 153are only provided by the 154.Cd ar71xx_gpio 155driver: 156.Bl -tag -width ".Va hint.gpio.function_clear" 157.It Va hint.gpio.%d.pinmask 158This is a bitmask of pins on the GPIO board that we would like to expose 159for use to the host operating system. 160To expose pin 0, 4 and 7, use the bitmask of 16110010001 converted to the hexadecimal value 0x0091. 162.It Va hint.gpio.%d.pinon 163This is a bitmask of pins on the GPIO board that will be set to ON at host 164start. 165To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of 16610000000010010 converted to the hexadecimal value 0x2012. 167.It Va hint.gpio.function_set 168.It Va hint.gpio.function_clear 169These are bitmasks of pins that will remap a pin to handle a specific 170function (USB, UART TX/RX, etc) in the Atheros function registers. 171This is mainly used to set/clear functions that we need when they are set up or 172not set up by uBoot. 173.El 174.Pp 175Simply put, each pin of the GPIO interface is connected to an input/output 176of some device in a system. 177.Sh SEE ALSO 178.Xr gpioiic 4 , 179.Xr gpioled 4 , 180.Xr iicbus 4 , 181.Xr device.hints 5 , 182.Xr gpioctl 8 183.Sh HISTORY 184The 185.Nm 186manual page first appeared in 187.Fx 10.0 . 188.Sh AUTHORS 189This 190manual page was written by 191.An Sean Bruno Aq Mt sbruno@FreeBSD.org . 192