1a1c11a0aSOleksandr Tymoshenko.\" Copyright (c) 2018 Oleksandr Tymoshenko 2a1c11a0aSOleksandr Tymoshenko.\" All rights reserved. 3a1c11a0aSOleksandr Tymoshenko.\" 4a1c11a0aSOleksandr Tymoshenko.\" Redistribution and use in source and binary forms, with or without 5a1c11a0aSOleksandr Tymoshenko.\" modification, are permitted provided that the following conditions 6a1c11a0aSOleksandr Tymoshenko.\" are met: 7a1c11a0aSOleksandr Tymoshenko.\" 1. Redistributions of source code must retain the above copyright 8a1c11a0aSOleksandr Tymoshenko.\" notice, this list of conditions and the following disclaimer. 9a1c11a0aSOleksandr Tymoshenko.\" 2. Redistributions in binary form must reproduce the above copyright 10a1c11a0aSOleksandr Tymoshenko.\" notice, this list of conditions and the following disclaimer in the 11a1c11a0aSOleksandr Tymoshenko.\" documentation and/or other materials provided with the distribution. 12a1c11a0aSOleksandr Tymoshenko.\" 13a1c11a0aSOleksandr Tymoshenko.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 14a1c11a0aSOleksandr Tymoshenko.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15a1c11a0aSOleksandr Tymoshenko.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16a1c11a0aSOleksandr Tymoshenko.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 17a1c11a0aSOleksandr Tymoshenko.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18a1c11a0aSOleksandr Tymoshenko.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19a1c11a0aSOleksandr Tymoshenko.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20a1c11a0aSOleksandr Tymoshenko.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21a1c11a0aSOleksandr Tymoshenko.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22a1c11a0aSOleksandr Tymoshenko.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23a1c11a0aSOleksandr Tymoshenko.\" SUCH DAMAGE. 24a1c11a0aSOleksandr Tymoshenko.\" 25*19758005SIan Lepore.Dd March 3, 2018 26a1c11a0aSOleksandr Tymoshenko.Dt "FDT_PINCTRL" 4 27a1c11a0aSOleksandr Tymoshenko.Os 28a1c11a0aSOleksandr Tymoshenko.Sh NAME 29a1c11a0aSOleksandr Tymoshenko.Nm fdt_pinctrl 30a1c11a0aSOleksandr Tymoshenko.Nd FDT I/O pin multiplexing support 31a1c11a0aSOleksandr Tymoshenko.Sh SYNOPSIS 32a1c11a0aSOleksandr Tymoshenko.Cd "device fdt_pinctrl" 33a1c11a0aSOleksandr Tymoshenko.Sh DESCRIPTION 34a1c11a0aSOleksandr TymoshenkoPin multiplexing is a technology used to re-purpose a single 35a1c11a0aSOleksandr Tymoshenkophysical connection (depending on chip packaging it may be 36*19758005SIan Leporepin, ball, or pad) by routing its signal to any one of several 37*19758005SIan Leporedifferent SoC internal devices. 38a1c11a0aSOleksandr TymoshenkoFor example, based on the actual device design, a single SoC chip 39*19758005SIan Leporepin might perform any of these roles: SPI clock, I2C 40a1c11a0aSOleksandr Tymoshenkodata, GPIO pin, or PWM signal. 41a1c11a0aSOleksandr TymoshenkoFunction selection is performed by the pinmux controller, a SoC 42*19758005SIan Leporehardware block which is usually controlled by a set of registers. 43a1c11a0aSOleksandr TymoshenkoPinmux controller capabilities and register format depend 44a1c11a0aSOleksandr Tymoshenkoon the actual hardware implementation. 45a1c11a0aSOleksandr Tymoshenko.Pp 46a1c11a0aSOleksandr TymoshenkoOn 47a1c11a0aSOleksandr Tymoshenko.Xr fdt 4 48a1c11a0aSOleksandr Tymoshenkobased systems, the pinmux controller is represented by a node in 49a1c11a0aSOleksandr Tymoshenkothe device tree. 50a1c11a0aSOleksandr TymoshenkoIt may have any number of child nodes representing pin 51a1c11a0aSOleksandr Tymoshenkoconfiguration groups. 52a1c11a0aSOleksandr TymoshenkoProperties of such nodes are hardware-specific and handled 53a1c11a0aSOleksandr Tymoshenkoby individual pinctrl drivers. 54a1c11a0aSOleksandr Tymoshenko.Ss Example 1 55a1c11a0aSOleksandr TymoshenkoPinmux controller device tree node 56a1c11a0aSOleksandr Tymoshenko.Bd -literal 57a1c11a0aSOleksandr Tymoshenkopinctrl@7e220000 { 58a1c11a0aSOleksandr Tymoshenko compatible = "vndr,soc1715-pinctrl"; 59a1c11a0aSOleksandr Tymoshenko reg = <0x7e220000 0x100> 60a1c11a0aSOleksandr Tymoshenko 61a1c11a0aSOleksandr Tymoshenko spi0_pins: spi0 { 62a1c11a0aSOleksandr Tymoshenko vndr,pins = <11 12> 63a1c11a0aSOleksandr Tymoshenko vndr,functions = <ALT0 ALT5> 64a1c11a0aSOleksandr Tymoshenko } 65a1c11a0aSOleksandr Tymoshenko 66a1c11a0aSOleksandr Tymoshenko i2c0_pins: i2c0 { 67a1c11a0aSOleksandr Tymoshenko ... 68a1c11a0aSOleksandr Tymoshenko } 69a1c11a0aSOleksandr Tymoshenko} 70a1c11a0aSOleksandr Tymoshenko.Ed 71a1c11a0aSOleksandr Tymoshenko.Pp 72a1c11a0aSOleksandr TymoshenkoClient devices are hardware devices that require certain pin 73a1c11a0aSOleksandr Tymoshenkoconfigurations to function properly. 74a1c11a0aSOleksandr TymoshenkoDepending on the state the device is in (active, idle) it might 75a1c11a0aSOleksandr Tymoshenkorequire different pin configurations. 76a1c11a0aSOleksandr TymoshenkoEach configuration is described by setting the pinctrl-N 77a1c11a0aSOleksandr Tymoshenkoproperty to the list of phandles pointing to specific child 78a1c11a0aSOleksandr Tymoshenkonodes of the pinmux controller node. 79a1c11a0aSOleksandr TymoshenkoN is an integer value starting with 0 and incremented by 1 80a1c11a0aSOleksandr Tymoshenkofor every new set of pin configurations. 81a1c11a0aSOleksandr Tymoshenkopinctrl-0 is a default configuration that is applied in the 82a1c11a0aSOleksandr Tymoshenko.Xr fdt_pinctrl_configure_tree 9 83a1c11a0aSOleksandr Tymoshenkocall. 84a1c11a0aSOleksandr TymoshenkoIn addition to referring to pin configurations by index, they 85a1c11a0aSOleksandr Tymoshenkocan be referred to by name if the pinctrl-names property is set. 86a1c11a0aSOleksandr TymoshenkoThe value of pinctrl-names is a list of strings with names for 87a1c11a0aSOleksandr Tymoshenkoeach pinctrl-N property. 88a1c11a0aSOleksandr TymoshenkoClient devices can request specific configuration using 89a1c11a0aSOleksandr Tymoshenko.Xr fdt_pinctrl_configure 9 90a1c11a0aSOleksandr Tymoshenkoand 91a1c11a0aSOleksandr Tymoshenko.Xr fdt_pinctrl_configure_by_name 9 . 92a1c11a0aSOleksandr Tymoshenko.Ss Example 2 93a1c11a0aSOleksandr Tymoshenko.Bd -literal 94a1c11a0aSOleksandr Tymoshenkobacklight@7f000000 { 95a1c11a0aSOleksandr Tymoshenko compatible = "vndr,vndr-bl" 96a1c11a0aSOleksandr Tymoshenko reg = <0x7f000000 0x20> 97a1c11a0aSOleksandr Tymoshenko ... 98a1c11a0aSOleksandr Tymoshenko pinctrl-name = "active", "idle" 99a1c11a0aSOleksandr Tymoshenko pinctrl-0 = <&backlight_active_pins> 100a1c11a0aSOleksandr Tymoshenko pinctrl-1 = <&backlight_idle_pins> 101a1c11a0aSOleksandr Tymoshenko} 102a1c11a0aSOleksandr Tymoshenko.Ed 103a1c11a0aSOleksandr Tymoshenko.Pp 104*19758005SIan LeporeThe pinctrl driver should implement the FDT_PINCTRL_CONFIGURE 105*19758005SIan Leporemethod, register itself as a pin configuration handler by 106a1c11a0aSOleksandr Tymoshenkocalling fdt_pinctrl_register function, and call 107a1c11a0aSOleksandr Tymoshenko.Xr fdt_pinctrl_configure_tree 9 108*19758005SIan Leporeto configure pins for all enabled devices (devices where 109a1c11a0aSOleksandr Tymoshenkothe "status" property is not set to "disabled"). 110a1c11a0aSOleksandr Tymoshenko.Sh SEE ALSO 111a1c11a0aSOleksandr Tymoshenko.Xr fdt_pinctrl 9 112a1c11a0aSOleksandr Tymoshenko.Sh HISTORY 113a1c11a0aSOleksandr TymoshenkoThe 114a1c11a0aSOleksandr Tymoshenko.Nm 115a1c11a0aSOleksandr Tymoshenkodriver first appeared in 116a1c11a0aSOleksandr Tymoshenko.Fx 10.2 . 117a1c11a0aSOleksandr Tymoshenko.Sh AUTHORS 118a1c11a0aSOleksandr Tymoshenko.An -nosplit 119a1c11a0aSOleksandr TymoshenkoThe 120a1c11a0aSOleksandr Tymoshenko.Nm 121a1c11a0aSOleksandr Tymoshenkodevice driver was developed by 122a1c11a0aSOleksandr Tymoshenko.An \&Ian Lepore Aq Mt ian@FreeBSD.org . 123a1c11a0aSOleksandr TymoshenkoThis manual page was written by 124a1c11a0aSOleksandr Tymoshenko.An Oleksandr Tymoshenko Aq Mt gonzo@FreeBSD.org . 125