1.\" 2.\" Copyright (c) 2012 Sean Bruno <sbruno@freebsd.org> 3.\" All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24.\" SUCH DAMAGE. 25.\" 26.\" $FreeBSD$ 27.\" 28.Dd June 12, 2012 29.Dt EST 4 30.Os 31.Sh NAME 32.Nm est 33.Nd Enhanced Speedstep Technology 34.Sh SYNOPSIS 35To compile this capability into your kernel 36place the following line in your kernel 37configuration file: 38.Bd -ragged -offset indent 39.Cd "device cpufreq" 40.Ed 41.Sh DESCRIPTION 42The 43.Nm 44interface provides support for the Intel Enhanced Speedstep Technology. 45.Pp 46Note that 47.Nm 48capabilities are automatically loaded by the 49.Xr cpufreq 4 50driver. 51.Sh LOADER TUNABLES 52The 53.Nm 54interface is intended to allow 55.Xr cpufreq 4 56to access and implement Intel Enhanced SpeedStep Technology via 57.Xr acpi 4 58and the acpi_perf interface accessors. 59If the default settings are not optimal, the following sysctls can be 60used to modify or monitor 61.Nm 62behavior. 63.Bl -tag -width indent 64.It hw.est.msr_info 65Attempt to infer information from direct probing of the msr. 66Should only be used in diagnostic cases 67.Pq default 0 68.It hw.est.strict 69Validate frequency requested is accepted by the cpu when set. 70It appears that this will only work on single core cpus. 71.Pq default 0 72.El 73.Sh DIAGNOSTICS 74.Bl -diag 75.It "est%d: <Enhanced SpeedStep Frequency Control> on cpu%d" 76.Pp 77Indicates normal startup of this interface. 78.It "est: CPU supports Enhanced Speedstep, but is not recognized." 79.It "est: cpu_vendor GenuineIntel, msr 471c471c0600471c" 80.It "device_attach: est%d attach returned 6" 81.Pp 82Indicates all attempts to attach to this interface have failed. 83This usually indicates an improper BIOS setting restricting O/S 84control of the CPU speeds. 85Consult your BIOS documentation for more details. 86.El 87.Sh COMPATIBILITY 88.Nm 89is only found on supported Intel CPUs. 90.Sh SEE ALSO 91.Xr cpufreq 4 92.Rs 93.%T "Intel 64 and IA-32 Architectures Software Developer Manuals" 94.%U "http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html" 95.Re 96.Sh AUTHORS 97This manual page was written by 98.An Sean Bruno Aq sbruno@FreeBSD.org . 99