15486d2ecSSean Bruno.\" 25486d2ecSSean Bruno.\" Copyright (c) 2012 Sean Bruno <sbruno@freebsd.org> 35486d2ecSSean Bruno.\" All rights reserved. 45486d2ecSSean Bruno.\" 55486d2ecSSean Bruno.\" Redistribution and use in source and binary forms, with or without 65486d2ecSSean Bruno.\" modification, are permitted provided that the following conditions 75486d2ecSSean Bruno.\" are met: 85486d2ecSSean Bruno.\" 1. Redistributions of source code must retain the above copyright 95486d2ecSSean Bruno.\" notice, this list of conditions and the following disclaimer. 105486d2ecSSean Bruno.\" 2. Redistributions in binary form must reproduce the above copyright 115486d2ecSSean Bruno.\" notice, this list of conditions and the following disclaimer in the 125486d2ecSSean Bruno.\" documentation and/or other materials provided with the distribution. 135486d2ecSSean Bruno.\" 145486d2ecSSean Bruno.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 155486d2ecSSean Bruno.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 165486d2ecSSean Bruno.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 175486d2ecSSean Bruno.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 185486d2ecSSean Bruno.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 195486d2ecSSean Bruno.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 205486d2ecSSean Bruno.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 215486d2ecSSean Bruno.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 225486d2ecSSean Bruno.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 235486d2ecSSean Bruno.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 245486d2ecSSean Bruno.\" SUCH DAMAGE. 255486d2ecSSean Bruno.\" 265486d2ecSSean Bruno.\" $FreeBSD$ 275486d2ecSSean Bruno.\" 28*9157ca0fSLi-Wen Hsu.Dd April 21, 2020 295486d2ecSSean Bruno.Dt EST 4 305486d2ecSSean Bruno.Os 315486d2ecSSean Bruno.Sh NAME 325486d2ecSSean Bruno.Nm est 335486d2ecSSean Bruno.Nd Enhanced Speedstep Technology 345486d2ecSSean Bruno.Sh SYNOPSIS 355486d2ecSSean BrunoTo compile this capability into your kernel 365486d2ecSSean Brunoplace the following line in your kernel 375486d2ecSSean Brunoconfiguration file: 385486d2ecSSean Bruno.Bd -ragged -offset indent 395486d2ecSSean Bruno.Cd "device cpufreq" 405486d2ecSSean Bruno.Ed 415486d2ecSSean Bruno.Sh DESCRIPTION 425486d2ecSSean BrunoThe 435486d2ecSSean Bruno.Nm 445486d2ecSSean Brunointerface provides support for the Intel Enhanced Speedstep Technology. 455486d2ecSSean Bruno.Pp 465486d2ecSSean BrunoNote that 475486d2ecSSean Bruno.Nm 485486d2ecSSean Brunocapabilities are automatically loaded by the 495486d2ecSSean Bruno.Xr cpufreq 4 505486d2ecSSean Brunodriver. 515486d2ecSSean Bruno.Sh LOADER TUNABLES 525486d2ecSSean BrunoThe 535486d2ecSSean Bruno.Nm 545486d2ecSSean Brunointerface is intended to allow 555486d2ecSSean Bruno.Xr cpufreq 4 565486d2ecSSean Brunoto access and implement Intel Enhanced SpeedStep Technology via 575486d2ecSSean Bruno.Xr acpi 4 585486d2ecSSean Brunoand the acpi_perf interface accessors. 595486d2ecSSean BrunoIf the default settings are not optimal, the following sysctls can be 605486d2ecSSean Brunoused to modify or monitor 615486d2ecSSean Bruno.Nm 625486d2ecSSean Brunobehavior. 635486d2ecSSean Bruno.Bl -tag -width indent 645486d2ecSSean Bruno.It hw.est.msr_info 655486d2ecSSean BrunoAttempt to infer information from direct probing of the msr. 6648f219c0SSean BrunoShould only be used in diagnostic cases. 675486d2ecSSean Bruno.Pq default 0 685486d2ecSSean Bruno.It hw.est.strict 69*9157ca0fSLi-Wen HsuValidate frequency requested is accepted by the CPU when set. 70bf7f8bd3SSean BrunoIt appears that this will only work on single core cpus. 715486d2ecSSean Bruno.Pq default 0 725486d2ecSSean Bruno.El 7348f219c0SSean Bruno.Sh SYSCTL VARIABLES 7448f219c0SSean BrunoThe following 7548f219c0SSean Bruno.Xr sysctl 8 7648f219c0SSean Brunovalues are available 7748f219c0SSean Bruno.Bl -tag -width indent 78*9157ca0fSLi-Wen Hsu.It Va dev.est.%d.%desc 7948f219c0SSean BrunoDescription of support, almost always Enhanced SpeedStep Frequency Control. 8048f219c0SSean Bruno.It dev.est.0.%desc: Enhanced SpeedStep Frequency Control 81*9157ca0fSLi-Wen Hsu.It Va dev.est.%d.%driver 8248f219c0SSean BrunoDriver in use, always est. 8348f219c0SSean Bruno.It dev.est.0.%driver: est 84*9157ca0fSLi-Wen Hsu.It Va dev.est.%d.%parent 85*9157ca0fSLi-Wen HsuThe CPU that is exposing these frequencies. 8648f219c0SSean BrunoFor example 8748f219c0SSean Bruno.Va cpu0 . 88*9157ca0fSLi-Wen Hsu.It dev.est.0.%parent: cpu0 8948f219c0SSean Bruno.It Va dev.est.%d.freq_settings . 9048f219c0SSean BrunoThe valid frequencies that are allowed by this CPU and their step values. 9148f219c0SSean Bruno.It dev.est.0.freq_settings: 2201/45000 2200/45000 2000/39581 1900/37387 9248f219c0SSean Bruno1800/34806 1700/32703 1600/30227 1500/28212 1400/25828 1300/23900 1200/21613 9348f219c0SSean Bruno1100/19775 1000/17582 900/15437 800/13723 9448f219c0SSean Bruno.El 955486d2ecSSean Bruno.Sh DIAGNOSTICS 965486d2ecSSean Bruno.Bl -diag 975486d2ecSSean Bruno.It "est%d: <Enhanced SpeedStep Frequency Control> on cpu%d" 985486d2ecSSean Bruno.Pp 995486d2ecSSean BrunoIndicates normal startup of this interface. 1005486d2ecSSean Bruno.It "est: CPU supports Enhanced Speedstep, but is not recognized." 1015486d2ecSSean Bruno.It "est: cpu_vendor GenuineIntel, msr 471c471c0600471c" 1025486d2ecSSean Bruno.It "device_attach: est%d attach returned 6" 1035486d2ecSSean Bruno.Pp 1045486d2ecSSean BrunoIndicates all attempts to attach to this interface have failed. 1055486d2ecSSean BrunoThis usually indicates an improper BIOS setting restricting O/S 1065486d2ecSSean Brunocontrol of the CPU speeds. 1075486d2ecSSean BrunoConsult your BIOS documentation for more details. 1085486d2ecSSean Bruno.El 1095486d2ecSSean Bruno.Sh COMPATIBILITY 1105486d2ecSSean Bruno.Nm 1115486d2ecSSean Brunois only found on supported Intel CPUs. 1125486d2ecSSean Bruno.Sh SEE ALSO 1135486d2ecSSean Bruno.Xr cpufreq 4 114281858b4SJoel Dahl.Rs 115281858b4SJoel Dahl.%T "Intel 64 and IA-32 Architectures Software Developer Manuals" 116281858b4SJoel Dahl.%U "http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html" 117281858b4SJoel Dahl.Re 1185486d2ecSSean Bruno.Sh AUTHORS 1195486d2ecSSean BrunoThis manual page was written by 1206c899950SBaptiste Daroussin.An Sean Bruno Aq Mt sbruno@FreeBSD.org . 121