1.\" Copyright (c) 1997, 1998, 1999 2.\" Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 3. All advertising materials mentioning features or use of this software 13.\" must display the following acknowledgement: 14.\" This product includes software developed by Bill Paul. 15.\" 4. Neither the name of the author nor the names of any co-contributors 16.\" may be used to endorse or promote products derived from this software 17.\" without specific prior written permission. 18.\" 19.\" THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 20.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22.\" ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 23.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29.\" THE POSSIBILITY OF SUCH DAMAGE. 30.\" 31.\" $FreeBSD$ 32.\" 33.Dd November 20, 1999 34.Dt DC 4 i386 35.Os FreeBSD 36.Sh NAME 37.Nm dc 38.Nd 39DEC/Intel 21143 and clone 10/100 ethernet driver 40.Sh SYNOPSIS 41.Cd "device miibus" 42.Cd "device dc" 43.Sh DESCRIPTION 44The 45.Nm 46driver provides support for several PCI fast ethernet adapters and 47embedded controllers based on the following chipsets: 48.Pp 49.Bl -bullet -compact -offset indent 50.It 51DEC/Intel 21143 52.It 53Macronix 98713, 98713A, 98715, 98715A, 98725, 98727 and 98732 54.It 55Davicom DM9100, DM9102 and DM9102A 56.It 57ASIX Electronics AX88140A and AX88141 58.It 59ADMtek AL981 Comet and AN985 Centaur 60.It 61Lite-On 82c168 and 82c169 PNIC 62.It 63Lite-On/Macronix 82c115 PNIC II 64.El 65.Pp 66All of these chips have the same general register layout, DMA 67descriptor format and method of operation. 68All of the clone chips 69are based on the 21143 design with various modifications. 70The 7121143 itself has support for 10baseT, BNC, AUI, MII and symbol 72media attachments, 10 and 100Mbps speeds in full or half duplex, 73built in NWAY autonegotiation and wake on LAN. 74The 21143 also 75offers several receive filter programming options including 76perfect filtering, inverse perfect filtering and hash table 77filtering. 78.Pp 79Some clone chips duplicate the 21143 fairly closely while others 80only maintain superficial simularities. 81Some support only MII 82media attachments. 83Others use different receiver filter programming 84mechanisms. 85At least one supports only chained DMA descriptors 86(most support both chained descriptors and contiguously allocated 87fixed size rings). Some chips (especially the PNIC) also have 88peculiar bugs. 89The 90.Nm 91driver does its best to provide generalized support for all 92of these chipsets in order to keep special case code to a minimun. 93.Pp 94These chips are used by many vendors which makes it 95difficult provide a complete list of all supported cards. 96The 97following NICs are known to work with the 98.Nm 99driver at this time: 100.Pp 101.Bl -bullet -compact -offset indent 102.It 103Digital DE500-BA 10/100 (21143, non-MII) 104.It 105Built in DE500-BA on DEC Alpha workstations (21143, non-MII) 106.It 107Built in 10Mbps only ethernet on Compaq Presario 7900 series 108desktops (21143, non-MII) 109.It 110Built in ethernet on LinkSys EtherFast 10/100 Instant GigaDrive (DM9102, MII) 111.It 112Kingston KNE100TX (21143, MII) 113.It 114D-Link DFE-570TX (21143, MII, quad port) 115.It 116NDC SOHOware SFA110A (98713A) 117.It 118NDC SOHOware SFA110A Rev B4 (98715AEC-C) 119.It 120SVEC PN102-TX (98713) 121.It 122CNet Pro120A (98715A or 98713A) and CNet Pro120B (98715) 123.It 124Compex RL100-TX (98713 or 98713A) 125.It 126LinkSys LNE100TX (PNIC 82c168, 82c169) 127.It 128NetGear FA310-TX Rev. D1, D2 or D3 (PNIC 82c169) 129.It 130Matrox FastNIC 10/100 (PNIC 82c168, 82c169) 131.It 132Kingston KNE110TX (PNIC 82c169) 133.It 134LinkSys LNE100TX v2.0 (PNIC II 82c115) 135.It 136Jaton XpressNet (Davicom DM9102) 137.It 138Alfa Inc GFC2204 (ASIX AX88140A) 139.It 140CNet Pro110B (ASIX AX88140A) 141.It 142LinkSys LNE100TX v4.0/4.1 (ADMtek AN985 Centaur-P) 143.El 144.Pp 145The 146.Nm 147driver supports the following media types: 148.Pp 149.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 150.It autoselect 151Enable autoselection of the media type and options. 152The user can manually override 153the autoselected mode by adding media options to the 154.Pa /etc/rc.conf 155file. 156.Pp 157Note: the built-in NWAY autonegotiation on the original PNIC 82c168 158chip is horribly broken and is not supported by the 159.Nm 160driver at this time: the chip will operate in any speed or duplex 161mode, however these must be set manually. 162The original 82c168 appears 163on very early revisions of the LinkSys LNE100TX and Matrox FastNIC. 164.It 10baseT/UTP 165Set 10Mbps operation. 166The 167.Ar mediaopt 168option can also be used to enable 169.Ar full-duplex 170operation. 171Not specifying 172.Ar full duplex 173implies 174.Ar half-duplex 175mode. 176.It 100baseTX 177Set 100Mbps (fast ethernet) operation. 178The 179.Ar mediaopt 180option can also be used to enable 181.Ar full-duplex 182operation. 183Not specifying 184.Ar full duplex 185implies 186.Ar half-duplex 187mode. 188.El 189.Pp 190The 191.Nm 192driver supports the following media options: 193.Pp 194.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 195.It full-duplex 196Force full duplex operation. 197The interface will operate in 198half duplex mode if this media option is not specified. 199.El 200.Pp 201Note that the 100baseTX media type may not be available on certain 202Intel 21143 adapters which support 10mbps media attachments only. 203For more information on configuring this device, see 204.Xr ifconfig 8 . 205.Sh DIAGNOSTICS 206.Bl -diag 207.It "dc%d: couldn't map ports/memory" 208A fatal initialization error has occurred. 209.It "dc%d: couldn't map interrupt" 210A fatal initialization error has occurred. 211.It "dc%d: watchdog timeout" 212A packet was queued for transmission and a transmit command was 213issued, however the device failed to acknowledge the transmission 214before a timeout expired. 215This can happen if the device is unable 216to deliver interrupts for some reason, of if there is a problem with 217the network connection (cable). 218.It "dc%d: no memory for rx list" 219The driver failed to allocate an mbuf for the receiver ring. 220.It "dc%d: TX underrun -- increasing TX threshold" 221The device generated a transmit underrun error while attempting to 222DMA and transmit a packet. 223This happens if the host is not able to 224DMA the packet data into the NIC's FIFO fast enough. 225The driver 226will dynamically increase the transmit start threshold so that 227more data must be DMAed into the FIFO before the NIC will start 228transmitting it onto the wire. 229.It "dc%d: TX underrun -- using store and forward mode" 230The device continued to generate transmit underruns even after all 231possible transmit start threshold settings had been tried, so the 232driver programmed the chip for store and forward mode. 233In this mode, 234the NIC will not begin transmission until the entire packet has been 235transfered into its FIFO memory. 236.It "dc%d: chip is in D3 power state -- setting to D0" 237This message applies only to adapters which support power 238management. 239Some operating systems place the controller in low power 240mode when shutting down, and some PCI BIOSes fail to bring the chip 241out of this state before configuring it. 242The controller loses all of 243its PCI configuration in the D3 state, so if the BIOS does not set 244it back to full power mode in time, it won't be able to configure it 245correctly. 246The driver tries to detect this condition and bring 247the adapter back to the D0 (full power) state, but this may not be 248enough to return the driver to a fully operational condition. 249If 250you see this message at boot time and the driver fails to attach 251the device as a network interface, you will have to perform a second 252warm boot to have the device properly configured. 253.Pp 254Note that this condition only occurs when warm booting from another 255operating system. 256If you power down your system prior to booting 257.Fx , 258the card should be configured correctly. 259.El 260.Sh SEE ALSO 261.Xr arp 4 , 262.Xr netintro 4 , 263.Xr ng_ether 4 , 264.Xr ifconfig 8 265.Rs 266.%T ADMtek AL981, AL983 and AL985 data sheets 267.%O http://www.admtek.com.tw 268.Re 269.Rs 270.%T ASIX Electronics AX88140A and AX88141 data sheets 271.%O http://www.asix.com.tw 272.Re 273.Rs 274.%T Davicom DM9102 data sheet 275.%O http://www.davicom8.com 276.Re 277.Rs 278.%T Intel 21143 Hardware Reference Manual 279.%O http://developer.intel.com 280.Re 281.Rs 282.%T Macronix 98713/A, 98715/A and 98725 data sheets 283.%O http://www.macronix.com 284.Re 285.Rs 286.%T Macronix 98713/A and 98715/A app notes 287.%O http://www.macronix.com 288.Re 289.Sh HISTORY 290The 291.Nm 292device driver first appeared in 293.Fx 4.0 . 294.Sh AUTHORS 295The 296.Nm 297driver was written by 298.An Bill Paul Aq wpaul@ee.columbia.edu . 299.Sh BUGS 300The Macronix application notes claim that in order to put the 301chips in normal operation, the driver must write a certain magic 302number into the CSR16 register. 303The numbers are documented in 304the app notes, but the exact meaning of the bits is not. 305.Pp 306The 98713A seems to have a problem with 10Mbps full duplex mode. 307The transmitter works but the receiver tends to produce many 308unexplained errors leading to very poor overall performance. 309The 31098715A does not exhibit this problem. 311All other modes on the 31298713A seem to work correctly. 313.Pp 314The original 82c168 PNIC chip has built in NWAY support which is 315used on certain early LinkSys LNE100TX and Matrox FastNIC cards, 316however it is horribly broken and difficult to use reliably. 317Consequently, autonegotiation is not currently supported for this 318chipset: the driver defaults the NIC to 10baseT half duplex, and it's 319up to the operator to manually select a different mode if necessary. 320(Later cards use an external MII transceiver to implement NWAY 321autonegotiation and work correctly.) 322.Pp 323The 324.Nm 325driver programs 82c168 and 82c169 PNIC chips to use the store and 326forward setting for the transmit start threshold by default. 327This 328is to work around problems with some NIC/PCI bus combinations where 329the PNIC can transmit corrupt frames when operating at 100Mbps, 330probably due to PCI DMA burst transfer errors. 331.Pp 332The 82c168 and 82c169 PNIC chips also have a receiver bug that 333sometimes manifests during periods of heavy receive and transmit 334activity, where the chip will improperly DMA received frames to 335the host. 336The chips appear to upload several kilobytes of garbage 337data along with the received frame data, dirtying several RX buffers 338instead of just the expected one. 339The 340.Nm 341driver detects this condition and will salvage the frame, however 342it incurs a serious performance penalty in the process. 343.Pp 344The PNIC chips also sometimes generate a transmit underrun error when 345the driver attempts to download the receiver filter setup frame, which 346can result in the receive filter being incorrectly programmed. 347The 348.Nm 349driver will watch for this condition and requeue the setup frame until 350it is transfered successfully. 351.Pp 352The ADMtek AL981 chip (and possibly the AN985 as well) has been observed 353to sometimes wedge on transmit: this appears to happen when the driver 354queues a sequence of frames which cause it to wrap from the end of the 355the transmit descriptor ring back to the beginning. 356The 357.Nm 358driver attempts to avoid this condition by not queing any frames past 359the end of the transmit ring during a single invocation of the 360.Fn dc_start 361routine. 362This workaround has a negligible impact on transmit performance. 363 364 365