xref: /freebsd/share/man/man4/chvgpio.4 (revision fd9a4a67d053a51349ba6eba5ea61a7cd2cf20af)
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2.\"	Tom Jones <tj@enoti.me>  All rights reserved.
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25.Dd November 17, 2017
26.Dt CHVGPIO 4
27.Os
28.Sh NAME
29.Nm chvgpio
30.Nd Intel Cherry View SoC GPIO controller
31.Sh SYNOPSIS
32.Cd "device gpio"
33.Cd "device chvgpio"
34.Sh DESCRIPTION
35.Nm
36supports the GPIO controller that can be found in Intel's Cherry View SoC
37family.
38.Pp
39The Cherry View SoC has 5 banks of GPIO pins, NORTH, EAST, SOUTHEAST, SOUTHWEST
40and VIRTUAL.
41All but VIRTUAL are exposed to userland as
42.Pa /dev/gpiocN ,
43where N is 0-3.
44Pins in each bank are pre-named to match names in the Intel® Atom™ Z8000
45Processor Series Vol 2
46.Sh SEE ALSO
47.Xr gpio 3 ,
48.Xr gpio 4 ,
49.Xr gpioctl 8
50.Rs
51.%T Intel® Atom™ Z8000 Processor Series Vol 1
52.Re
53.Rs
54.%T Intel® Atom™ Z8000 Processor Series Vol 2
55.Re
56.Sh HISTORY
57The
58.Nm
59manual page first appeared in
60.Fx 12 .
61.Sh AUTHORS
62This driver and man page were written by
63.An Tom Jones Aq Mt tj@enoti.me .
64