1.\" 2.\" SPDX-License-Identifier: BSD-3-Clause 3.\" 4.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 5.\" Justin T. Gibbs. All rights reserved. 6.\" 7.\" Redistribution and use in source and binary forms, with or without 8.\" modification, are permitted provided that the following conditions 9.\" are met: 10.\" 1. Redistributions of source code must retain the above copyright 11.\" notice, this list of conditions and the following disclaimer. 12.\" 2. Redistributions in binary form must reproduce the above copyright 13.\" notice, this list of conditions and the following disclaimer in the 14.\" documentation and/or other materials provided with the distribution. 15.\" 3. The name of the author may not be used to endorse or promote products 16.\" derived from this software without specific prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28.\" 29.Dd September 29, 2025 30.Dt AHC 4 31.Os 32.Sh NAME 33.Nm ahc 34.Nd Adaptec VL/ISA/PCI SCSI host adapter driver 35.Sh SYNOPSIS 36To compile this driver into the kernel, 37place the following lines in your 38kernel configuration file: 39.Bd -ragged -offset indent 40.Cd "device scbus" 41.Cd "device ahc" 42.Pp 43For one or more PCI cards: 44.Cd "device pci" 45.Ed 46.Pp 47Alternatively, to load the driver as a 48module at boot time, place the following lines in 49.Xr loader.conf 5 : 50.Bd -literal -offset indent 51ahc_load="YES" 52ahc_isa_load="YES" 53ahc_pci_load="YES" 54.Ed 55.Sh DESCRIPTION 56This driver provides access to the 57.Tn SCSI 58bus(es) connected to the Adaptec AIC77xx and AIC78xx 59host adapter chips. 60.Pp 61Driver features include support for twin and wide busses, 62fast, ultra or ultra2 synchronous transfers depending on controller type, 63tagged queueing, SCB paging, and target mode. 64.Pp 65Per target configuration performed in the 66.Tn SCSI-Select 67menu, accessible at boot 68is honored by this driver. 69This includes synchronous/asynchronous transfers, 70maximum synchronous negotiation rate, 71wide transfers, 72disconnection, 73the host adapter's SCSI ID. 74For systems that store non-volatile settings in a system specific manner 75rather than a serial eeprom directly connected to the aic7xxx controller, 76the 77.Tn BIOS 78must be enabled for the driver to access this information. 79This restriction applies to 80many chip-down motherboard configurations. 81.Pp 82Performance and feature sets vary throughout the aic7xxx product line. 83The following table provides a comparison of the different chips supported 84by the 85.Nm 86driver. 87Note that wide and twin channel features, although always supported 88by a particular chip, may be disabled in a particular motherboard or card 89design. 90.Bd -ragged -offset indent 91.Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X" 92.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features" 93.It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1" 94.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta "" 95.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta "" 96.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta "" 97.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "" 98.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 99.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 100.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 101.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5" 102.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8" 103.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 104.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 105.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 106.El 107.Pp 108.Bl -enum -compact 109.It 110Multiplexed Twin Channel Device - One controller servicing two busses. 111.It 112Multi-function Twin Channel Device - Two controllers on one chip. 113.It 114Command Channel Secondary DMA Engine - Allows scatter gather list and 115SCB prefetch. 116.It 11764 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 118.It 119Block Move Instruction Support - Doubles the speed of certain sequencer 120operations. 121.It 122.Sq Bayonet 123style Scatter Gather Engine - Improves S/G prefetch performance. 124.It 125Queuing Registers - Allows queueing of new transactions without pausing the 126sequencer. 127.It 128Multiple Target IDs - Allows the controller to respond to selection as a 129target on multiple SCSI IDs. 130.El 131.Ed 132.Sh CONFIGURATION OPTIONS 133.Pp 134To allow PCI adapters to use memory mapped I/O if enabled: 135.Pp 136.Cd options AHC_ALLOW_MEMIO=(0 -- disabled, 1 -- enabled) 137.Bd -ragged -offset indent 138Memory mapped I/O is more efficient than the alternative, programmed I/O. 139Most PCI BIOSes will map devices so that either technique for communicating 140with the card is available. In some cases, usually when the PCI device is 141sitting behind a PCI->PCI bridge, the BIOS may fail to properly initialize 142the chip for memory mapped I/O. The typical symptom of this problem is a 143system hang if memory mapped I/O is attempted. 144.Pp 145Most modern motherboards perform the initialization correctly and work fine 146with this option enabled and it is the default. This option can also be 147dynamically configured through a device hint documented below. 148.Ed 149.Pp 150To statically configure one or more controllers to assume the target role: 151.Pp 152.Cd options AHC_TMODE_ENABLE=<bitmask of units> 153.Bd -ragged -offset indent 154The value assigned to this option should be a bitmap of all units where target 155mode is desired. For example, a value of 0x25, would enable target mode on 156units 0, 2, and 5. A value of 0x8a enables it for units 1, 3, and 7. 157.Pp 158Note that controllers can be dynamically configured through a device hint 159documented below. 160.Ed 161.Sh BOOT OPTIONS 162The following options are switchable by setting values in 163.Pa /boot/device.hints . 164.Pp 165They are: 166.Bl -tag -width indent 167.It Va hint.ahc. Ns Ar N Ns Va .tmode_enable 168A hint to define whether the SCSI target mode is enabled, defaults to disabled 169(0 -- disabled, 1 -- enabled). 170.It Va hint.ahc. Ns Ar N Ns Va .allow_memio 171A hint to define whether memory mapped io is enabled or disabled for this 172adapter, defaults to enabled (0 -- disabled, 1 -- enabled). 173.El 174.Sh HARDWARE 175The 176.Nm 177driver supports the following VL/ISA/PCI parallel SCSI controllers and cards: 178.Pp 179.Bl -bullet -compact 180.It 181Adaptec 182.Tn AIC7770 183host adapter chip 184.It 185Adaptec 186.Tn AIC7850 187host adapter chip 188.It 189Adaptec 190.Tn AIC7860 191host adapter chip 192.It 193Adaptec 194.Tn AIC7870 195host adapter chip 196.It 197Adaptec 198.Tn AIC7880 199host adapter chip 200.It 201Adaptec 202.Tn AIC7890 203host adapter chip 204.It 205Adaptec 206.Tn AIC7891 207host adapter chip 208.It 209Adaptec 210.Tn AIC7892 211host adapter chip 212.It 213Adaptec 214.Tn AIC7895 215host adapter chip 216.It 217Adaptec 218.Tn AIC7896 219host adapter chip 220.It 221Adaptec 222.Tn AIC7897 223host adapter chip 224.It 225Adaptec 226.Tn AIC7899 227host adapter chip 228.It 229Adaptec 230.Tn 274X(W) 231.It 232Adaptec 233.Tn 274X(T) 234.It 235Adaptec 236.Tn 2910 237.It 238Adaptec 239.Tn 2915 240.It 241Adaptec 242.Tn 2920C 243.It 244Adaptec 245.Tn 2930C 246.It 247Adaptec 248.Tn 2930U2 249.It 250Adaptec 251.Tn 2940 252.It 253Adaptec 254.Tn 2940J 255.It 256Adaptec 257.Tn 2940N 258.It 259Adaptec 260.Tn 2940U 261.It 262Adaptec 263.Tn 2940AU 264.It 265Adaptec 266.Tn 2940UW 267.It 268Adaptec 269.Tn 2940UW Dual 270.It 271Adaptec 272.Tn 2940UW Pro 273.It 274Adaptec 275.Tn 2940U2W 276.It 277Adaptec 278.Tn 2940U2B 279.It 280Adaptec 281.Tn 2950U2W 282.It 283Adaptec 284.Tn 2950U2B 285.It 286Adaptec 287.Tn 19160B 288.It 289Adaptec 290.Tn 29160B 291.It 292Adaptec 293.Tn 29160N 294.It 295Adaptec 296.Tn 3940 297.It 298Adaptec 299.Tn 3940U 300.It 301Adaptec 302.Tn 3940AU 303.It 304Adaptec 305.Tn 3940UW 306.It 307Adaptec 308.Tn 3940AUW 309.It 310Adaptec 311.Tn 3940U2W 312.It 313Adaptec 314.Tn 3950U2 315.It 316Adaptec 317.Tn 3960 318.It 319Adaptec 320.Tn 39160 321.It 322Adaptec 323.Tn 3985 324.It 325Adaptec 326.Tn 4944UW 327.It 328Many motherboards with on-board 329.Tn SCSI 330support 331.El 332.Sh SCSI CONTROL BLOCKS (SCBs) 333Every transaction sent to a device on the SCSI bus is assigned a 334.Sq SCSI Control Block 335(SCB). 336The SCB contains all of the information required by the 337controller to process a transaction. 338The chip feature table lists 339the number of SCBs that can be stored in on-chip memory. 340All chips 341with model numbers greater than or equal to 7870 allow for the on chip 342SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 343Very few Adaptec controller configurations have external SRAM. 344.Pp 345If external SRAM is not available, SCBs are a limited resource. 346Using the SCBs in a straight forward manner would only allow the driver to 347handle as many concurrent transactions as there are physical SCBs. 348To fully utilize the SCSI bus and the devices on it, 349requires much more concurrency. 350The solution to this problem is 351.Em SCB Paging , 352a concept similar to memory paging. 353SCB paging takes advantage of 354the fact that devices usually disconnect from the SCSI bus for long 355periods of time without talking to the controller. 356The SCBs for disconnected transactions are only of use to the controller 357when the transfer is resumed. 358When the host queues another transaction 359for the controller to execute, the controller firmware will use a 360free SCB if one is available. 361Otherwise, the state of the most recently 362disconnected (and therefore most likely to stay disconnected) SCB is 363saved, via dma, to host memory, and the local SCB reused to start 364the new transaction. 365This allows the controller to queue up to 366255 transactions regardless of the amount of SCB space. 367Since the 368local SCB space serves as a cache for disconnected transactions, the 369more SCB space available, the less host bus traffic consumed saving 370and restoring SCB data. 371.Sh SEE ALSO 372.Xr ahd 4 , 373.Xr cd 4 , 374.Xr da 4 , 375.Xr sa 4 , 376.Xr scsi 4 377.Sh HISTORY 378The 379.Nm 380driver appeared in 381.Fx 2.0 . 382.Sh AUTHORS 383The 384.Nm 385driver, the 386.Tn AIC7xxx 387sequencer-code assembler, 388and the firmware running on the aic7xxx chips was written by 389.An Justin T. Gibbs . 390.Sh BUGS 391Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 392.Tn AIC7870 393Rev B in synchronous mode at 10MHz. 394Controllers with this problem have a 39542 MHz clock crystal on them and run slightly above 10MHz. 396This confuses the drive and hangs the bus. 397Setting a maximum synchronous negotiation rate of 8MHz in the 398.Tn SCSI-Select 399utility will allow normal operation. 400.Pp 401Although the Ultra2 and Ultra160 products have sufficient instruction 402ram space to support both the initiator and target roles concurrently, 403this configuration is disabled in favor of allowing the target role 404to respond on multiple target ids. 405A method for configuring dual role mode should be provided. 406.Pp 407Tagged Queuing is not supported in target mode. 408.Pp 409Reselection in target mode fails to function correctly on all high 410voltage differential boards as shipped by Adaptec. 411Information on 412how to modify HVD board to work correctly in target mode is available 413from Adaptec. 414