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27.Dd February 15, 2017
28.Dt AHC 4
29.Os
30.Sh NAME
31.Nm ahc
32.Nd Adaptec VL/ISA/PCI SCSI host adapter driver
33.Sh SYNOPSIS
34To compile this driver into the kernel,
35place the following lines in your
36kernel configuration file:
37.Bd -ragged -offset indent
38.Cd "device scbus"
39.Cd "device ahc"
40.Pp
41For one or more PCI cards:
42.Cd "device pci"
43.Ed
44.Pp
45Alternatively, to load the driver as a
46module at boot time, place the following lines in
47.Xr loader.conf 5 :
48.Bd -literal -offset indent
49ahc_load="YES"
50ahc_isa_load="YES"
51ahc_pci_load="YES"
52.Ed
53.Sh DESCRIPTION
54This driver provides access to the
55.Tn SCSI
56bus(es) connected to the Adaptec AIC77xx and AIC78xx
57host adapter chips.
58.Pp
59Driver features include support for twin and wide busses,
60fast, ultra or ultra2 synchronous transfers depending on controller type,
61tagged queueing, SCB paging, and target mode.
62.Pp
63Per target configuration performed in the
64.Tn SCSI-Select
65menu, accessible at boot
66is honored by this driver.
67This includes synchronous/asynchronous transfers,
68maximum synchronous negotiation rate,
69wide transfers,
70disconnection,
71the host adapter's SCSI ID.
72For systems that store non-volatile settings in a system specific manner
73rather than a serial eeprom directly connected to the aic7xxx controller,
74the
75.Tn BIOS
76must be enabled for the driver to access this information.
77This restriction applies to
78many chip-down motherboard configurations.
79.Pp
80Performance and feature sets vary throughout the aic7xxx product line.
81The following table provides a comparison of the different chips supported
82by the
83.Nm
84driver.
85Note that wide and twin channel features, although always supported
86by a particular chip, may be disabled in a particular motherboard or card
87design.
88.Bd -ragged -offset indent
89.Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X"
90.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features"
91.It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1"
92.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta ""
93.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta ""
94.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta ""
95.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta ""
96.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
97.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
98.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
99.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5"
100.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8"
101.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8"
102.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8"
103.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8"
104.El
105.Pp
106.Bl -enum -compact
107.It
108Multiplexed Twin Channel Device - One controller servicing two busses.
109.It
110Multi-function Twin Channel Device - Two controllers on one chip.
111.It
112Command Channel Secondary DMA Engine - Allows scatter gather list and
113SCB prefetch.
114.It
11564 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
116.It
117Block Move Instruction Support - Doubles the speed of certain sequencer
118operations.
119.It
120.Sq Bayonet
121style Scatter Gather Engine - Improves S/G prefetch performance.
122.It
123Queuing Registers - Allows queueing of new transactions without pausing the
124sequencer.
125.It
126Multiple Target IDs - Allows the controller to respond to selection as a
127target on multiple SCSI IDs.
128.El
129.Ed
130.Sh CONFIGURATION OPTIONS
131.Pp
132To allow PCI adapters to use memory mapped I/O if enabled:
133.Pp
134.Cd options AHC_ALLOW_MEMIO
135.Bd -ragged -offset indent
136Memory mapped I/O is more efficient than the alternative, programmed I/O.
137Most PCI BIOSes will map devices so that either technique for communicating
138with the card is available.  In some cases, usually when the PCI device is
139sitting behind a PCI->PCI bridge, the BIOS may fail to properly initialize
140the chip for memory mapped I/O. The typical symptom of this problem is a
141system hang if memory mapped I/O is attempted.
142.Pp
143Most modern motherboards perform the initialization correctly and work fine
144with this option enabled.
145.Ed
146.Pp
147To statically configure one or more controllers to assume the target role:
148.Pp
149.Cd options AHC_TMODE_ENABLE <bitmask of units>
150.Bd -ragged -offset indent
151The value assigned to this option should be a bitmap of all units where target
152mode is desired. For example, a value of 0x25, would enable target mode on
153units 0, 2, and 5. A value of 0x8a enables it for units 1, 3, and 7.
154.Pp
155Note that controllers can be dynamically configured through a device hint
156documented below.
157.El
158.Ed
159.Sh BOOT OPTIONS
160The following options are switchable by setting values in
161.Pa /boot/device.hints .
162.Pp
163They are:
164.Bl -tag -width indent
165.It Va hint.ahc. Ns Ar N Ns Va .tmode_enable
166A hint to define whether the SCSI target mode is enabled (0 -- disabled, 1 -- enabled).
167.El
168.Ed
169.Sh HARDWARE
170The
171.Nm
172driver supports the following
173.Tn SCSI
174host adapter chips and
175.Tn SCSI
176controller cards:
177.Pp
178.Bl -bullet -compact
179.It
180Adaptec
181.Tn AIC7770
182host adapter chip
183.It
184Adaptec
185.Tn AIC7850
186host adapter chip
187.It
188Adaptec
189.Tn AIC7860
190host adapter chip
191.It
192Adaptec
193.Tn AIC7870
194host adapter chip
195.It
196Adaptec
197.Tn AIC7880
198host adapter chip
199.It
200Adaptec
201.Tn AIC7890
202host adapter chip
203.It
204Adaptec
205.Tn AIC7891
206host adapter chip
207.It
208Adaptec
209.Tn AIC7892
210host adapter chip
211.It
212Adaptec
213.Tn AIC7895
214host adapter chip
215.It
216Adaptec
217.Tn AIC7896
218host adapter chip
219.It
220Adaptec
221.Tn AIC7897
222host adapter chip
223.It
224Adaptec
225.Tn AIC7899
226host adapter chip
227.It
228Adaptec
229.Tn 274X(W)
230.It
231Adaptec
232.Tn 274X(T)
233.It
234Adaptec
235.Tn 2910
236.It
237Adaptec
238.Tn 2915
239.It
240Adaptec
241.Tn 2920C
242.It
243Adaptec
244.Tn 2930C
245.It
246Adaptec
247.Tn 2930U2
248.It
249Adaptec
250.Tn 2940
251.It
252Adaptec
253.Tn 2940J
254.It
255Adaptec
256.Tn 2940N
257.It
258Adaptec
259.Tn 2940U
260.It
261Adaptec
262.Tn 2940AU
263.It
264Adaptec
265.Tn 2940UW
266.It
267Adaptec
268.Tn 2940UW Dual
269.It
270Adaptec
271.Tn 2940UW Pro
272.It
273Adaptec
274.Tn 2940U2W
275.It
276Adaptec
277.Tn 2940U2B
278.It
279Adaptec
280.Tn 2950U2W
281.It
282Adaptec
283.Tn 2950U2B
284.It
285Adaptec
286.Tn 19160B
287.It
288Adaptec
289.Tn 29160B
290.It
291Adaptec
292.Tn 29160N
293.It
294Adaptec
295.Tn 3940
296.It
297Adaptec
298.Tn 3940U
299.It
300Adaptec
301.Tn 3940AU
302.It
303Adaptec
304.Tn 3940UW
305.It
306Adaptec
307.Tn 3940AUW
308.It
309Adaptec
310.Tn 3940U2W
311.It
312Adaptec
313.Tn 3950U2
314.It
315Adaptec
316.Tn 3960
317.It
318Adaptec
319.Tn 39160
320.It
321Adaptec
322.Tn 3985
323.It
324Adaptec
325.Tn 4944UW
326.It
327Many motherboards with on-board
328.Tn SCSI
329support
330.El
331.Sh SCSI CONTROL BLOCKS (SCBs)
332Every transaction sent to a device on the SCSI bus is assigned a
333.Sq SCSI Control Block
334(SCB).
335The SCB contains all of the information required by the
336controller to process a transaction.
337The chip feature table lists
338the number of SCBs that can be stored in on-chip memory.
339All chips
340with model numbers greater than or equal to 7870 allow for the on chip
341SCB space to be augmented with external SRAM up to a maximum of 255 SCBs.
342Very few Adaptec controller configurations have external SRAM.
343.Pp
344If external SRAM is not available, SCBs are a limited resource.
345Using the SCBs in a straight forward manner would only allow the driver to
346handle as many concurrent transactions as there are physical SCBs.
347To fully utilize the SCSI bus and the devices on it,
348requires much more concurrency.
349The solution to this problem is
350.Em SCB Paging ,
351a concept similar to memory paging.
352SCB paging takes advantage of
353the fact that devices usually disconnect from the SCSI bus for long
354periods of time without talking to the controller.
355The SCBs for disconnected transactions are only of use to the controller
356when the transfer is resumed.
357When the host queues another transaction
358for the controller to execute, the controller firmware will use a
359free SCB if one is available.
360Otherwise, the state of the most recently
361disconnected (and therefore most likely to stay disconnected) SCB is
362saved, via dma, to host memory, and the local SCB reused to start
363the new transaction.
364This allows the controller to queue up to
365255 transactions regardless of the amount of SCB space.
366Since the
367local SCB space serves as a cache for disconnected transactions, the
368more SCB space available, the less host bus traffic consumed saving
369and restoring SCB data.
370.Sh SEE ALSO
371.Xr ahd 4 ,
372.Xr cd 4 ,
373.Xr da 4 ,
374.Xr sa 4 ,
375.Xr scsi 4
376.Sh HISTORY
377The
378.Nm
379driver appeared in
380.Fx 2.0 .
381.Sh AUTHORS
382The
383.Nm
384driver, the
385.Tn AIC7xxx
386sequencer-code assembler,
387and the firmware running on the aic7xxx chips was written by
388.An Justin T. Gibbs .
389.Sh BUGS
390Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an
391.Tn AIC7870
392Rev B in synchronous mode at 10MHz.
393Controllers with this problem have a
39442 MHz clock crystal on them and run slightly above 10MHz.
395This confuses the drive and hangs the bus.
396Setting a maximum synchronous negotiation rate of 8MHz in the
397.Tn SCSI-Select
398utility will allow normal operation.
399.Pp
400Although the Ultra2 and Ultra160 products have sufficient instruction
401ram space to support both the initiator and target roles concurrently,
402this configuration is disabled in favor of allowing the target role
403to respond on multiple target ids.
404A method for configuring dual role mode should be provided.
405.Pp
406Tagged Queuing is not supported in target mode.
407.Pp
408Reselection in target mode fails to function correctly on all high
409voltage differential boards as shipped by Adaptec.
410Information on
411how to modify HVD board to work correctly in target mode is available
412from Adaptec.
413