1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.\" $FreeBSD$ 28.\" 29.Dd July 4, 2004 30.Dt AHC 4 31.Os 32.Sh NAME 33.Nm ahc 34.Nd Adaptec VL/EISA/PCI SCSI host adapter driver 35.Sh SYNOPSIS 36To compile this driver into the kernel, 37place the following lines in your 38kernel configuration file: 39.Bd -ragged -offset indent 40.Cd "device scbus" 41.Cd "device ahc" 42.Pp 43For one or more VL/EISA cards: 44.Cd "device eisa" 45.Pp 46For one or more PCI cards: 47.Cd "device pci" 48.Pp 49To allow PCI adapters to use memory mapped I/O if enabled: 50.Cd options AHC_ALLOW_MEMIO 51.Pp 52To configure one or more controllers to assume the target role: 53.Cd options AHC_TMODE_ENABLE <bitmask of units> 54.Ed 55.Pp 56Alternatively, to load the driver as a 57module at boot time, place the following lines in 58.Xr loader.conf 5 : 59.Bd -literal -offset indent 60ahc_load="YES" 61ahc_eisa_load="YES" 62ahc_isa_load="YES" 63ahc_pci_load="YES" 64.Ed 65.Sh DESCRIPTION 66This driver provides access to the 67.Tn SCSI 68bus(es) connected to the Adaptec AIC77xx and AIC78xx 69host adapter chips. 70.Pp 71Driver features include support for twin and wide busses, 72fast, ultra or ultra2 synchronous transfers depending on controller type, 73tagged queueing, SCB paging, and target mode. 74.Pp 75Memory mapped I/O can be enabled for PCI devices with the 76.Dq Dv AHC_ALLOW_MEMIO 77configuration option. 78Memory mapped I/O is more efficient than the alternative, programmed I/O. 79Most PCI BIOSes will map devices so that either technique for communicating 80with the card is available. 81In some cases, 82usually when the PCI device is sitting behind a PCI->PCI bridge, 83the BIOS may fail to properly initialize the chip for memory mapped I/O. 84The typical symptom of this problem is a system hang if memory mapped I/O 85is attempted. 86Most modern motherboards perform the initialization correctly and work fine 87with this option enabled. 88.Pp 89Individual controllers may be configured to operate in the target role 90through the 91.Dq Dv AHC_TMODE_ENABLE 92configuration option. 93The value assigned to this option should be a bitmap 94of all units where target mode is desired. 95For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 96A value of 0x8a enables it for units 1, 3, and 7. 97.Pp 98Per target configuration performed in the 99.Tn SCSI-Select 100menu, accessible at boot 101in 102.No non- Ns Tn EISA 103models, 104or through an 105.Tn EISA 106configuration utility for 107.Tn EISA 108models, 109is honored by this driver. 110This includes synchronous/asynchronous transfers, 111maximum synchronous negotiation rate, 112wide transfers, 113disconnection, 114the host adapter's SCSI ID, 115and, 116in the case of 117.Tn EISA 118Twin Channel controllers, 119the primary channel selection. 120For systems that store non-volatile settings in a system specific manner 121rather than a serial eeprom directly connected to the aic7xxx controller, 122the 123.Tn BIOS 124must be enabled for the driver to access this information. 125This restriction applies to all 126.Tn EISA 127and many motherboard configurations. 128.Pp 129Note that I/O addresses are determined automatically by the probe routines, 130but care should be taken when using a 284x 131.Pq Tn VESA No local bus controller 132in an 133.Tn EISA 134system. 135The jumpers setting the I/O area for the 284x should match the 136.Tn EISA 137slot into which the card is inserted to prevent conflicts with other 138.Tn EISA 139cards. 140.Pp 141Performance and feature sets vary throughout the aic7xxx product line. 142The following table provides a comparison of the different chips supported 143by the 144.Nm 145driver. 146Note that wide and twin channel features, although always supported 147by a particular chip, may be disabled in a particular motherboard or card 148design. 149.Pp 150.Bd -ragged -offset indent 151.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 152.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 153aic7770 10 EISA/VL 10MHz 16Bit 4 1 154aic7850 10 PCI/32 10MHz 8Bit 3 155aic7860 10 PCI/32 20MHz 8Bit 3 156aic7870 10 PCI/32 10MHz 16Bit 16 157aic7880 10 PCI/32 20MHz 16Bit 16 158aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 159aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 160aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8 161aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 162aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 163aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 164aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 165aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8 166.El 167.Pp 168.Bl -enum -compact 169.It 170Multiplexed Twin Channel Device - One controller servicing two busses. 171.It 172Multi-function Twin Channel Device - Two controllers on one chip. 173.It 174Command Channel Secondary DMA Engine - Allows scatter gather list and 175SCB prefetch. 176.It 17764 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 178.It 179Block Move Instruction Support - Doubles the speed of certain sequencer 180operations. 181.It 182.Sq Bayonet 183style Scatter Gather Engine - Improves S/G prefetch performance. 184.It 185Queuing Registers - Allows queueing of new transactions without pausing the 186sequencer. 187.It 188Multiple Target IDs - Allows the controller to respond to selection as a 189target on multiple SCSI IDs. 190.El 191.Ed 192.Sh HARDWARE 193The 194.Nm 195driver supports the following 196.Tn SCSI 197host adapter chips and 198.Tn SCSI 199controller cards: 200.Pp 201.Bl -bullet -compact 202.It 203Adaptec 204.Tn AIC7770 205host adapter chip 206.It 207Adaptec 208.Tn AIC7850 209host adapter chip 210.It 211Adaptec 212.Tn AIC7860 213host adapter chip 214.It 215Adaptec 216.Tn AIC7870 217host adapter chip 218.It 219Adaptec 220.Tn AIC7880 221host adapter chip 222.It 223Adaptec 224.Tn AIC7890 225host adapter chip 226.It 227Adaptec 228.Tn AIC7891 229host adapter chip 230.It 231Adaptec 232.Tn AIC7892 233host adapter chip 234.It 235Adaptec 236.Tn AIC7895 237host adapter chip 238.It 239Adaptec 240.Tn AIC7896 241host adapter chip 242.It 243Adaptec 244.Tn AIC7897 245host adapter chip 246.It 247Adaptec 248.Tn AIC7899 249host adapter chip 250.It 251Adaptec 252.Tn 274X(W) 253.It 254Adaptec 255.Tn 274X(T) 256.It 257Adaptec 258.Tn 284X 259.It 260Adaptec 261.Tn 2910 262.It 263Adaptec 264.Tn 2915 265.It 266Adaptec 267.Tn 2920 268.It 269Adaptec 270.Tn 2930C 271.It 272Adaptec 273.Tn 2930U2 274.It 275Adaptec 276.Tn 2940 277.It 278Adaptec 279.Tn 2940J 280.It 281Adaptec 282.Tn 2940N 283.It 284Adaptec 285.Tn 2940U 286.It 287Adaptec 288.Tn 2940AU 289.It 290Adaptec 291.Tn 2940UW 292.It 293Adaptec 294.Tn 2940UW Dual 295.It 296Adaptec 297.Tn 2940UW Pro 298.It 299Adaptec 300.Tn 2940U2W 301.It 302Adaptec 303.Tn 2940U2B 304.It 305Adaptec 306.Tn 2950U2W 307.It 308Adaptec 309.Tn 2950U2B 310.It 311Adaptec 312.Tn 19160B 313.It 314Adaptec 315.Tn 29160B 316.It 317Adaptec 318.Tn 29160N 319.It 320Adaptec 321.Tn 3940 322.It 323Adaptec 324.Tn 3940U 325.It 326Adaptec 327.Tn 3940AU 328.It 329Adaptec 330.Tn 3940UW 331.It 332Adaptec 333.Tn 3940AUW 334.It 335Adaptec 336.Tn 3940U2W 337.It 338Adaptec 339.Tn 3950U2 340.It 341Adaptec 342.Tn 3960 343.It 344Adaptec 345.Tn 39160 346.It 347Adaptec 348.Tn 3985 349.It 350Adaptec 351.Tn 4944UW 352.It 353NEC PC-9821Xt13 (PC-98) 354.It 355NEC RvII26 (PC-98) 356.It 357NEC PC-9821X-B02L/B09 (PC-98) 358.It 359NEC SV-98/2-B03 (PC-98) 360.It 361Many motherboards with on-board 362.Tn SCSI 363support 364.El 365.Sh SCSI CONTROL BLOCKS (SCBs) 366Every transaction sent to a device on the SCSI bus is assigned a 367.Sq SCSI Control Block 368(SCB). 369The SCB contains all of the information required by the 370controller to process a transaction. 371The chip feature table lists 372the number of SCBs that can be stored in on-chip memory. 373All chips 374with model numbers greater than or equal to 7870 allow for the on chip 375SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 376Very few Adaptec controller configurations have external SRAM. 377.Pp 378If external SRAM is not available, SCBs are a limited resource. 379Using the SCBs in a straight forward manner would only allow the driver to 380handle as many concurrent transactions as there are physical SCBs. 381To fully utilize the SCSI bus and the devices on it, 382requires much more concurrency. 383The solution to this problem is 384.Em SCB Paging , 385a concept similar to memory paging. 386SCB paging takes advantage of 387the fact that devices usually disconnect from the SCSI bus for long 388periods of time without talking to the controller. 389The SCBs for disconnected transactions are only of use to the controller 390when the transfer is resumed. 391When the host queues another transaction 392for the controller to execute, the controller firmware will use a 393free SCB if one is available. 394Otherwise, the state of the most recently 395disconnected (and therefore most likely to stay disconnected) SCB is 396saved, via dma, to host memory, and the local SCB reused to start 397the new transaction. 398This allows the controller to queue up to 399255 transactions regardless of the amount of SCB space. 400Since the 401local SCB space serves as a cache for disconnected transactions, the 402more SCB space available, the less host bus traffic consumed saving 403and restoring SCB data. 404.Sh SEE ALSO 405.Xr aha 4 , 406.Xr ahb 4 , 407.Xr cd 4 , 408.Xr da 4 , 409.Xr sa 4 , 410.Xr scsi 4 411.Sh HISTORY 412The 413.Nm 414driver appeared in 415.Fx 2.0 . 416.Sh AUTHORS 417The 418.Nm 419driver, the 420.Tn AIC7xxx 421sequencer-code assembler, 422and the firmware running on the aic7xxx chips was written by 423.An Justin T. Gibbs . 424.Sh BUGS 425Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 426.Tn AIC7870 427Rev B in synchronous mode at 10MHz. 428Controllers with this problem have a 42942 MHz clock crystal on them and run slightly above 10MHz. 430This confuses the drive and hangs the bus. 431Setting a maximum synchronous negotiation rate of 8MHz in the 432.Tn SCSI-Select 433utility will allow normal operation. 434.Pp 435Although the Ultra2 and Ultra160 products have sufficient instruction 436ram space to support both the initiator and target roles concurrently, 437this configuration is disabled in favor of allowing the target role 438to respond on multiple target ids. 439A method for configuring dual role mode should be provided. 440.Pp 441Tagged Queuing is not supported in target mode. 442.Pp 443Reselection in target mode fails to function correctly on all high 444voltage differential boards as shipped by Adaptec. 445Information on 446how to modify HVD board to work correctly in target mode is available 447from Adaptec. 448