1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd February 15, 2017 28.Dt AHC 4 29.Os 30.Sh NAME 31.Nm ahc 32.Nd Adaptec VL/ISA/PCI SCSI host adapter driver 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device scbus" 39.Cd "device ahc" 40.Pp 41For one or more PCI cards: 42.Cd "device pci" 43.Ed 44.Pp 45Alternatively, to load the driver as a 46module at boot time, place the following lines in 47.Xr loader.conf 5 : 48.Bd -literal -offset indent 49ahc_load="YES" 50ahc_isa_load="YES" 51ahc_pci_load="YES" 52.Ed 53.Sh DESCRIPTION 54This driver provides access to the 55.Tn SCSI 56bus(es) connected to the Adaptec AIC77xx and AIC78xx 57host adapter chips. 58.Pp 59Driver features include support for twin and wide busses, 60fast, ultra or ultra2 synchronous transfers depending on controller type, 61tagged queueing, SCB paging, and target mode. 62.Pp 63Per target configuration performed in the 64.Tn SCSI-Select 65menu, accessible at boot 66is honored by this driver. 67This includes synchronous/asynchronous transfers, 68maximum synchronous negotiation rate, 69wide transfers, 70disconnection, 71the host adapter's SCSI ID. 72For systems that store non-volatile settings in a system specific manner 73rather than a serial eeprom directly connected to the aic7xxx controller, 74the 75.Tn BIOS 76must be enabled for the driver to access this information. 77This restriction applies to 78many chip-down motherboard configurations. 79.Pp 80Performance and feature sets vary throughout the aic7xxx product line. 81The following table provides a comparison of the different chips supported 82by the 83.Nm 84driver. 85Note that wide and twin channel features, although always supported 86by a particular chip, may be disabled in a particular motherboard or card 87design. 88.Bd -ragged -offset indent 89.Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X" 90.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features" 91.It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1" 92.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta "" 93.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta "" 94.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta "" 95.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "" 96.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 97.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 98.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 99.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5" 100.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8" 101.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 102.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 103.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 104.El 105.Pp 106.Bl -enum -compact 107.It 108Multiplexed Twin Channel Device - One controller servicing two busses. 109.It 110Multi-function Twin Channel Device - Two controllers on one chip. 111.It 112Command Channel Secondary DMA Engine - Allows scatter gather list and 113SCB prefetch. 114.It 11564 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 116.It 117Block Move Instruction Support - Doubles the speed of certain sequencer 118operations. 119.It 120.Sq Bayonet 121style Scatter Gather Engine - Improves S/G prefetch performance. 122.It 123Queuing Registers - Allows queueing of new transactions without pausing the 124sequencer. 125.It 126Multiple Target IDs - Allows the controller to respond to selection as a 127target on multiple SCSI IDs. 128.El 129.Ed 130.Sh CONFIGURATION OPTIONS 131.Pp 132To allow PCI adapters to use memory mapped I/O if enabled: 133.Pp 134.Cd options AHC_ALLOW_MEMIO=(0 -- disabled, 1 -- enabled) 135.Bd -ragged -offset indent 136Memory mapped I/O is more efficient than the alternative, programmed I/O. 137Most PCI BIOSes will map devices so that either technique for communicating 138with the card is available. In some cases, usually when the PCI device is 139sitting behind a PCI->PCI bridge, the BIOS may fail to properly initialize 140the chip for memory mapped I/O. The typical symptom of this problem is a 141system hang if memory mapped I/O is attempted. 142.Pp 143Most modern motherboards perform the initialization correctly and work fine 144with this option enabled and it is the default. This option can also be 145dynamically configued through a device hint documented below. 146.Ed 147.Pp 148To statically configure one or more controllers to assume the target role: 149.Pp 150.Cd options AHC_TMODE_ENABLE=<bitmask of units> 151.Bd -ragged -offset indent 152The value assigned to this option should be a bitmap of all units where target 153mode is desired. For example, a value of 0x25, would enable target mode on 154units 0, 2, and 5. A value of 0x8a enables it for units 1, 3, and 7. 155.Pp 156Note that controllers can be dynamically configured through a device hint 157documented below. 158.Ed 159.Sh BOOT OPTIONS 160The following options are switchable by setting values in 161.Pa /boot/device.hints . 162.Pp 163They are: 164.Bl -tag -width indent 165.It Va hint.ahc. Ns Ar N Ns Va .tmode_enable 166A hint to define whether the SCSI target mode is enabled, defaults to disabled 167(0 -- disabled, 1 -- enabled). 168.It Va hint.ahc. Ns Ar N Ns Va .allow_memio 169A hint to define whether memory mapped io is enabled or disabled for this 170adapter, defaults to enabled (0 -- disabled, 1 -- enabled). 171.El 172.Sh HARDWARE 173The 174.Nm 175driver supports the following 176.Tn SCSI 177host adapter chips and 178.Tn SCSI 179controller cards: 180.Pp 181.Bl -bullet -compact 182.It 183Adaptec 184.Tn AIC7770 185host adapter chip 186.It 187Adaptec 188.Tn AIC7850 189host adapter chip 190.It 191Adaptec 192.Tn AIC7860 193host adapter chip 194.It 195Adaptec 196.Tn AIC7870 197host adapter chip 198.It 199Adaptec 200.Tn AIC7880 201host adapter chip 202.It 203Adaptec 204.Tn AIC7890 205host adapter chip 206.It 207Adaptec 208.Tn AIC7891 209host adapter chip 210.It 211Adaptec 212.Tn AIC7892 213host adapter chip 214.It 215Adaptec 216.Tn AIC7895 217host adapter chip 218.It 219Adaptec 220.Tn AIC7896 221host adapter chip 222.It 223Adaptec 224.Tn AIC7897 225host adapter chip 226.It 227Adaptec 228.Tn AIC7899 229host adapter chip 230.It 231Adaptec 232.Tn 274X(W) 233.It 234Adaptec 235.Tn 274X(T) 236.It 237Adaptec 238.Tn 2910 239.It 240Adaptec 241.Tn 2915 242.It 243Adaptec 244.Tn 2920C 245.It 246Adaptec 247.Tn 2930C 248.It 249Adaptec 250.Tn 2930U2 251.It 252Adaptec 253.Tn 2940 254.It 255Adaptec 256.Tn 2940J 257.It 258Adaptec 259.Tn 2940N 260.It 261Adaptec 262.Tn 2940U 263.It 264Adaptec 265.Tn 2940AU 266.It 267Adaptec 268.Tn 2940UW 269.It 270Adaptec 271.Tn 2940UW Dual 272.It 273Adaptec 274.Tn 2940UW Pro 275.It 276Adaptec 277.Tn 2940U2W 278.It 279Adaptec 280.Tn 2940U2B 281.It 282Adaptec 283.Tn 2950U2W 284.It 285Adaptec 286.Tn 2950U2B 287.It 288Adaptec 289.Tn 19160B 290.It 291Adaptec 292.Tn 29160B 293.It 294Adaptec 295.Tn 29160N 296.It 297Adaptec 298.Tn 3940 299.It 300Adaptec 301.Tn 3940U 302.It 303Adaptec 304.Tn 3940AU 305.It 306Adaptec 307.Tn 3940UW 308.It 309Adaptec 310.Tn 3940AUW 311.It 312Adaptec 313.Tn 3940U2W 314.It 315Adaptec 316.Tn 3950U2 317.It 318Adaptec 319.Tn 3960 320.It 321Adaptec 322.Tn 39160 323.It 324Adaptec 325.Tn 3985 326.It 327Adaptec 328.Tn 4944UW 329.It 330Many motherboards with on-board 331.Tn SCSI 332support 333.El 334.Sh SCSI CONTROL BLOCKS (SCBs) 335Every transaction sent to a device on the SCSI bus is assigned a 336.Sq SCSI Control Block 337(SCB). 338The SCB contains all of the information required by the 339controller to process a transaction. 340The chip feature table lists 341the number of SCBs that can be stored in on-chip memory. 342All chips 343with model numbers greater than or equal to 7870 allow for the on chip 344SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 345Very few Adaptec controller configurations have external SRAM. 346.Pp 347If external SRAM is not available, SCBs are a limited resource. 348Using the SCBs in a straight forward manner would only allow the driver to 349handle as many concurrent transactions as there are physical SCBs. 350To fully utilize the SCSI bus and the devices on it, 351requires much more concurrency. 352The solution to this problem is 353.Em SCB Paging , 354a concept similar to memory paging. 355SCB paging takes advantage of 356the fact that devices usually disconnect from the SCSI bus for long 357periods of time without talking to the controller. 358The SCBs for disconnected transactions are only of use to the controller 359when the transfer is resumed. 360When the host queues another transaction 361for the controller to execute, the controller firmware will use a 362free SCB if one is available. 363Otherwise, the state of the most recently 364disconnected (and therefore most likely to stay disconnected) SCB is 365saved, via dma, to host memory, and the local SCB reused to start 366the new transaction. 367This allows the controller to queue up to 368255 transactions regardless of the amount of SCB space. 369Since the 370local SCB space serves as a cache for disconnected transactions, the 371more SCB space available, the less host bus traffic consumed saving 372and restoring SCB data. 373.Sh SEE ALSO 374.Xr ahd 4 , 375.Xr cd 4 , 376.Xr da 4 , 377.Xr sa 4 , 378.Xr scsi 4 379.Sh HISTORY 380The 381.Nm 382driver appeared in 383.Fx 2.0 . 384.Sh AUTHORS 385The 386.Nm 387driver, the 388.Tn AIC7xxx 389sequencer-code assembler, 390and the firmware running on the aic7xxx chips was written by 391.An Justin T. Gibbs . 392.Sh BUGS 393Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 394.Tn AIC7870 395Rev B in synchronous mode at 10MHz. 396Controllers with this problem have a 39742 MHz clock crystal on them and run slightly above 10MHz. 398This confuses the drive and hangs the bus. 399Setting a maximum synchronous negotiation rate of 8MHz in the 400.Tn SCSI-Select 401utility will allow normal operation. 402.Pp 403Although the Ultra2 and Ultra160 products have sufficient instruction 404ram space to support both the initiator and target roles concurrently, 405this configuration is disabled in favor of allowing the target role 406to respond on multiple target ids. 407A method for configuring dual role mode should be provided. 408.Pp 409Tagged Queuing is not supported in target mode. 410.Pp 411Reselection in target mode fails to function correctly on all high 412voltage differential boards as shipped by Adaptec. 413Information on 414how to modify HVD board to work correctly in target mode is available 415from Adaptec. 416