1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd February 15, 2017 28.Dt AHC 4 29.Os 30.Sh NAME 31.Nm ahc 32.Nd Adaptec VL/ISA/PCI SCSI host adapter driver 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device scbus" 39.Cd "device ahc" 40.Pp 41For one or more PCI cards: 42.Cd "device pci" 43.Ed 44.Pp 45Alternatively, to load the driver as a 46module at boot time, place the following lines in 47.Xr loader.conf 5 : 48.Bd -literal -offset indent 49ahc_load="YES" 50ahc_isa_load="YES" 51ahc_pci_load="YES" 52.Ed 53.Sh DESCRIPTION 54This driver provides access to the 55.Tn SCSI 56bus(es) connected to the Adaptec AIC77xx and AIC78xx 57host adapter chips. 58.Pp 59Driver features include support for twin and wide busses, 60fast, ultra or ultra2 synchronous transfers depending on controller type, 61tagged queueing, SCB paging, and target mode. 62.Pp 63Per target configuration performed in the 64.Tn SCSI-Select 65menu, accessible at boot 66is honored by this driver. 67This includes synchronous/asynchronous transfers, 68maximum synchronous negotiation rate, 69wide transfers, 70disconnection, 71the host adapter's SCSI ID. 72For systems that store non-volatile settings in a system specific manner 73rather than a serial eeprom directly connected to the aic7xxx controller, 74the 75.Tn BIOS 76must be enabled for the driver to access this information. 77This restriction applies to 78many chip-down motherboard configurations. 79.Pp 80Performance and feature sets vary throughout the aic7xxx product line. 81The following table provides a comparison of the different chips supported 82by the 83.Nm 84driver. 85Note that wide and twin channel features, although always supported 86by a particular chip, may be disabled in a particular motherboard or card 87design. 88.Bd -ragged -offset indent 89.Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X" 90.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features" 91.It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1" 92.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta "" 93.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta "" 94.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta "" 95.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "" 96.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 97.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 98.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 99.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5" 100.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8" 101.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 102.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 103.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 104.El 105.Pp 106.Bl -enum -compact 107.It 108Multiplexed Twin Channel Device - One controller servicing two busses. 109.It 110Multi-function Twin Channel Device - Two controllers on one chip. 111.It 112Command Channel Secondary DMA Engine - Allows scatter gather list and 113SCB prefetch. 114.It 11564 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 116.It 117Block Move Instruction Support - Doubles the speed of certain sequencer 118operations. 119.It 120.Sq Bayonet 121style Scatter Gather Engine - Improves S/G prefetch performance. 122.It 123Queuing Registers - Allows queueing of new transactions without pausing the 124sequencer. 125.It 126Multiple Target IDs - Allows the controller to respond to selection as a 127target on multiple SCSI IDs. 128.El 129.Ed 130.Sh CONFIGURATION OPTIONS 131.Pp 132To allow PCI adapters to use memory mapped I/O if enabled: 133.Pp 134.Cd options AHC_ALLOW_MEMIO=(0 -- disabled, 1 -- enabled) 135.Bd -ragged -offset indent 136Memory mapped I/O is more efficient than the alternative, programmed I/O. 137Most PCI BIOSes will map devices so that either technique for communicating 138with the card is available. In some cases, usually when the PCI device is 139sitting behind a PCI->PCI bridge, the BIOS may fail to properly initialize 140the chip for memory mapped I/O. The typical symptom of this problem is a 141system hang if memory mapped I/O is attempted. 142.Pp 143Most modern motherboards perform the initialization correctly and work fine 144with this option enabled and it is the default. This option can also be 145dynamically configued through a device hint documented below. 146.Ed 147.Pp 148To statically configure one or more controllers to assume the target role: 149.Pp 150.Cd options AHC_TMODE_ENABLE=<bitmask of units> 151.Bd -ragged -offset indent 152The value assigned to this option should be a bitmap of all units where target 153mode is desired. For example, a value of 0x25, would enable target mode on 154units 0, 2, and 5. A value of 0x8a enables it for units 1, 3, and 7. 155.Pp 156Note that controllers can be dynamically configured through a device hint 157documented below. 158.El 159.Ed 160.Sh BOOT OPTIONS 161The following options are switchable by setting values in 162.Pa /boot/device.hints . 163.Pp 164They are: 165.Bl -tag -width indent 166.It Va hint.ahc. Ns Ar N Ns Va .tmode_enable 167A hint to define whether the SCSI target mode is enabled, defaults to disabled 168(0 -- disabled, 1 -- enabled). 169.It Va hint.ahc. Ns Ar N Ns Va .allow_memio 170A hint to define whether memory mapped io is enabled or disabled for this 171adapter, defaults to enabled (0 -- disabled, 1 -- enabled). 172.El 173.Ed 174.Sh HARDWARE 175The 176.Nm 177driver supports the following 178.Tn SCSI 179host adapter chips and 180.Tn SCSI 181controller cards: 182.Pp 183.Bl -bullet -compact 184.It 185Adaptec 186.Tn AIC7770 187host adapter chip 188.It 189Adaptec 190.Tn AIC7850 191host adapter chip 192.It 193Adaptec 194.Tn AIC7860 195host adapter chip 196.It 197Adaptec 198.Tn AIC7870 199host adapter chip 200.It 201Adaptec 202.Tn AIC7880 203host adapter chip 204.It 205Adaptec 206.Tn AIC7890 207host adapter chip 208.It 209Adaptec 210.Tn AIC7891 211host adapter chip 212.It 213Adaptec 214.Tn AIC7892 215host adapter chip 216.It 217Adaptec 218.Tn AIC7895 219host adapter chip 220.It 221Adaptec 222.Tn AIC7896 223host adapter chip 224.It 225Adaptec 226.Tn AIC7897 227host adapter chip 228.It 229Adaptec 230.Tn AIC7899 231host adapter chip 232.It 233Adaptec 234.Tn 274X(W) 235.It 236Adaptec 237.Tn 274X(T) 238.It 239Adaptec 240.Tn 2910 241.It 242Adaptec 243.Tn 2915 244.It 245Adaptec 246.Tn 2920C 247.It 248Adaptec 249.Tn 2930C 250.It 251Adaptec 252.Tn 2930U2 253.It 254Adaptec 255.Tn 2940 256.It 257Adaptec 258.Tn 2940J 259.It 260Adaptec 261.Tn 2940N 262.It 263Adaptec 264.Tn 2940U 265.It 266Adaptec 267.Tn 2940AU 268.It 269Adaptec 270.Tn 2940UW 271.It 272Adaptec 273.Tn 2940UW Dual 274.It 275Adaptec 276.Tn 2940UW Pro 277.It 278Adaptec 279.Tn 2940U2W 280.It 281Adaptec 282.Tn 2940U2B 283.It 284Adaptec 285.Tn 2950U2W 286.It 287Adaptec 288.Tn 2950U2B 289.It 290Adaptec 291.Tn 19160B 292.It 293Adaptec 294.Tn 29160B 295.It 296Adaptec 297.Tn 29160N 298.It 299Adaptec 300.Tn 3940 301.It 302Adaptec 303.Tn 3940U 304.It 305Adaptec 306.Tn 3940AU 307.It 308Adaptec 309.Tn 3940UW 310.It 311Adaptec 312.Tn 3940AUW 313.It 314Adaptec 315.Tn 3940U2W 316.It 317Adaptec 318.Tn 3950U2 319.It 320Adaptec 321.Tn 3960 322.It 323Adaptec 324.Tn 39160 325.It 326Adaptec 327.Tn 3985 328.It 329Adaptec 330.Tn 4944UW 331.It 332Many motherboards with on-board 333.Tn SCSI 334support 335.El 336.Sh SCSI CONTROL BLOCKS (SCBs) 337Every transaction sent to a device on the SCSI bus is assigned a 338.Sq SCSI Control Block 339(SCB). 340The SCB contains all of the information required by the 341controller to process a transaction. 342The chip feature table lists 343the number of SCBs that can be stored in on-chip memory. 344All chips 345with model numbers greater than or equal to 7870 allow for the on chip 346SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 347Very few Adaptec controller configurations have external SRAM. 348.Pp 349If external SRAM is not available, SCBs are a limited resource. 350Using the SCBs in a straight forward manner would only allow the driver to 351handle as many concurrent transactions as there are physical SCBs. 352To fully utilize the SCSI bus and the devices on it, 353requires much more concurrency. 354The solution to this problem is 355.Em SCB Paging , 356a concept similar to memory paging. 357SCB paging takes advantage of 358the fact that devices usually disconnect from the SCSI bus for long 359periods of time without talking to the controller. 360The SCBs for disconnected transactions are only of use to the controller 361when the transfer is resumed. 362When the host queues another transaction 363for the controller to execute, the controller firmware will use a 364free SCB if one is available. 365Otherwise, the state of the most recently 366disconnected (and therefore most likely to stay disconnected) SCB is 367saved, via dma, to host memory, and the local SCB reused to start 368the new transaction. 369This allows the controller to queue up to 370255 transactions regardless of the amount of SCB space. 371Since the 372local SCB space serves as a cache for disconnected transactions, the 373more SCB space available, the less host bus traffic consumed saving 374and restoring SCB data. 375.Sh SEE ALSO 376.Xr ahd 4 , 377.Xr cd 4 , 378.Xr da 4 , 379.Xr sa 4 , 380.Xr scsi 4 381.Sh HISTORY 382The 383.Nm 384driver appeared in 385.Fx 2.0 . 386.Sh AUTHORS 387The 388.Nm 389driver, the 390.Tn AIC7xxx 391sequencer-code assembler, 392and the firmware running on the aic7xxx chips was written by 393.An Justin T. Gibbs . 394.Sh BUGS 395Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 396.Tn AIC7870 397Rev B in synchronous mode at 10MHz. 398Controllers with this problem have a 39942 MHz clock crystal on them and run slightly above 10MHz. 400This confuses the drive and hangs the bus. 401Setting a maximum synchronous negotiation rate of 8MHz in the 402.Tn SCSI-Select 403utility will allow normal operation. 404.Pp 405Although the Ultra2 and Ultra160 products have sufficient instruction 406ram space to support both the initiator and target roles concurrently, 407this configuration is disabled in favor of allowing the target role 408to respond on multiple target ids. 409A method for configuring dual role mode should be provided. 410.Pp 411Tagged Queuing is not supported in target mode. 412.Pp 413Reselection in target mode fails to function correctly on all high 414voltage differential boards as shipped by Adaptec. 415Information on 416how to modify HVD board to work correctly in target mode is available 417from Adaptec. 418