1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.\" $FreeBSD$ 28.\" 29.Dd July 4, 2004 30.Dt AHC 4 31.Os 32.Sh NAME 33.Nm ahc 34.Nd Adaptec VL/EISA/PCI SCSI host adapter driver 35.Sh SYNOPSIS 36For one or more VL/EISA cards: 37.Cd device eisa 38.Cd device ahc 39.Pp 40For one or more PCI cards: 41.Cd device pci 42.Cd device ahc 43.Pp 44To allow PCI adapters to use memory mapped I/O if enabled: 45.Cd options AHC_ALLOW_MEMIO 46.Pp 47To configure one or more controllers to assume the target role: 48.Cd options AHC_TMODE_ENABLE <bitmask of units> 49.Pp 50For one or more SCSI busses: 51.Cd device scbus 52.Sh DESCRIPTION 53This driver provides access to the 54.Tn SCSI 55bus(es) connected to the Adaptec AIC77xx and AIC78xx 56host adapter chips. 57.Pp 58Driver features include support for twin and wide busses, 59fast, ultra or ultra2 synchronous transfers depending on controller type, 60tagged queueing, SCB paging, and target mode. 61.Pp 62Memory mapped I/O can be enabled for PCI devices with the 63.Dq Dv AHC_ALLOW_MEMIO 64configuration option. 65Memory mapped I/O is more efficient than the alternative, programmed I/O. 66Most PCI BIOSes will map devices so that either technique for communicating 67with the card is available. 68In some cases, 69usually when the PCI device is sitting behind a PCI->PCI bridge, 70the BIOS may fail to properly initialize the chip for memory mapped I/O. 71The typical symptom of this problem is a system hang if memory mapped I/O 72is attempted. 73Most modern motherboards perform the initialization correctly and work fine 74with this option enabled. 75.Pp 76Individual controllers may be configured to operate in the target role 77through the 78.Dq Dv AHC_TMODE_ENABLE 79configuration option. 80The value assigned to this option should be a bitmap 81of all units where target mode is desired. 82For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 83A value of 0x8a enables it for units 1, 3, and 7. 84.Pp 85Per target configuration performed in the 86.Tn SCSI-Select 87menu, accessible at boot 88in 89.No non- Ns Tn EISA 90models, 91or through an 92.Tn EISA 93configuration utility for 94.Tn EISA 95models, 96is honored by this driver. 97This includes synchronous/asynchronous transfers, 98maximum synchronous negotiation rate, 99wide transfers, 100disconnection, 101the host adapter's SCSI ID, 102and, 103in the case of 104.Tn EISA 105Twin Channel controllers, 106the primary channel selection. 107For systems that store non-volatile settings in a system specific manner 108rather than a serial eeprom directly connected to the aic7xxx controller, 109the 110.Tn BIOS 111must be enabled for the driver to access this information. 112This restriction applies to all 113.Tn EISA 114and many motherboard configurations. 115.Pp 116Note that I/O addresses are determined automatically by the probe routines, 117but care should be taken when using a 284x 118.Pq Tn VESA No local bus controller 119in an 120.Tn EISA 121system. 122The jumpers setting the I/O area for the 284x should match the 123.Tn EISA 124slot into which the card is inserted to prevent conflicts with other 125.Tn EISA 126cards. 127.Pp 128Performance and feature sets vary throughout the aic7xxx product line. 129The following table provides a comparison of the different chips supported 130by the 131.Nm 132driver. 133Note that wide and twin channel features, although always supported 134by a particular chip, may be disabled in a particular motherboard or card 135design. 136.Pp 137.Bd -ragged -offset indent 138.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 139.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 140aic7770 10 EISA/VL 10MHz 16Bit 4 1 141aic7850 10 PCI/32 10MHz 8Bit 3 142aic7860 10 PCI/32 20MHz 8Bit 3 143aic7870 10 PCI/32 10MHz 16Bit 16 144aic7880 10 PCI/32 20MHz 16Bit 16 145aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8 146aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8 147aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8 148aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 149aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8 150aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8 151aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8 152aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8 153.El 154.Pp 155.Bl -enum -compact 156.It 157Multiplexed Twin Channel Device - One controller servicing two busses. 158.It 159Multi-function Twin Channel Device - Two controllers on one chip. 160.It 161Command Channel Secondary DMA Engine - Allows scatter gather list and 162SCB prefetch. 163.It 16464 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 165.It 166Block Move Instruction Support - Doubles the speed of certain sequencer 167operations. 168.It 169.Sq Bayonet 170style Scatter Gather Engine - Improves S/G prefetch performance. 171.It 172Queuing Registers - Allows queueing of new transactions without pausing the 173sequencer. 174.It 175Multiple Target IDs - Allows the controller to respond to selection as a 176target on multiple SCSI IDs. 177.El 178.Ed 179.Sh HARDWARE 180The 181.Nm 182driver supports the following 183.Tn SCSI 184host adapter chips and 185.Tn SCSI 186controller cards: 187.Pp 188.Bl -bullet -compact 189.It 190Adaptec 191.Tn AIC7770 192host adapter chip 193.It 194Adaptec 195.Tn AIC7850 196host adapter chip 197.It 198Adaptec 199.Tn AIC7860 200host adapter chip 201.It 202Adaptec 203.Tn AIC7870 204host adapter chip 205.It 206Adaptec 207.Tn AIC7880 208host adapter chip 209.It 210Adaptec 211.Tn AIC7890 212host adapter chip 213.It 214Adaptec 215.Tn AIC7891 216host adapter chip 217.It 218Adaptec 219.Tn AIC7892 220host adapter chip 221.It 222Adaptec 223.Tn AIC7895 224host adapter chip 225.It 226Adaptec 227.Tn AIC7896 228host adapter chip 229.It 230Adaptec 231.Tn AIC7897 232host adapter chip 233.It 234Adaptec 235.Tn AIC7899 236host adapter chip 237.It 238Adaptec 239.Tn 274X(W) 240.It 241Adaptec 242.Tn 274X(T) 243.It 244Adaptec 245.Tn 284X 246.It 247Adaptec 248.Tn 2910 249.It 250Adaptec 251.Tn 2915 252.It 253Adaptec 254.Tn 2920 255.It 256Adaptec 257.Tn 2930C 258.It 259Adaptec 260.Tn 2930U2 261.It 262Adaptec 263.Tn 2940 264.It 265Adaptec 266.Tn 2940J 267.It 268Adaptec 269.Tn 2940N 270.It 271Adaptec 272.Tn 2940U 273.It 274Adaptec 275.Tn 2940AU 276.It 277Adaptec 278.Tn 2940UW 279.It 280Adaptec 281.Tn 2940UW Dual 282.It 283Adaptec 284.Tn 2940UW Pro 285.It 286Adaptec 287.Tn 2940U2W 288.It 289Adaptec 290.Tn 2940U2B 291.It 292Adaptec 293.Tn 2950U2W 294.It 295Adaptec 296.Tn 2950U2B 297.It 298Adaptec 299.Tn 19160B 300.It 301Adaptec 302.Tn 29160B 303.It 304Adaptec 305.Tn 29160N 306.It 307Adaptec 308.Tn 3940 309.It 310Adaptec 311.Tn 3940U 312.It 313Adaptec 314.Tn 3940AU 315.It 316Adaptec 317.Tn 3940UW 318.It 319Adaptec 320.Tn 3940AUW 321.It 322Adaptec 323.Tn 3940U2W 324.It 325Adaptec 326.Tn 3950U2 327.It 328Adaptec 329.Tn 3960 330.It 331Adaptec 332.Tn 39160 333.It 334Adaptec 335.Tn 3985 336.It 337Adaptec 338.Tn 4944UW 339.It 340NEC PC-9821Xt13 (PC-98) 341.It 342NEC RvII26 (PC-98) 343.It 344NEC PC-9821X-B02L/B09 (PC-98) 345.It 346NEC SV-98/2-B03 (PC-98) 347.It 348Many motherboards with on-board 349.Tn SCSI 350support 351.El 352.Sh SCSI CONTROL BLOCKS (SCBs) 353Every transaction sent to a device on the SCSI bus is assigned a 354.Sq SCSI Control Block 355(SCB). 356The SCB contains all of the information required by the 357controller to process a transaction. 358The chip feature table lists 359the number of SCBs that can be stored in on-chip memory. 360All chips 361with model numbers greater than or equal to 7870 allow for the on chip 362SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 363Very few Adaptec controller configurations have external SRAM. 364.Pp 365If external SRAM is not available, SCBs are a limited resource. 366Using the SCBs in a straight forward manner would only allow the driver to 367handle as many concurrent transactions as there are physical SCBs. 368To fully utilize the SCSI bus and the devices on it, 369requires much more concurrency. 370The solution to this problem is 371.Em SCB Paging , 372a concept similar to memory paging. 373SCB paging takes advantage of 374the fact that devices usually disconnect from the SCSI bus for long 375periods of time without talking to the controller. 376The SCBs for disconnected transactions are only of use to the controller 377when the transfer is resumed. 378When the host queues another transaction 379for the controller to execute, the controller firmware will use a 380free SCB if one is available. 381Otherwise, the state of the most recently 382disconnected (and therefore most likely to stay disconnected) SCB is 383saved, via dma, to host memory, and the local SCB reused to start 384the new transaction. 385This allows the controller to queue up to 386255 transactions regardless of the amount of SCB space. 387Since the 388local SCB space serves as a cache for disconnected transactions, the 389more SCB space available, the less host bus traffic consumed saving 390and restoring SCB data. 391.Sh BUGS 392Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 393.Tn AIC7870 394Rev B in synchronous mode at 10MHz. 395Controllers with this problem have a 39642 MHz clock crystal on them and run slightly above 10MHz. 397This confuses the drive and hangs the bus. 398Setting a maximum synchronous negotiation rate of 8MHz in the 399.Tn SCSI-Select 400utility will allow normal operation. 401.Pp 402Although the Ultra2 and Ultra160 products have sufficient instruction 403ram space to support both the initiator and target roles concurrently, 404this configuration is disabled in favor of allowing the target role 405to respond on multiple target ids. 406A method for configuring dual role mode should be provided. 407.Pp 408Tagged Queuing is not supported in target mode. 409.Pp 410Reselection in target mode fails to function correctly on all high 411voltage differential boards as shipped by Adaptec. 412Information on 413how to modify HVD board to work correctly in target mode is available 414from Adaptec. 415.Sh SEE ALSO 416.Xr aha 4 , 417.Xr ahb 4 , 418.Xr cd 4 , 419.Xr da 4 , 420.Xr sa 4 , 421.Xr scsi 4 422.Sh AUTHORS 423The 424.Nm 425driver, the 426.Tn AIC7xxx 427sequencer-code assembler, 428and the firmware running on the aic7xxx chips was written by 429.An Justin T. Gibbs . 430.Sh HISTORY 431The 432.Nm 433driver appeared in 434.Fx 2.0 . 435