1.\" 2.\" Copyright (c) 1995, 1996, 1997 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software withough specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.\" 28.Dd April 20, 1996 29.Dt AHC 4 i386 30.Os FreeBSD 31.Sh NAME 32.Nm ahc 33.Nd Adaptec VL/EISA/PCI SCSI host adapter driver 34.Sh SYNOPSIS 35For one or more VL/EISA cards: 36.Cd controller eisa0 37.Cd controller ahc0 38.Pp 39For one or more PCI cards: 40.Cd controller pci0 41.Cd controller ahc0 42.Pp 43To enable SCB paging: 44.Cd options AHC_SCBPAGING_ENABLE 45.Pp 46To enable tagged queueing: 47.Cd options AHC_TAGENABLE 48.Pp 49To allow PCI adapters to use memory mapped I/O if enabled: 50.Cd options AHC_ALLOW_MEMIO 51.Pp 52For one or more SCSI busses: 53.Cd controller scbus0 at ahc0 54.Sh DESCRIPTION 55This driver provides access to the 56.Tn SCSI 57bus(es) connected to Adaptec 58274x, 284x, 2940, 3940, or controllers based on the 59.Tn AIC7770, 60.Tn AIC7850, 61.Tn AIC7860, 62.Tn AIC7870, 63or 64.Tn AIC7880 65host adapter chips. 66Features include support for twin and wide busses, 67ultra 68.Tn SCSI, 69two active commands at a time per non-tagged queueing target, 70tagged queuing, 71and SCB paging. 72.Pp 73The number of concurrent transactions allowed is chip dependent 74and ranges from 3 to 16. 75On PCI adapters, 76this number can be increased with the SCB paging option. 77SCB paging implements an algorithm to 'page-out' transactions 78that are in the disconnected state so that the freed space in 79the controller's memory can be used to start additional transactions. 80On the aic7880 and aic7870, 81this increases the maximum number of outstanding transactions from 16 to 255. 82On the aic7850 and aic7860 controllers, this maximum rises from 3 to 8. 83During the hardware probe, 84a diagnostic showing the ratio of hardware supported 'slots' to number 85of transactions is printed. 86SCB paging is enabled with the 87.Dq Dv AHC_SCBPAGING_ENABLE 88configuration option. 89This option will likely be removed and become the default behavior for 90adapters that support it, 91in the near future. 92.Pp 93Tagged queueing is enabled with the 94.Dq Dv AHC_TAGENABLE 95configuration option. 96Tagged queueing allows multiple transactions to be queued at the device 97level instead of the host level, 98allowing the device to re-order I/O to minimize seeks, 99seek distance, 100and to increase throughput. 101Tagged queueing can have a significant impact on performance for seek 102bound applications and should be enabled for most configurations. 103Unfortunantly, some devices that claim to support tagged queueing fail 104miserable when it is used. 105The only reason tagged queueing remains as a controller option is as a 106stop gap measure until a mechanism to detect these broken devices and to 107control this feature on a per device basis is in place. 108.Pp 109Memory mapped I/O can be enabled with the 110.Dq Dv AHC_ALLOW_MEMIO 111configuration option. 112Memory mapped I/O is more efficient than the alternative, programmed I/O. 113Most PCI BIOSes will map devices so that either technique for communicating 114with the card is availible. 115In some cases, 116usually when the PCI device is sitting behind a PCI->PCI bridge, 117the BIOS fails to properly initialize the chip for memory mapped I/O. 118The symptom of this problem is usually a system hang if memory mapped I/O 119is attempted. 120Most modern motherboards perform the initialization correctly and work fine 121with this option enabled. 122.Pp 123Per target configuration performed in the 124.Tn SCSI-Select 125menu, accesible at boot 126in 127.No non- Ns Tn EISA 128models, 129or through an 130.Tn EISA 131configuration utility for 132.Tn EISA 133models, 134is honored by this driver with the stipulation that the 135.Tn BIOS 136must be enabled for 137.Tn EISA 138adaptors. This includes synchronous/asynchronous transfers, 139maximum synchronous negotiation rate, 140disconnection, 141and the host adapter's SCSI ID. 142.Pp 143Note that I/O addresses are determined automatically by the probe routines, 144but care should be taken when using a 284x 145.Pq Tn VESA No local bus controller 146in an 147.Tn EISA 148system. Ensure that the jumpers setting the I/O area for the 284x match the 149.Tn EISA 150slot into which the card is inserted to prevent conflicts with other 151.Tn EISA 152cards. 153.Sh BUGS 154Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 155.Tn AIC7870 156Rev B in synchronous mode at 10MHz. Controllers with this problem have a 15742 MHz clock crystal on them and run slightly above 10MHz. This causes the 158drive much confusion. Setting a maximum synchronous negotiation rate of 8MHz 159in the 160.Tn SCSI-Select 161utility 162will allow normal function. 163.Sh SEE ALSO 164.Xr aha 4 , 165.Xr ahb 4 , 166.Xr cd 4 , 167.Xr scsi 4 , 168.Xr sd 4 , 169.Xr st 4 170.Sh AUTHOR 171The 172.Nm 173driver was written by Justin Gibbs. The 174.Tn AIC7xxx 175sequencer-code assembler was 176written by John Aycock. 177.Sh HISTORY 178The 179.Nm 180driver appeared in 181.Fx 2.1 . 182