1.\" 2.\" Copyright (c) 1995, 1996, 1997, 1998, 2000 3.\" Justin T. Gibbs. All rights reserved. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 3. The name of the author may not be used to endorse or promote products 14.\" derived from this software without specific prior written permission. 15.\" 16.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd February 15, 2017 28.Dt AHC 4 29.Os 30.Sh NAME 31.Nm ahc 32.Nd Adaptec VL/ISA/PCI SCSI host adapter driver 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device scbus" 39.Cd "device ahc" 40.Pp 41For one or more PCI cards: 42.Cd "device pci" 43.Pp 44To allow PCI adapters to use memory mapped I/O if enabled: 45.Cd options AHC_ALLOW_MEMIO 46.Pp 47To configure one or more controllers to assume the target role: 48.Cd options AHC_TMODE_ENABLE <bitmask of units> 49.Ed 50.Pp 51Alternatively, to load the driver as a 52module at boot time, place the following lines in 53.Xr loader.conf 5 : 54.Bd -literal -offset indent 55ahc_load="YES" 56ahc_isa_load="YES" 57ahc_pci_load="YES" 58.Ed 59.Sh DESCRIPTION 60This driver provides access to the 61.Tn SCSI 62bus(es) connected to the Adaptec AIC77xx and AIC78xx 63host adapter chips. 64.Pp 65Driver features include support for twin and wide busses, 66fast, ultra or ultra2 synchronous transfers depending on controller type, 67tagged queueing, SCB paging, and target mode. 68.Pp 69Memory mapped I/O can be enabled for PCI devices with the 70.Dq Dv AHC_ALLOW_MEMIO 71configuration option. 72Memory mapped I/O is more efficient than the alternative, programmed I/O. 73Most PCI BIOSes will map devices so that either technique for communicating 74with the card is available. 75In some cases, 76usually when the PCI device is sitting behind a PCI->PCI bridge, 77the BIOS may fail to properly initialize the chip for memory mapped I/O. 78The typical symptom of this problem is a system hang if memory mapped I/O 79is attempted. 80Most modern motherboards perform the initialization correctly and work fine 81with this option enabled. 82.Pp 83Individual controllers may be configured to operate in the target role 84through the 85.Dq Dv AHC_TMODE_ENABLE 86configuration option. 87The value assigned to this option should be a bitmap 88of all units where target mode is desired. 89For example, a value of 0x25, would enable target mode on units 0, 2, and 5. 90A value of 0x8a enables it for units 1, 3, and 7. 91.Pp 92Per target configuration performed in the 93.Tn SCSI-Select 94menu, accessible at boot 95is honored by this driver. 96This includes synchronous/asynchronous transfers, 97maximum synchronous negotiation rate, 98wide transfers, 99disconnection, 100the host adapter's SCSI ID. 101For systems that store non-volatile settings in a system specific manner 102rather than a serial eeprom directly connected to the aic7xxx controller, 103the 104.Tn BIOS 105must be enabled for the driver to access this information. 106This restriction applies to 107many chip-down motherboard configurations. 108.Pp 109Performance and feature sets vary throughout the aic7xxx product line. 110The following table provides a comparison of the different chips supported 111by the 112.Nm 113driver. 114Note that wide and twin channel features, although always supported 115by a particular chip, may be disabled in a particular motherboard or card 116design. 117.Bd -ragged -offset indent 118.Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X" 119.It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features" 120.It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1" 121.It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta "" 122.It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta "" 123.It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta "" 124.It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "" 125.It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 126.It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 127.It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8" 128.It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5" 129.It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8" 130.It "aic7896" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 131.It "aic7897" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 132.It "aic7899" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 6 7 8" 133.El 134.Pp 135.Bl -enum -compact 136.It 137Multiplexed Twin Channel Device - One controller servicing two busses. 138.It 139Multi-function Twin Channel Device - Two controllers on one chip. 140.It 141Command Channel Secondary DMA Engine - Allows scatter gather list and 142SCB prefetch. 143.It 14464 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 145.It 146Block Move Instruction Support - Doubles the speed of certain sequencer 147operations. 148.It 149.Sq Bayonet 150style Scatter Gather Engine - Improves S/G prefetch performance. 151.It 152Queuing Registers - Allows queueing of new transactions without pausing the 153sequencer. 154.It 155Multiple Target IDs - Allows the controller to respond to selection as a 156target on multiple SCSI IDs. 157.El 158.Ed 159.Sh HARDWARE 160The 161.Nm 162driver supports the following 163.Tn SCSI 164host adapter chips and 165.Tn SCSI 166controller cards: 167.Pp 168.Bl -bullet -compact 169.It 170Adaptec 171.Tn AIC7770 172host adapter chip 173.It 174Adaptec 175.Tn AIC7850 176host adapter chip 177.It 178Adaptec 179.Tn AIC7860 180host adapter chip 181.It 182Adaptec 183.Tn AIC7870 184host adapter chip 185.It 186Adaptec 187.Tn AIC7880 188host adapter chip 189.It 190Adaptec 191.Tn AIC7890 192host adapter chip 193.It 194Adaptec 195.Tn AIC7891 196host adapter chip 197.It 198Adaptec 199.Tn AIC7892 200host adapter chip 201.It 202Adaptec 203.Tn AIC7895 204host adapter chip 205.It 206Adaptec 207.Tn AIC7896 208host adapter chip 209.It 210Adaptec 211.Tn AIC7897 212host adapter chip 213.It 214Adaptec 215.Tn AIC7899 216host adapter chip 217.It 218Adaptec 219.Tn 274X(W) 220.It 221Adaptec 222.Tn 274X(T) 223.It 224Adaptec 225.Tn 2910 226.It 227Adaptec 228.Tn 2915 229.It 230Adaptec 231.Tn 2920C 232.It 233Adaptec 234.Tn 2930C 235.It 236Adaptec 237.Tn 2930U2 238.It 239Adaptec 240.Tn 2940 241.It 242Adaptec 243.Tn 2940J 244.It 245Adaptec 246.Tn 2940N 247.It 248Adaptec 249.Tn 2940U 250.It 251Adaptec 252.Tn 2940AU 253.It 254Adaptec 255.Tn 2940UW 256.It 257Adaptec 258.Tn 2940UW Dual 259.It 260Adaptec 261.Tn 2940UW Pro 262.It 263Adaptec 264.Tn 2940U2W 265.It 266Adaptec 267.Tn 2940U2B 268.It 269Adaptec 270.Tn 2950U2W 271.It 272Adaptec 273.Tn 2950U2B 274.It 275Adaptec 276.Tn 19160B 277.It 278Adaptec 279.Tn 29160B 280.It 281Adaptec 282.Tn 29160N 283.It 284Adaptec 285.Tn 3940 286.It 287Adaptec 288.Tn 3940U 289.It 290Adaptec 291.Tn 3940AU 292.It 293Adaptec 294.Tn 3940UW 295.It 296Adaptec 297.Tn 3940AUW 298.It 299Adaptec 300.Tn 3940U2W 301.It 302Adaptec 303.Tn 3950U2 304.It 305Adaptec 306.Tn 3960 307.It 308Adaptec 309.Tn 39160 310.It 311Adaptec 312.Tn 3985 313.It 314Adaptec 315.Tn 4944UW 316.It 317Many motherboards with on-board 318.Tn SCSI 319support 320.El 321.Sh SCSI CONTROL BLOCKS (SCBs) 322Every transaction sent to a device on the SCSI bus is assigned a 323.Sq SCSI Control Block 324(SCB). 325The SCB contains all of the information required by the 326controller to process a transaction. 327The chip feature table lists 328the number of SCBs that can be stored in on-chip memory. 329All chips 330with model numbers greater than or equal to 7870 allow for the on chip 331SCB space to be augmented with external SRAM up to a maximum of 255 SCBs. 332Very few Adaptec controller configurations have external SRAM. 333.Pp 334If external SRAM is not available, SCBs are a limited resource. 335Using the SCBs in a straight forward manner would only allow the driver to 336handle as many concurrent transactions as there are physical SCBs. 337To fully utilize the SCSI bus and the devices on it, 338requires much more concurrency. 339The solution to this problem is 340.Em SCB Paging , 341a concept similar to memory paging. 342SCB paging takes advantage of 343the fact that devices usually disconnect from the SCSI bus for long 344periods of time without talking to the controller. 345The SCBs for disconnected transactions are only of use to the controller 346when the transfer is resumed. 347When the host queues another transaction 348for the controller to execute, the controller firmware will use a 349free SCB if one is available. 350Otherwise, the state of the most recently 351disconnected (and therefore most likely to stay disconnected) SCB is 352saved, via dma, to host memory, and the local SCB reused to start 353the new transaction. 354This allows the controller to queue up to 355255 transactions regardless of the amount of SCB space. 356Since the 357local SCB space serves as a cache for disconnected transactions, the 358more SCB space available, the less host bus traffic consumed saving 359and restoring SCB data. 360.Sh SEE ALSO 361.Xr ahd 4 , 362.Xr cd 4 , 363.Xr da 4 , 364.Xr sa 4 , 365.Xr scsi 4 366.Sh HISTORY 367The 368.Nm 369driver appeared in 370.Fx 2.0 . 371.Sh AUTHORS 372The 373.Nm 374driver, the 375.Tn AIC7xxx 376sequencer-code assembler, 377and the firmware running on the aic7xxx chips was written by 378.An Justin T. Gibbs . 379.Sh BUGS 380Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 381.Tn AIC7870 382Rev B in synchronous mode at 10MHz. 383Controllers with this problem have a 38442 MHz clock crystal on them and run slightly above 10MHz. 385This confuses the drive and hangs the bus. 386Setting a maximum synchronous negotiation rate of 8MHz in the 387.Tn SCSI-Select 388utility will allow normal operation. 389.Pp 390Although the Ultra2 and Ultra160 products have sufficient instruction 391ram space to support both the initiator and target roles concurrently, 392this configuration is disabled in favor of allowing the target role 393to respond on multiple target ids. 394A method for configuring dual role mode should be provided. 395.Pp 396Tagged Queuing is not supported in target mode. 397.Pp 398Reselection in target mode fails to function correctly on all high 399voltage differential boards as shipped by Adaptec. 400Information on 401how to modify HVD board to work correctly in target mode is available 402from Adaptec. 403