xref: /freebsd/secure/lib/libcrypto/man/man3/OPENSSL_riscvcap.3 (revision cb2887746f8b9dd4ad6b1e757cdc053a08b25a2e)
-*- mode: troff; coding: utf-8 -*-
Automatically generated by Pod::Man 5.0102 (Pod::Simple 3.45)

Standard preamble:
========================================================================
..
..
.. \*(C` and \*(C' are quotes in nroff, nothing in troff, for use with C<>.
. ds C` "" . ds C' "" 'br\} . ds C` . ds C' 'br\}
Escape single quotes in literal strings from groff's Unicode transform.

If the F register is >0, we'll generate index entries on stderr for
titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
entries marked with X<> in POD. Of course, you'll have to process the
output yourself in some meaningful fashion.

Avoid warning from groff about undefined register 'F'.
.. .nr rF 0 . if \nF \{\ . de IX . tm Index:\\$1\t\\n%\t"\\$2" .. . if !\nF==2 \{\ . nr % 0 . nr F 2 . \} . \} .\} .rr rF ========================================================================

Title "OPENSSL_RISCVCAP 3ossl"
OPENSSL_RISCVCAP 3ossl 2025-07-01 3.5.1 OpenSSL
For nroff, turn off justification. Always turn off hyphenation; it makes
way too many mistakes in technical documents.
NAME
OPENSSL_riscvcap - the RISC-V processor capabilities vector
SYNOPSIS
Header "SYNOPSIS" .Vb 1 env OPENSSL_riscvcap=... <application> .Ve
DESCRIPTION
Header "DESCRIPTION" libcrypto supports RISC-V instruction set extensions. These extensions are denoted by individual extension names in the capabilities vector. For Linux platform, when libcrypto is initialized, the results returned by the RISC-V Hardware Probing syscall (hwprobe) are stored in the vector. Otherwise all capabilities are disabled.

To override the set of instructions available to an application, you can set the OPENSSL_riscvcap environment variable before you start the application.

The environment variable is similar to the RISC-V ISA string defined in the RISC-V Instruction Set Manual. It is case insensitive. Though due to the limit of the environment variable parser inside libcrypto, an extension must be prefixed with an underscore to make it recognizable. This also applies to the Vector extension.

.Vb 1 OPENSSL_riscvcap="rv64gc_v_zba_zbb_zbs..." .Ve

Note that extension implication is currently not implemented. For example, when "rv64gc_b" is provided as the environment variable, zba/zbb/zbs would not be implied in the capability vector.

Currently only these extensions are recognized:

ZBA 4
Item "ZBA" Address Generation .Sp Could be detected using hwprobe for Linux kernel >= 6.5
ZBB 4
Item "ZBB" Basic bit-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.5
ZBC 4
Item "ZBC" Carry-less multiplication .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZBS 4
Item "ZBS" Single-bit instructions .Sp Could be detected using hwprobe for Linux kernel >= 6.5
ZBKB 4
Item "ZBKB" Bit-manipulation for Cryptography .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZBKC 4
Item "ZBKC" Carry-less multiplication for Cryptography .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZBKX 4
Item "ZBKX" Crossbar permutations .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKND 4
Item "ZKND" NIST Suite: AES Decryption .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKNE 4
Item "ZKNE" NIST Suite: AES Encryption .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKNH 4
Item "ZKNH" NIST Suite: Hash Function Instructions .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKSED 4
Item "ZKSED" ShangMi Suite: SM4 Block Cipher Instructions .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKSH 4
Item "ZKSH" ShangMi Suite: SM3 Hash Function Instructions .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZKR 4
Item "ZKR" Entropy Source Extension
ZKT 4
Item "ZKT" Data Independent Execution Latency .Sp Could be detected using hwprobe for Linux kernel >= 6.8
V 4
Item "V" Vector Extension for Application Processors .Sp Could be detected using hwprobe for Linux kernel >= 6.5
ZVBB 4
Item "ZVBB" Vector Basic Bit-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVBC 4
Item "ZVBC" Vector Carryless Multiplication .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKB 4
Item "ZVKB" Vector Cryptography Bit-manipulation .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKG 4
Item "ZVKG" Vector GCM/GMAC .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKNED 4
Item "ZVKNED" NIST Suite: Vector AES Block Cipher .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKNHA 4
Item "ZVKNHA" NIST Suite: Vector SHA-2 Secure Hash .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKNHB 4
Item "ZVKNHB" NIST Suite: Vector SHA-2 Secure Hash .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKSED 4
Item "ZVKSED" ShangMi Suite: SM4 Block Cipher .Sp Could be detected using hwprobe for Linux kernel >= 6.8
ZVKSH 4
Item "ZVKSH" ShangMi Suite: SM3 Secure Hash .Sp Could be detected using hwprobe for Linux kernel >= 6.8
"RETURN VALUES"
Header "RETURN VALUES" Not available.
EXAMPLES
Header "EXAMPLES" Check currently detected capabilities

.Vb 2 $ openssl info -cpusettings OPENSSL_riscvcap=ZBA_ZBB_ZBC_ZBS_V .Ve

Disables all instruction set extensions:

.Vb 1 OPENSSL_riscvcap="rv64gc" .Ve

Only enable the vector extension:

.Vb 1 OPENSSL_riscvcap="rv64gc_v" .Ve

COPYRIGHT
Header "COPYRIGHT" Copyright 2024 The OpenSSL Project Authors. All Rights Reserved.

Licensed under the Apache License 2.0 (the "License"). You may not use this file except in compliance with the License. You can obtain a copy in the file LICENSE in the source distribution or at <https://www.openssl.org/source/license.html>.