1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2013 Intel Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 34 #include <ctype.h> 35 #include <err.h> 36 #include <fcntl.h> 37 #include <stddef.h> 38 #include <stdio.h> 39 #include <stdlib.h> 40 #include <string.h> 41 #include <unistd.h> 42 43 #include "nvmecontrol.h" 44 #include "nvmecontrol_ext.h" 45 46 void 47 nvme_print_controller(struct nvme_controller_data *cdata) 48 { 49 uint8_t str[128]; 50 char cbuf[UINT128_DIG + 1]; 51 uint16_t oncs, oacs; 52 uint8_t compare, write_unc, dsm, vwc_present; 53 uint8_t security, fmt, fw, nsmgmt; 54 uint8_t fw_slot1_ro, fw_num_slots; 55 uint8_t ns_smart; 56 uint8_t sqes_max, sqes_min; 57 uint8_t cqes_max, cqes_min; 58 59 oncs = cdata->oncs; 60 compare = (oncs >> NVME_CTRLR_DATA_ONCS_COMPARE_SHIFT) & 61 NVME_CTRLR_DATA_ONCS_COMPARE_MASK; 62 write_unc = (oncs >> NVME_CTRLR_DATA_ONCS_WRITE_UNC_SHIFT) & 63 NVME_CTRLR_DATA_ONCS_WRITE_UNC_MASK; 64 dsm = (oncs >> NVME_CTRLR_DATA_ONCS_DSM_SHIFT) & 65 NVME_CTRLR_DATA_ONCS_DSM_MASK; 66 vwc_present = (cdata->vwc >> NVME_CTRLR_DATA_VWC_PRESENT_SHIFT) & 67 NVME_CTRLR_DATA_VWC_PRESENT_MASK; 68 69 oacs = cdata->oacs; 70 security = (oacs >> NVME_CTRLR_DATA_OACS_SECURITY_SHIFT) & 71 NVME_CTRLR_DATA_OACS_SECURITY_MASK; 72 fmt = (oacs >> NVME_CTRLR_DATA_OACS_FORMAT_SHIFT) & 73 NVME_CTRLR_DATA_OACS_FORMAT_MASK; 74 fw = (oacs >> NVME_CTRLR_DATA_OACS_FIRMWARE_SHIFT) & 75 NVME_CTRLR_DATA_OACS_FIRMWARE_MASK; 76 nsmgmt = (oacs >> NVME_CTRLR_DATA_OACS_NSMGMT_SHIFT) & 77 NVME_CTRLR_DATA_OACS_NSMGMT_MASK; 78 79 fw_num_slots = (cdata->frmw >> NVME_CTRLR_DATA_FRMW_NUM_SLOTS_SHIFT) & 80 NVME_CTRLR_DATA_FRMW_NUM_SLOTS_MASK; 81 fw_slot1_ro = (cdata->frmw >> NVME_CTRLR_DATA_FRMW_SLOT1_RO_SHIFT) & 82 NVME_CTRLR_DATA_FRMW_SLOT1_RO_MASK; 83 84 ns_smart = (cdata->lpa >> NVME_CTRLR_DATA_LPA_NS_SMART_SHIFT) & 85 NVME_CTRLR_DATA_LPA_NS_SMART_MASK; 86 87 sqes_min = (cdata->sqes >> NVME_CTRLR_DATA_SQES_MIN_SHIFT) & 88 NVME_CTRLR_DATA_SQES_MIN_MASK; 89 sqes_max = (cdata->sqes >> NVME_CTRLR_DATA_SQES_MAX_SHIFT) & 90 NVME_CTRLR_DATA_SQES_MAX_MASK; 91 92 cqes_min = (cdata->cqes >> NVME_CTRLR_DATA_CQES_MIN_SHIFT) & 93 NVME_CTRLR_DATA_CQES_MIN_MASK; 94 cqes_max = (cdata->cqes >> NVME_CTRLR_DATA_CQES_MAX_SHIFT) & 95 NVME_CTRLR_DATA_CQES_MAX_MASK; 96 97 printf("Controller Capabilities/Features\n"); 98 printf("================================\n"); 99 printf("Vendor ID: %04x\n", cdata->vid); 100 printf("Subsystem Vendor ID: %04x\n", cdata->ssvid); 101 nvme_strvis(str, cdata->sn, sizeof(str), NVME_SERIAL_NUMBER_LENGTH); 102 printf("Serial Number: %s\n", str); 103 nvme_strvis(str, cdata->mn, sizeof(str), NVME_MODEL_NUMBER_LENGTH); 104 printf("Model Number: %s\n", str); 105 nvme_strvis(str, cdata->fr, sizeof(str), NVME_FIRMWARE_REVISION_LENGTH); 106 printf("Firmware Version: %s\n", str); 107 printf("Recommended Arb Burst: %d\n", cdata->rab); 108 printf("IEEE OUI Identifier: %02x %02x %02x\n", 109 cdata->ieee[0], cdata->ieee[1], cdata->ieee[2]); 110 printf("Multi-Path I/O Capabilities: %s%s%s%s\n", 111 (cdata->mic == 0) ? "Not Supported" : "", 112 ((cdata->mic >> NVME_CTRLR_DATA_MIC_SRIOVVF_SHIFT) & 113 NVME_CTRLR_DATA_MIC_SRIOVVF_MASK) ? "SR-IOV VF, " : "", 114 ((cdata->mic >> NVME_CTRLR_DATA_MIC_MCTRLRS_SHIFT) & 115 NVME_CTRLR_DATA_MIC_MCTRLRS_MASK) ? "Multiple controllers, " : "", 116 ((cdata->mic >> NVME_CTRLR_DATA_MIC_MPORTS_SHIFT) & 117 NVME_CTRLR_DATA_MIC_MPORTS_MASK) ? "Multiple ports" : ""); 118 /* TODO: Use CAP.MPSMIN to determine true memory page size. */ 119 printf("Max Data Transfer Size: "); 120 if (cdata->mdts == 0) 121 printf("Unlimited\n"); 122 else 123 printf("%ld\n", PAGE_SIZE * (1L << cdata->mdts)); 124 printf("Controller ID: 0x%02x\n", cdata->ctrlr_id); 125 printf("Version: %d.%d.%d\n", 126 (cdata->ver >> 16) & 0xffff, (cdata->ver >> 8) & 0xff, 127 cdata->ver & 0xff); 128 printf("\n"); 129 130 printf("Admin Command Set Attributes\n"); 131 printf("============================\n"); 132 printf("Security Send/Receive: %s\n", 133 security ? "Supported" : "Not Supported"); 134 printf("Format NVM: %s\n", 135 fmt ? "Supported" : "Not Supported"); 136 printf("Firmware Activate/Download: %s\n", 137 fw ? "Supported" : "Not Supported"); 138 printf("Namespace Managment: %s\n", 139 nsmgmt ? "Supported" : "Not Supported"); 140 printf("Device Self-test: %sSupported\n", 141 ((oacs >> NVME_CTRLR_DATA_OACS_SELFTEST_SHIFT) & 142 NVME_CTRLR_DATA_OACS_SELFTEST_MASK) ? "" : "Not "); 143 printf("Directives: %sSupported\n", 144 ((oacs >> NVME_CTRLR_DATA_OACS_DIRECTIVES_SHIFT) & 145 NVME_CTRLR_DATA_OACS_DIRECTIVES_MASK) ? "" : "Not "); 146 printf("NVMe-MI Send/Receive: %sSupported\n", 147 ((oacs >> NVME_CTRLR_DATA_OACS_NVMEMI_SHIFT) & 148 NVME_CTRLR_DATA_OACS_NVMEMI_MASK) ? "" : "Not "); 149 printf("Virtualization Management: %sSupported\n", 150 ((oacs >> NVME_CTRLR_DATA_OACS_VM_SHIFT) & 151 NVME_CTRLR_DATA_OACS_VM_MASK) ? "" : "Not "); 152 printf("Doorbell Buffer Config %sSupported\n", 153 ((oacs >> NVME_CTRLR_DATA_OACS_DBBUFFER_SHIFT) & 154 NVME_CTRLR_DATA_OACS_DBBUFFER_MASK) ? "" : "Not "); 155 printf("Abort Command Limit: %d\n", cdata->acl+1); 156 printf("Async Event Request Limit: %d\n", cdata->aerl+1); 157 printf("Number of Firmware Slots: "); 158 if (fw != 0) 159 printf("%d\n", fw_num_slots); 160 else 161 printf("N/A\n"); 162 printf("Firmware Slot 1 Read-Only: "); 163 if (fw != 0) 164 printf("%s\n", fw_slot1_ro ? "Yes" : "No"); 165 else 166 printf("N/A\n"); 167 printf("Per-Namespace SMART Log: %s\n", 168 ns_smart ? "Yes" : "No"); 169 printf("Error Log Page Entries: %d\n", cdata->elpe+1); 170 printf("Number of Power States: %d\n", cdata->npss+1); 171 172 printf("\n"); 173 printf("NVM Command Set Attributes\n"); 174 printf("==========================\n"); 175 printf("Submission Queue Entry Size\n"); 176 printf(" Max: %d\n", 1 << sqes_max); 177 printf(" Min: %d\n", 1 << sqes_min); 178 printf("Completion Queue Entry Size\n"); 179 printf(" Max: %d\n", 1 << cqes_max); 180 printf(" Min: %d\n", 1 << cqes_min); 181 printf("Number of Namespaces: %d\n", cdata->nn); 182 printf("Compare Command: %s\n", 183 compare ? "Supported" : "Not Supported"); 184 printf("Write Uncorrectable Command: %s\n", 185 write_unc ? "Supported" : "Not Supported"); 186 printf("Dataset Management Command: %s\n", 187 dsm ? "Supported" : "Not Supported"); 188 printf("Write Zeroes Command: %sSupported\n", 189 ((oncs >> NVME_CTRLR_DATA_ONCS_WRZERO_SHIFT) & 190 NVME_CTRLR_DATA_ONCS_WRZERO_MASK) ? "" : "Not "); 191 printf("Save Features: %sSupported\n", 192 ((oncs >> NVME_CTRLR_DATA_ONCS_SAVEFEAT_SHIFT) & 193 NVME_CTRLR_DATA_ONCS_SAVEFEAT_MASK) ? "" : "Not "); 194 printf("Reservations: %sSupported\n", 195 ((oncs >> NVME_CTRLR_DATA_ONCS_RESERV_SHIFT) & 196 NVME_CTRLR_DATA_ONCS_RESERV_MASK) ? "" : "Not "); 197 printf("Timestamp feature: %sSupported\n", 198 ((oncs >> NVME_CTRLR_DATA_ONCS_TIMESTAMP_SHIFT) & 199 NVME_CTRLR_DATA_ONCS_TIMESTAMP_MASK) ? "" : "Not "); 200 printf("Fused Operation Support: %s%s\n", 201 (cdata->fuses == 0) ? "Not Supported" : "", 202 ((cdata->fuses >> NVME_CTRLR_DATA_FUSES_CNW_SHIFT) & 203 NVME_CTRLR_DATA_FUSES_CNW_MASK) ? "Compare and Write" : ""); 204 printf("Format NVM Attributes: %s%s Erase, %s Format\n", 205 ((cdata->fna >> NVME_CTRLR_DATA_FNA_CRYPTO_ERASE_SHIFT) & 206 NVME_CTRLR_DATA_FNA_CRYPTO_ERASE_MASK) ? "Crypto Erase, " : "", 207 ((cdata->fna >> NVME_CTRLR_DATA_FNA_ERASE_ALL_SHIFT) & 208 NVME_CTRLR_DATA_FNA_ERASE_ALL_MASK) ? "All-NVM" : "Per-NS", 209 ((cdata->fna >> NVME_CTRLR_DATA_FNA_FORMAT_ALL_SHIFT) & 210 NVME_CTRLR_DATA_FNA_FORMAT_ALL_MASK) ? "All-NVM" : "Per-NS"); 211 printf("Volatile Write Cache: %s\n", 212 vwc_present ? "Present" : "Not Present"); 213 214 if (nsmgmt) { 215 printf("\n"); 216 printf("Namespace Drive Attributes\n"); 217 printf("==========================\n"); 218 printf("NVM total cap: %s\n", 219 uint128_to_str(to128(cdata->untncap.tnvmcap), cbuf, sizeof(cbuf))); 220 printf("NVM unallocated cap: %s\n", 221 uint128_to_str(to128(cdata->untncap.unvmcap), cbuf, sizeof(cbuf))); 222 } 223 } 224