1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012-2013 Intel Corporation 5 * All rights reserved. 6 * Copyright (C) 2018-2019 Alexander Motin <mav@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 35 #include <ctype.h> 36 #include <err.h> 37 #include <fcntl.h> 38 #include <stddef.h> 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <string.h> 42 #include <unistd.h> 43 44 #include "nvmecontrol.h" 45 #include "nvmecontrol_ext.h" 46 47 void 48 nvme_print_controller(struct nvme_controller_data *cdata) 49 { 50 uint8_t str[128]; 51 char cbuf[UINT128_DIG + 1]; 52 uint16_t oncs, oacs; 53 uint8_t compare, write_unc, dsm, t; 54 uint8_t security, fmt, fw, nsmgmt; 55 uint8_t fw_slot1_ro, fw_num_slots; 56 uint8_t ns_smart; 57 uint8_t sqes_max, sqes_min; 58 uint8_t cqes_max, cqes_min; 59 60 oncs = cdata->oncs; 61 compare = (oncs >> NVME_CTRLR_DATA_ONCS_COMPARE_SHIFT) & 62 NVME_CTRLR_DATA_ONCS_COMPARE_MASK; 63 write_unc = (oncs >> NVME_CTRLR_DATA_ONCS_WRITE_UNC_SHIFT) & 64 NVME_CTRLR_DATA_ONCS_WRITE_UNC_MASK; 65 dsm = (oncs >> NVME_CTRLR_DATA_ONCS_DSM_SHIFT) & 66 NVME_CTRLR_DATA_ONCS_DSM_MASK; 67 68 oacs = cdata->oacs; 69 security = (oacs >> NVME_CTRLR_DATA_OACS_SECURITY_SHIFT) & 70 NVME_CTRLR_DATA_OACS_SECURITY_MASK; 71 fmt = (oacs >> NVME_CTRLR_DATA_OACS_FORMAT_SHIFT) & 72 NVME_CTRLR_DATA_OACS_FORMAT_MASK; 73 fw = (oacs >> NVME_CTRLR_DATA_OACS_FIRMWARE_SHIFT) & 74 NVME_CTRLR_DATA_OACS_FIRMWARE_MASK; 75 nsmgmt = (oacs >> NVME_CTRLR_DATA_OACS_NSMGMT_SHIFT) & 76 NVME_CTRLR_DATA_OACS_NSMGMT_MASK; 77 78 fw_num_slots = (cdata->frmw >> NVME_CTRLR_DATA_FRMW_NUM_SLOTS_SHIFT) & 79 NVME_CTRLR_DATA_FRMW_NUM_SLOTS_MASK; 80 fw_slot1_ro = (cdata->frmw >> NVME_CTRLR_DATA_FRMW_SLOT1_RO_SHIFT) & 81 NVME_CTRLR_DATA_FRMW_SLOT1_RO_MASK; 82 83 ns_smart = (cdata->lpa >> NVME_CTRLR_DATA_LPA_NS_SMART_SHIFT) & 84 NVME_CTRLR_DATA_LPA_NS_SMART_MASK; 85 86 sqes_min = (cdata->sqes >> NVME_CTRLR_DATA_SQES_MIN_SHIFT) & 87 NVME_CTRLR_DATA_SQES_MIN_MASK; 88 sqes_max = (cdata->sqes >> NVME_CTRLR_DATA_SQES_MAX_SHIFT) & 89 NVME_CTRLR_DATA_SQES_MAX_MASK; 90 91 cqes_min = (cdata->cqes >> NVME_CTRLR_DATA_CQES_MIN_SHIFT) & 92 NVME_CTRLR_DATA_CQES_MIN_MASK; 93 cqes_max = (cdata->cqes >> NVME_CTRLR_DATA_CQES_MAX_SHIFT) & 94 NVME_CTRLR_DATA_CQES_MAX_MASK; 95 96 printf("Controller Capabilities/Features\n"); 97 printf("================================\n"); 98 printf("Vendor ID: %04x\n", cdata->vid); 99 printf("Subsystem Vendor ID: %04x\n", cdata->ssvid); 100 nvme_strvis(str, cdata->sn, sizeof(str), NVME_SERIAL_NUMBER_LENGTH); 101 printf("Serial Number: %s\n", str); 102 nvme_strvis(str, cdata->mn, sizeof(str), NVME_MODEL_NUMBER_LENGTH); 103 printf("Model Number: %s\n", str); 104 nvme_strvis(str, cdata->fr, sizeof(str), NVME_FIRMWARE_REVISION_LENGTH); 105 printf("Firmware Version: %s\n", str); 106 printf("Recommended Arb Burst: %d\n", cdata->rab); 107 printf("IEEE OUI Identifier: %02x %02x %02x\n", 108 cdata->ieee[0], cdata->ieee[1], cdata->ieee[2]); 109 printf("Multi-Path I/O Capabilities: %s%s%s%s%s\n", 110 (cdata->mic == 0) ? "Not Supported" : "", 111 ((cdata->mic >> NVME_CTRLR_DATA_MIC_ANAR_SHIFT) & 112 NVME_CTRLR_DATA_MIC_SRIOVVF_MASK) ? "Asymmetric, " : "", 113 ((cdata->mic >> NVME_CTRLR_DATA_MIC_SRIOVVF_SHIFT) & 114 NVME_CTRLR_DATA_MIC_SRIOVVF_MASK) ? "SR-IOV VF, " : "", 115 ((cdata->mic >> NVME_CTRLR_DATA_MIC_MCTRLRS_SHIFT) & 116 NVME_CTRLR_DATA_MIC_MCTRLRS_MASK) ? "Multiple controllers, " : "", 117 ((cdata->mic >> NVME_CTRLR_DATA_MIC_MPORTS_SHIFT) & 118 NVME_CTRLR_DATA_MIC_MPORTS_MASK) ? "Multiple ports" : ""); 119 /* TODO: Use CAP.MPSMIN to determine true memory page size. */ 120 printf("Max Data Transfer Size: "); 121 if (cdata->mdts == 0) 122 printf("Unlimited\n"); 123 else 124 printf("%ld bytes\n", PAGE_SIZE * (1L << cdata->mdts)); 125 printf("Controller ID: 0x%04x\n", cdata->ctrlr_id); 126 printf("Version: %d.%d.%d\n", 127 (cdata->ver >> 16) & 0xffff, (cdata->ver >> 8) & 0xff, 128 cdata->ver & 0xff); 129 printf("\n"); 130 131 printf("Admin Command Set Attributes\n"); 132 printf("============================\n"); 133 printf("Security Send/Receive: %s\n", 134 security ? "Supported" : "Not Supported"); 135 printf("Format NVM: %s\n", 136 fmt ? "Supported" : "Not Supported"); 137 printf("Firmware Activate/Download: %s\n", 138 fw ? "Supported" : "Not Supported"); 139 printf("Namespace Managment: %s\n", 140 nsmgmt ? "Supported" : "Not Supported"); 141 printf("Device Self-test: %sSupported\n", 142 ((oacs >> NVME_CTRLR_DATA_OACS_SELFTEST_SHIFT) & 143 NVME_CTRLR_DATA_OACS_SELFTEST_MASK) ? "" : "Not "); 144 printf("Directives: %sSupported\n", 145 ((oacs >> NVME_CTRLR_DATA_OACS_DIRECTIVES_SHIFT) & 146 NVME_CTRLR_DATA_OACS_DIRECTIVES_MASK) ? "" : "Not "); 147 printf("NVMe-MI Send/Receive: %sSupported\n", 148 ((oacs >> NVME_CTRLR_DATA_OACS_NVMEMI_SHIFT) & 149 NVME_CTRLR_DATA_OACS_NVMEMI_MASK) ? "" : "Not "); 150 printf("Virtualization Management: %sSupported\n", 151 ((oacs >> NVME_CTRLR_DATA_OACS_VM_SHIFT) & 152 NVME_CTRLR_DATA_OACS_VM_MASK) ? "" : "Not "); 153 printf("Doorbell Buffer Config: %sSupported\n", 154 ((oacs >> NVME_CTRLR_DATA_OACS_DBBUFFER_SHIFT) & 155 NVME_CTRLR_DATA_OACS_DBBUFFER_MASK) ? "" : "Not "); 156 printf("Get LBA Status: %sSupported\n", 157 ((oacs >> NVME_CTRLR_DATA_OACS_GETLBA_SHIFT) & 158 NVME_CTRLR_DATA_OACS_GETLBA_MASK) ? "" : "Not "); 159 printf("Sanitize: "); 160 if (cdata->sanicap != 0) { 161 printf("%s%s%s\n", 162 ((cdata->sanicap >> NVME_CTRLR_DATA_SANICAP_CES_SHIFT) & 163 NVME_CTRLR_DATA_SANICAP_CES_MASK) ? "crypto, " : "", 164 ((cdata->sanicap >> NVME_CTRLR_DATA_SANICAP_BES_SHIFT) & 165 NVME_CTRLR_DATA_SANICAP_BES_MASK) ? "block, " : "", 166 ((cdata->sanicap >> NVME_CTRLR_DATA_SANICAP_OWS_SHIFT) & 167 NVME_CTRLR_DATA_SANICAP_OWS_MASK) ? "overwrite" : ""); 168 } else { 169 printf("Not Supported\n"); 170 } 171 printf("Abort Command Limit: %d\n", cdata->acl+1); 172 printf("Async Event Request Limit: %d\n", cdata->aerl+1); 173 printf("Number of Firmware Slots: "); 174 if (fw != 0) 175 printf("%d\n", fw_num_slots); 176 else 177 printf("N/A\n"); 178 printf("Firmware Slot 1 Read-Only: "); 179 if (fw != 0) 180 printf("%s\n", fw_slot1_ro ? "Yes" : "No"); 181 else 182 printf("N/A\n"); 183 printf("Per-Namespace SMART Log: %s\n", 184 ns_smart ? "Yes" : "No"); 185 printf("Error Log Page Entries: %d\n", cdata->elpe+1); 186 printf("Number of Power States: %d\n", cdata->npss+1); 187 if (cdata->ver >= 0x010200) { 188 printf("Total NVM Capacity: %s bytes\n", 189 uint128_to_str(to128(cdata->untncap.tnvmcap), 190 cbuf, sizeof(cbuf))); 191 printf("Unallocated NVM Capacity: %s bytes\n", 192 uint128_to_str(to128(cdata->untncap.unvmcap), 193 cbuf, sizeof(cbuf))); 194 } 195 printf("Host Buffer Preferred Size: %llu bytes\n", 196 (long long unsigned)cdata->hmpre * 4096); 197 printf("Host Buffer Minimum Size: %llu bytes\n", 198 (long long unsigned)cdata->hmmin * 4096); 199 200 printf("\n"); 201 printf("NVM Command Set Attributes\n"); 202 printf("==========================\n"); 203 printf("Submission Queue Entry Size\n"); 204 printf(" Max: %d\n", 1 << sqes_max); 205 printf(" Min: %d\n", 1 << sqes_min); 206 printf("Completion Queue Entry Size\n"); 207 printf(" Max: %d\n", 1 << cqes_max); 208 printf(" Min: %d\n", 1 << cqes_min); 209 printf("Number of Namespaces: %d\n", cdata->nn); 210 printf("Compare Command: %s\n", 211 compare ? "Supported" : "Not Supported"); 212 printf("Write Uncorrectable Command: %s\n", 213 write_unc ? "Supported" : "Not Supported"); 214 printf("Dataset Management Command: %s\n", 215 dsm ? "Supported" : "Not Supported"); 216 printf("Write Zeroes Command: %sSupported\n", 217 ((oncs >> NVME_CTRLR_DATA_ONCS_WRZERO_SHIFT) & 218 NVME_CTRLR_DATA_ONCS_WRZERO_MASK) ? "" : "Not "); 219 printf("Save Features: %sSupported\n", 220 ((oncs >> NVME_CTRLR_DATA_ONCS_SAVEFEAT_SHIFT) & 221 NVME_CTRLR_DATA_ONCS_SAVEFEAT_MASK) ? "" : "Not "); 222 printf("Reservations: %sSupported\n", 223 ((oncs >> NVME_CTRLR_DATA_ONCS_RESERV_SHIFT) & 224 NVME_CTRLR_DATA_ONCS_RESERV_MASK) ? "" : "Not "); 225 printf("Timestamp feature: %sSupported\n", 226 ((oncs >> NVME_CTRLR_DATA_ONCS_TIMESTAMP_SHIFT) & 227 NVME_CTRLR_DATA_ONCS_TIMESTAMP_MASK) ? "" : "Not "); 228 printf("Verify feature: %sSupported\n", 229 ((oncs >> NVME_CTRLR_DATA_ONCS_VERIFY_SHIFT) & 230 NVME_CTRLR_DATA_ONCS_VERIFY_MASK) ? "" : "Not "); 231 printf("Fused Operation Support: %s%s\n", 232 (cdata->fuses == 0) ? "Not Supported" : "", 233 ((cdata->fuses >> NVME_CTRLR_DATA_FUSES_CNW_SHIFT) & 234 NVME_CTRLR_DATA_FUSES_CNW_MASK) ? "Compare and Write" : ""); 235 printf("Format NVM Attributes: %s%s Erase, %s Format\n", 236 ((cdata->fna >> NVME_CTRLR_DATA_FNA_CRYPTO_ERASE_SHIFT) & 237 NVME_CTRLR_DATA_FNA_CRYPTO_ERASE_MASK) ? "Crypto Erase, " : "", 238 ((cdata->fna >> NVME_CTRLR_DATA_FNA_ERASE_ALL_SHIFT) & 239 NVME_CTRLR_DATA_FNA_ERASE_ALL_MASK) ? "All-NVM" : "Per-NS", 240 ((cdata->fna >> NVME_CTRLR_DATA_FNA_FORMAT_ALL_SHIFT) & 241 NVME_CTRLR_DATA_FNA_FORMAT_ALL_MASK) ? "All-NVM" : "Per-NS"); 242 t = (cdata->vwc >> NVME_CTRLR_DATA_VWC_ALL_SHIFT) & 243 NVME_CTRLR_DATA_VWC_ALL_MASK; 244 printf("Volatile Write Cache: %s%s\n", 245 ((cdata->vwc >> NVME_CTRLR_DATA_VWC_PRESENT_SHIFT) & 246 NVME_CTRLR_DATA_VWC_PRESENT_MASK) ? "Present" : "Not Present", 247 (t == NVME_CTRLR_DATA_VWC_ALL_NO) ? ", no flush all" : 248 (t == NVME_CTRLR_DATA_VWC_ALL_YES) ? ", flush all" : ""); 249 250 if (cdata->ver >= 0x010201) 251 printf("\nNVM Subsystem Name: %.256s\n", cdata->subnqn); 252 } 253