xref: /freebsd/lib/msun/amd64/fenv.c (revision cc426dd31990b8b50b210efc450e404596548ca1)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #include <sys/cdefs.h>
32 #include <sys/types.h>
33 #include <machine/fpu.h>
34 
35 #define	__fenv_static
36 #include "fenv.h"
37 
38 #ifdef __GNUC_GNU_INLINE__
39 #error "This file must be compiled with C99 'inline' semantics"
40 #endif
41 
42 const fenv_t __fe_dfl_env = {
43 	{ 0xffff0000 | __INITIAL_FPUCW__,
44 	  0xffff0000,
45 	  0xffffffff,
46 	  { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 	    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
48 	},
49 	__INITIAL_MXCSR__
50 };
51 
52 extern inline int feclearexcept(int __excepts);
53 extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts);
54 
55 int
56 fesetexceptflag(const fexcept_t *flagp, int excepts)
57 {
58 	fenv_t env;
59 
60 	__fnstenv(&env.__x87);
61 	env.__x87.__status &= ~excepts;
62 	env.__x87.__status |= *flagp & excepts;
63 	__fldenv(&env.__x87);
64 
65 	__stmxcsr(&env.__mxcsr);
66 	env.__mxcsr &= ~excepts;
67 	env.__mxcsr |= *flagp & excepts;
68 	__ldmxcsr(&env.__mxcsr);
69 
70 	return (0);
71 }
72 
73 int
74 feraiseexcept(int excepts)
75 {
76 	fexcept_t ex = excepts;
77 
78 	fesetexceptflag(&ex, excepts);
79 	__fwait();
80 	return (0);
81 }
82 
83 extern inline int fetestexcept(int __excepts);
84 extern inline int fegetround(void);
85 extern inline int fesetround(int __round);
86 
87 int
88 fegetenv(fenv_t *envp)
89 {
90 
91 	__fnstenv(&envp->__x87);
92 	__stmxcsr(&envp->__mxcsr);
93 	/*
94 	 * fnstenv masks all exceptions, so we need to restore the
95 	 * control word to avoid this side effect.
96 	 */
97 	__fldcw(&envp->__x87.__control);
98 	return (0);
99 }
100 
101 int
102 feholdexcept(fenv_t *envp)
103 {
104 	__uint32_t mxcsr;
105 
106 	__stmxcsr(&mxcsr);
107 	__fnstenv(&envp->__x87);
108 	__fnclex();
109 	envp->__mxcsr = mxcsr;
110 	mxcsr &= ~FE_ALL_EXCEPT;
111 	mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
112 	__ldmxcsr(&mxcsr);
113 	return (0);
114 }
115 
116 extern inline int fesetenv(const fenv_t *__envp);
117 
118 int
119 feupdateenv(const fenv_t *envp)
120 {
121 	__uint32_t mxcsr;
122 	__uint16_t status;
123 
124 	__fnstsw(&status);
125 	__stmxcsr(&mxcsr);
126 	fesetenv(envp);
127 	feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
128 	return (0);
129 }
130 
131 int
132 __feenableexcept(int mask)
133 {
134 	__uint32_t mxcsr, omask;
135 	__uint16_t control;
136 
137 	mask &= FE_ALL_EXCEPT;
138 	__fnstcw(&control);
139 	__stmxcsr(&mxcsr);
140 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
141 	control &= ~mask;
142 	__fldcw(&control);
143 	mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
144 	__ldmxcsr(&mxcsr);
145 	return (omask);
146 }
147 
148 int
149 __fedisableexcept(int mask)
150 {
151 	__uint32_t mxcsr, omask;
152 	__uint16_t control;
153 
154 	mask &= FE_ALL_EXCEPT;
155 	__fnstcw(&control);
156 	__stmxcsr(&mxcsr);
157 	omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
158 	control |= mask;
159 	__fldcw(&control);
160 	mxcsr |= mask << _SSE_EMASK_SHIFT;
161 	__ldmxcsr(&mxcsr);
162 	return (omask);
163 }
164 
165 __weak_reference(__feenableexcept, feenableexcept);
166 __weak_reference(__fedisableexcept, fedisableexcept);
167