xref: /freebsd/lib/msun/amd64/fenv.c (revision 1e413cf93298b5b97441a21d9a50fdcd0ee9945e)
1 /*-
2  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #include <sys/cdefs.h>
30 #include <sys/types.h>
31 #include <machine/fpu.h>
32 #include <fenv.h>
33 
34 const fenv_t __fe_dfl_env = {
35 	{ 0xffff0000 | __INITIAL_FPUCW__,
36 	  0xffff0000,
37 	  0xffffffff,
38 	  { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 	    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
40 	},
41 	__INITIAL_MXCSR__
42 };
43 
44 int
45 fesetexceptflag(const fexcept_t *flagp, int excepts)
46 {
47 	fenv_t env;
48 
49 	__fnstenv(&env.__x87);
50 	env.__x87.__status &= ~excepts;
51 	env.__x87.__status |= *flagp & excepts;
52 	__fldenv(env.__x87);
53 
54 	__stmxcsr(&env.__mxcsr);
55 	env.__mxcsr &= ~excepts;
56 	env.__mxcsr |= *flagp & excepts;
57 	__ldmxcsr(env.__mxcsr);
58 
59 	return (0);
60 }
61 
62 int
63 feraiseexcept(int excepts)
64 {
65 	fexcept_t ex = excepts;
66 
67 	fesetexceptflag(&ex, excepts);
68 	__fwait();
69 	return (0);
70 }
71 
72 int
73 fegetenv(fenv_t *envp)
74 {
75 
76 	__fnstenv(&envp->__x87);
77 	__stmxcsr(&envp->__mxcsr);
78 	/*
79 	 * fnstenv masks all exceptions, so we need to restore the
80 	 * control word to avoid this side effect.
81 	 */
82 	__fldcw(envp->__x87.__control);
83 	return (0);
84 }
85 
86 int
87 feholdexcept(fenv_t *envp)
88 {
89 	int mxcsr;
90 
91 	__stmxcsr(&mxcsr);
92 	__fnstenv(&envp->__x87);
93 	__fnclex();
94 	envp->__mxcsr = mxcsr;
95 	mxcsr &= ~FE_ALL_EXCEPT;
96 	mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
97 	__ldmxcsr(mxcsr);
98 	return (0);
99 }
100 
101 int
102 feupdateenv(const fenv_t *envp)
103 {
104 	int mxcsr, status;
105 
106 	__fnstsw(&status);
107 	__stmxcsr(&mxcsr);
108 	fesetenv(envp);
109 	feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
110 	return (0);
111 }
112 
113 int
114 __feenableexcept(int mask)
115 {
116 	int mxcsr, control, omask;
117 
118 	mask &= FE_ALL_EXCEPT;
119 	__fnstcw(&control);
120 	__stmxcsr(&mxcsr);
121 	omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
122 	control &= ~mask;
123 	__fldcw(control);
124 	mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
125 	__ldmxcsr(mxcsr);
126 	return (~omask);
127 }
128 
129 int
130 __fedisableexcept(int mask)
131 {
132 	int mxcsr, control, omask;
133 
134 	mask &= FE_ALL_EXCEPT;
135 	__fnstcw(&control);
136 	__stmxcsr(&mxcsr);
137 	omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
138 	control |= mask;
139 	__fldcw(control);
140 	mxcsr |= mask << _SSE_EMASK_SHIFT;
141 	__ldmxcsr(mxcsr);
142 	return (~omask);
143 }
144 
145 __weak_reference(__feenableexcept, feenableexcept);
146 __weak_reference(__fedisableexcept, fedisableexcept);
147