1 /*- 2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifdef __arm__ 28 #include <arm/fenv.h> 29 #else /* __arm__ */ 30 31 #ifndef _FENV_H_ 32 #define _FENV_H_ 33 34 #include <sys/cdefs.h> 35 #include <sys/_types.h> 36 37 #ifndef __fenv_static 38 #define __fenv_static static 39 #endif 40 41 /* The high 32 bits contain fpcr, low 32 contain fpsr. */ 42 typedef __uint64_t fenv_t; 43 typedef __uint64_t fexcept_t; 44 45 /* Exception flags */ 46 #define FE_INVALID 0x00000001 47 #define FE_DIVBYZERO 0x00000002 48 #define FE_OVERFLOW 0x00000004 49 #define FE_UNDERFLOW 0x00000008 50 #define FE_INEXACT 0x00000010 51 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ 52 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) 53 54 /* 55 * Rounding modes 56 * 57 * We can't just use the hardware bit values here, because that would 58 * make FE_UPWARD and FE_DOWNWARD negative, which is not allowed. 59 */ 60 #define FE_TONEAREST 0x0 61 #define FE_UPWARD 0x1 62 #define FE_DOWNWARD 0x2 63 #define FE_TOWARDZERO 0x3 64 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ 65 FE_UPWARD | FE_TOWARDZERO) 66 #define _ROUND_SHIFT 22 67 68 __BEGIN_DECLS 69 70 /* Default floating-point environment */ 71 extern const fenv_t __fe_dfl_env; 72 #define FE_DFL_ENV (&__fe_dfl_env) 73 74 /* We need to be able to map status flag positions to mask flag positions */ 75 #define _FPUSW_SHIFT 8 76 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT) 77 78 #define __mrs_fpcr(__r) __asm __volatile("mrs %0, fpcr" : "=r" (__r)) 79 #define __msr_fpcr(__r) __asm __volatile("msr fpcr, %0" : : "r" (__r)) 80 81 #define __mrs_fpsr(__r) __asm __volatile("mrs %0, fpsr" : "=r" (__r)) 82 #define __msr_fpsr(__r) __asm __volatile("msr fpsr, %0" : : "r" (__r)) 83 84 __fenv_static __inline int 85 feclearexcept(int __excepts) 86 { 87 fexcept_t __r; 88 89 __mrs_fpsr(__r); 90 __r &= ~__excepts; 91 __msr_fpsr(__r); 92 return (0); 93 } 94 95 __fenv_static inline int 96 fegetexceptflag(fexcept_t *__flagp, int __excepts) 97 { 98 fexcept_t __r; 99 100 __mrs_fpsr(__r); 101 *__flagp = __r & __excepts; 102 return (0); 103 } 104 105 __fenv_static inline int 106 fesetexceptflag(const fexcept_t *__flagp, int __excepts) 107 { 108 fexcept_t __r; 109 110 __mrs_fpsr(__r); 111 __r &= ~__excepts; 112 __r |= *__flagp & __excepts; 113 __msr_fpsr(__r); 114 return (0); 115 } 116 117 __fenv_static inline int 118 feraiseexcept(int __excepts) 119 { 120 fexcept_t __r; 121 122 __mrs_fpsr(__r); 123 __r |= __excepts; 124 __msr_fpsr(__r); 125 return (0); 126 } 127 128 __fenv_static inline int 129 fetestexcept(int __excepts) 130 { 131 fexcept_t __r; 132 133 __mrs_fpsr(__r); 134 return (__r & __excepts); 135 } 136 137 __fenv_static inline int 138 fegetround(void) 139 { 140 fenv_t __r; 141 142 __mrs_fpcr(__r); 143 return ((__r >> _ROUND_SHIFT) & _ROUND_MASK); 144 } 145 146 __fenv_static inline int 147 fesetround(int __round) 148 { 149 fenv_t __r; 150 151 if (__round & ~_ROUND_MASK) 152 return (-1); 153 __mrs_fpcr(__r); 154 __r &= ~(_ROUND_MASK << _ROUND_SHIFT); 155 __r |= __round << _ROUND_SHIFT; 156 __msr_fpcr(__r); 157 return (0); 158 } 159 160 __fenv_static inline int 161 fegetenv(fenv_t *__envp) 162 { 163 __uint64_t fpcr; 164 __uint64_t fpsr; 165 166 __mrs_fpcr(fpcr); 167 __mrs_fpsr(fpsr); 168 *__envp = fpsr | (fpcr << 32); 169 170 return (0); 171 } 172 173 __fenv_static inline int 174 feholdexcept(fenv_t *__envp) 175 { 176 fenv_t __r; 177 178 __mrs_fpcr(__r); 179 *__envp = __r << 32; 180 __r &= ~(_ENABLE_MASK); 181 __msr_fpcr(__r); 182 183 __mrs_fpsr(__r); 184 *__envp |= (__uint32_t)__r; 185 __r &= ~(_ENABLE_MASK); 186 __msr_fpsr(__r); 187 return (0); 188 } 189 190 __fenv_static inline int 191 fesetenv(const fenv_t *__envp) 192 { 193 194 __msr_fpcr((*__envp) >> 32); 195 __msr_fpsr((fenv_t)(__uint32_t)*__envp); 196 return (0); 197 } 198 199 __fenv_static inline int 200 feupdateenv(const fenv_t *__envp) 201 { 202 fexcept_t __r; 203 204 __mrs_fpsr(__r); 205 fesetenv(__envp); 206 feraiseexcept(__r & FE_ALL_EXCEPT); 207 return (0); 208 } 209 210 #if __BSD_VISIBLE 211 212 /* We currently provide no external definitions of the functions below. */ 213 214 static inline int 215 feenableexcept(int __mask) 216 { 217 fenv_t __old_r, __new_r; 218 219 __mrs_fpcr(__old_r); 220 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); 221 __msr_fpcr(__new_r); 222 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); 223 } 224 225 static inline int 226 fedisableexcept(int __mask) 227 { 228 fenv_t __old_r, __new_r; 229 230 __mrs_fpcr(__old_r); 231 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); 232 __msr_fpcr(__new_r); 233 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); 234 } 235 236 static inline int 237 fegetexcept(void) 238 { 239 fenv_t __r; 240 241 __mrs_fpcr(__r); 242 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT); 243 } 244 245 #endif /* __BSD_VISIBLE */ 246 247 __END_DECLS 248 249 #endif /* !_FENV_H_ */ 250 251 #endif /* __arm__ */ 252