1 /*- 2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifdef __arm__ 28 #include <arm/fenv.h> 29 #else /* __arm__ */ 30 31 #ifndef _FENV_H_ 32 #define _FENV_H_ 33 34 #include <sys/cdefs.h> 35 #include <sys/_types.h> 36 37 #ifndef __fenv_static 38 #define __fenv_static static 39 #endif 40 41 /* The high 32 bits contain fpcr, low 32 contain fpsr. */ 42 typedef __uint64_t fenv_t; 43 typedef __uint32_t femode_t; 44 typedef __uint64_t fexcept_t; 45 46 /* Exception flags */ 47 #define FE_INVALID 0x00000001 48 #define FE_DIVBYZERO 0x00000002 49 #define FE_OVERFLOW 0x00000004 50 #define FE_UNDERFLOW 0x00000008 51 #define FE_INEXACT 0x00000010 52 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ 53 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) 54 55 /* 56 * Rounding modes 57 * 58 * We can't just use the hardware bit values here, because that would 59 * make FE_UPWARD and FE_DOWNWARD negative, which is not allowed. 60 */ 61 #define FE_TONEAREST 0x0 62 #define FE_UPWARD 0x1 63 #define FE_DOWNWARD 0x2 64 #define FE_TOWARDZERO 0x3 65 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ 66 FE_UPWARD | FE_TOWARDZERO) 67 #define _ROUND_SHIFT 22 68 69 __BEGIN_DECLS 70 71 /* Default floating-point environment */ 72 extern const fenv_t __fe_dfl_env; 73 #define FE_DFL_ENV (&__fe_dfl_env) 74 75 /* Default floating-point control modes */ 76 extern const femode_t __fe_dfl_mode; 77 #define FE_DFL_MODE (&__fe_dfl_mode) 78 79 /* We need to be able to map status flag positions to mask flag positions */ 80 #define _FPUSW_SHIFT 8 81 #define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT) 82 83 #define __mrs_fpcr(__r) __asm __volatile("mrs %0, fpcr" : "=r" (__r)) 84 #define __msr_fpcr(__r) __asm __volatile("msr fpcr, %0" : : "r" (__r)) 85 86 #define __mrs_fpsr(__r) __asm __volatile("mrs %0, fpsr" : "=r" (__r)) 87 #define __msr_fpsr(__r) __asm __volatile("msr fpsr, %0" : : "r" (__r)) 88 89 int feclearexcept(int); 90 int fegetexceptflag(fexcept_t *, int); 91 int fesetexceptflag(const fexcept_t *, int); 92 int feraiseexcept(int); 93 int fetestexcept(int); 94 int fegetround(void); 95 int fesetround(int); 96 int fegetmode(femode_t *); 97 int fesetmode(const femode_t *); 98 int fegetenv(fenv_t *); 99 int feholdexcept(fenv_t *); 100 int fesetenv(const fenv_t *); 101 int feupdateenv(const fenv_t *); 102 int feenableexcept(int); 103 int fedisableexcept(int); 104 int fegetexcept(void); 105 106 /* 107 * C permits a standard library function to also be exposed as a function-like 108 * macro (C23 7.1.4), and msun uses that here to inline the fast path. C++ 109 * forbids it: <cfenv> imports these names into namespace std (using 110 * ::feclearexcept; etc.), so std::feclearexcept() and friends must denote the 111 * actual functions. Expose the inlining macros to C only; C++ uses the real 112 * extern functions (defined in the matching lib/msun/<arch>/fenv.c). 113 */ 114 #ifndef __cplusplus 115 #define feclearexcept(a) __feclearexcept_int(a) 116 #define fegetexceptflag(e, a) __fegetexceptflag_int(e, a) 117 #define fesetexceptflag(e, a) __fesetexceptflag_int(e, a) 118 #define feraiseexcept(a) __feraiseexcept_int(a) 119 #define fetestexcept(a) __fetestexcept_int(a) 120 #define fegetround() __fegetround_int() 121 #define fesetround(a) __fesetround_int(a) 122 #define fegetmode(m) __fegetmode_int(m) 123 #define fesetmode(m) __fesetmode_int(m) 124 #define fegetenv(e) __fegetenv_int(e) 125 #define feholdexcept(e) __feholdexcept_int(e) 126 #define fesetenv(e) __fesetenv_int(e) 127 #define feupdateenv(e) __feupdateenv_int(e) 128 #define feenableexcept(a) __feenableexcept_int(a) 129 #define fedisableexcept(a) __fedisableexcept_int(a) 130 #define fegetexcept() __fegetexcept_int() 131 #endif /* !__cplusplus */ 132 133 __fenv_static inline int 134 __feclearexcept_int(int __excepts) 135 { 136 fexcept_t __r; 137 138 __mrs_fpsr(__r); 139 __r &= ~__excepts; 140 __msr_fpsr(__r); 141 return (0); 142 } 143 144 __fenv_static inline int 145 __fegetexceptflag_int(fexcept_t *__flagp, int __excepts) 146 { 147 fexcept_t __r; 148 149 __mrs_fpsr(__r); 150 *__flagp = __r & __excepts; 151 return (0); 152 } 153 154 __fenv_static inline int 155 __fesetexceptflag_int(const fexcept_t *__flagp, int __excepts) 156 { 157 fexcept_t __r; 158 159 __mrs_fpsr(__r); 160 __r &= ~__excepts; 161 __r |= *__flagp & __excepts; 162 __msr_fpsr(__r); 163 return (0); 164 } 165 166 __fenv_static inline int 167 __feraiseexcept_int(int __excepts) 168 { 169 fexcept_t __r; 170 171 __mrs_fpsr(__r); 172 __r |= __excepts; 173 __msr_fpsr(__r); 174 return (0); 175 } 176 177 __fenv_static inline int 178 __fetestexcept_int(int __excepts) 179 { 180 fexcept_t __r; 181 182 __mrs_fpsr(__r); 183 return (__r & __excepts); 184 } 185 186 __fenv_static inline int 187 __fegetround_int(void) 188 { 189 fenv_t __r; 190 191 __mrs_fpcr(__r); 192 return ((__r >> _ROUND_SHIFT) & _ROUND_MASK); 193 } 194 195 __fenv_static inline int 196 __fesetround_int(int __round) 197 { 198 fenv_t __r; 199 200 if (__round & ~_ROUND_MASK) 201 return (-1); 202 __mrs_fpcr(__r); 203 __r &= ~(_ROUND_MASK << _ROUND_SHIFT); 204 __r |= __round << _ROUND_SHIFT; 205 __msr_fpcr(__r); 206 return (0); 207 } 208 209 __fenv_static inline int 210 __fegetmode_int(femode_t *__modep) 211 { 212 __uint64_t __fpcr; 213 214 __mrs_fpcr(__fpcr); 215 *__modep = (__uint32_t)__fpcr; 216 return (0); 217 } 218 219 __fenv_static inline int 220 __fesetmode_int(const femode_t *__modep) 221 { 222 __uint64_t __fpcr; 223 224 __fpcr = *__modep; 225 __msr_fpcr(__fpcr); 226 return (0); 227 } 228 229 __fenv_static inline int 230 __fegetenv_int(fenv_t *__envp) 231 { 232 __uint64_t fpcr; 233 __uint64_t fpsr; 234 235 __mrs_fpcr(fpcr); 236 __mrs_fpsr(fpsr); 237 *__envp = fpsr | (fpcr << 32); 238 239 return (0); 240 } 241 242 __fenv_static inline int 243 __feholdexcept_int(fenv_t *__envp) 244 { 245 fenv_t __r; 246 247 __mrs_fpcr(__r); 248 *__envp = __r << 32; 249 __r &= ~(_ENABLE_MASK); 250 __msr_fpcr(__r); 251 252 __mrs_fpsr(__r); 253 *__envp |= (__uint32_t)__r; 254 __r &= ~(_ENABLE_MASK); 255 __msr_fpsr(__r); 256 return (0); 257 } 258 259 __fenv_static inline int 260 __fesetenv_int(const fenv_t *__envp) 261 { 262 263 __msr_fpcr((*__envp) >> 32); 264 __msr_fpsr((fenv_t)(__uint32_t)*__envp); 265 return (0); 266 } 267 268 __fenv_static inline int 269 __feupdateenv_int(const fenv_t *__envp) 270 { 271 fexcept_t __r; 272 273 __mrs_fpsr(__r); 274 fesetenv(__envp); 275 feraiseexcept(__r & FE_ALL_EXCEPT); 276 return (0); 277 } 278 279 #if __BSD_VISIBLE 280 281 static inline int 282 __feenableexcept_int(int __mask) 283 { 284 fenv_t __old_r, __new_r; 285 286 __mrs_fpcr(__old_r); 287 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); 288 __msr_fpcr(__new_r); 289 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); 290 } 291 292 static inline int 293 __fedisableexcept_int(int __mask) 294 { 295 fenv_t __old_r, __new_r; 296 297 __mrs_fpcr(__old_r); 298 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); 299 __msr_fpcr(__new_r); 300 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); 301 } 302 303 static inline int 304 __fegetexcept_int(void) 305 { 306 fenv_t __r; 307 308 __mrs_fpcr(__r); 309 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT); 310 } 311 312 #endif /* __BSD_VISIBLE */ 313 314 __END_DECLS 315 316 #endif /* !_FENV_H_ */ 317 318 #endif /* __arm__ */ 319