xref: /freebsd/lib/msun/aarch64/fenv.h (revision 3078531de10dcae44b253a35125c949ff4235284)
1 /*-
2  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef	_FENV_H_
30 #define	_FENV_H_
31 
32 #include <sys/_types.h>
33 
34 #ifndef	__fenv_static
35 #define	__fenv_static	static
36 #endif
37 
38 /* The high 32 bits contain fpcr, low 32 contain fpsr. */
39 typedef	__uint64_t	fenv_t;
40 typedef	__uint64_t	fexcept_t;
41 
42 /* Exception flags */
43 #define	FE_INVALID	0x00000001
44 #define	FE_DIVBYZERO	0x00000002
45 #define	FE_OVERFLOW	0x00000004
46 #define	FE_UNDERFLOW	0x00000008
47 #define	FE_INEXACT	0x00000010
48 #define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_INEXACT | \
49 			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
50 
51 /*
52  * Rounding modes
53  *
54  * We can't just use the hardware bit values here, because that would
55  * make FE_UPWARD and FE_DOWNWARD negative, which is not allowed.
56  */
57 #define	FE_TONEAREST	0x0
58 #define	FE_UPWARD	0x1
59 #define	FE_DOWNWARD	0x2
60 #define	FE_TOWARDZERO	0x3
61 #define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
62 			 FE_UPWARD | FE_TOWARDZERO)
63 #define	_ROUND_SHIFT	22
64 
65 __BEGIN_DECLS
66 
67 /* Default floating-point environment */
68 extern const fenv_t	__fe_dfl_env;
69 #define	FE_DFL_ENV	(&__fe_dfl_env)
70 
71 /* We need to be able to map status flag positions to mask flag positions */
72 #define _FPUSW_SHIFT	8
73 #define	_ENABLE_MASK	(FE_ALL_EXCEPT << _FPUSW_SHIFT)
74 
75 #define	__mrs_fpcr(__r)	__asm __volatile("mrs %0, fpcr" : "=r" (__r))
76 #define	__msr_fpcr(__r)	__asm __volatile("msr fpcr, %0" : : "r" (__r))
77 
78 #define	__mrs_fpsr(__r)	__asm __volatile("mrs %0, fpsr" : "=r" (__r))
79 #define	__msr_fpsr(__r)	__asm __volatile("msr fpsr, %0" : : "r" (__r))
80 
81 __fenv_static __inline int
82 feclearexcept(int __excepts)
83 {
84 	fexcept_t __r;
85 
86 	__mrs_fpsr(__r);
87 	__r &= ~__excepts;
88 	__msr_fpsr(__r);
89 	return (0);
90 }
91 
92 __fenv_static inline int
93 fegetexceptflag(fexcept_t *__flagp, int __excepts)
94 {
95 	fexcept_t __r;
96 
97 	__mrs_fpsr(__r);
98 	*__flagp = __r & __excepts;
99 	return (0);
100 }
101 
102 __fenv_static inline int
103 fesetexceptflag(const fexcept_t *__flagp, int __excepts)
104 {
105 	fexcept_t __r;
106 
107 	__mrs_fpsr(__r);
108 	__r &= ~__excepts;
109 	__r |= *__flagp & __excepts;
110 	__msr_fpsr(__r);
111 	return (0);
112 }
113 
114 __fenv_static inline int
115 feraiseexcept(int __excepts)
116 {
117 	fexcept_t __r;
118 
119 	__mrs_fpsr(__r);
120 	__r |= __excepts;
121 	__msr_fpsr(__r);
122 	return (0);
123 }
124 
125 __fenv_static inline int
126 fetestexcept(int __excepts)
127 {
128 	fexcept_t __r;
129 
130 	__mrs_fpsr(__r);
131 	return (__r & __excepts);
132 }
133 
134 __fenv_static inline int
135 fegetround(void)
136 {
137 	fenv_t __r;
138 
139 	__mrs_fpcr(__r);
140 	return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);
141 }
142 
143 __fenv_static inline int
144 fesetround(int __round)
145 {
146 	fenv_t __r;
147 
148 	if (__round & ~_ROUND_MASK)
149 		return (-1);
150 	__mrs_fpcr(__r);
151 	__r &= ~(_ROUND_MASK << _ROUND_SHIFT);
152 	__r |= __round << _ROUND_SHIFT;
153 	__msr_fpcr(__r);
154 	return (0);
155 }
156 
157 __fenv_static inline int
158 fegetenv(fenv_t *__envp)
159 {
160 	__uint64_t fpcr;
161 	__uint64_t fpsr;
162 
163 	__mrs_fpcr(fpcr);
164 	__mrs_fpsr(fpsr);
165 	*__envp = fpsr | (fpcr << 32);
166 
167 	return (0);
168 }
169 
170 __fenv_static inline int
171 feholdexcept(fenv_t *__envp)
172 {
173 	fenv_t __r;
174 
175 	__mrs_fpcr(__r);
176 	*__envp = __r << 32;
177 	__r &= ~(_ENABLE_MASK);
178 	__msr_fpcr(__r);
179 
180 	__mrs_fpsr(__r);
181 	*__envp |= (__uint32_t)__r;
182 	__r &= ~(_ENABLE_MASK);
183 	__msr_fpsr(__r);
184 	return (0);
185 }
186 
187 __fenv_static inline int
188 fesetenv(const fenv_t *__envp)
189 {
190 
191 	__msr_fpcr((*__envp) >> 32);
192 	__msr_fpsr((fenv_t)(__uint32_t)*__envp);
193 	return (0);
194 }
195 
196 __fenv_static inline int
197 feupdateenv(const fenv_t *__envp)
198 {
199 	fexcept_t __r;
200 
201 	__mrs_fpsr(__r);
202 	fesetenv(__envp);
203 	feraiseexcept(__r & FE_ALL_EXCEPT);
204 	return (0);
205 }
206 
207 #if __BSD_VISIBLE
208 
209 /* We currently provide no external definitions of the functions below. */
210 
211 static inline int
212 feenableexcept(int __mask)
213 {
214 	fenv_t __old_r, __new_r;
215 
216 	__mrs_fpcr(__old_r);
217 	__new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
218 	__msr_fpcr(__new_r);
219 	return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
220 }
221 
222 static inline int
223 fedisableexcept(int __mask)
224 {
225 	fenv_t __old_r, __new_r;
226 
227 	__mrs_fpcr(__old_r);
228 	__new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
229 	__msr_fpcr(__new_r);
230 	return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
231 }
232 
233 static inline int
234 fegetexcept(void)
235 {
236 	fenv_t __r;
237 
238 	__mrs_fpcr(__r);
239 	return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
240 }
241 
242 #endif /* __BSD_VISIBLE */
243 
244 __END_DECLS
245 
246 #endif	/* !_FENV_H_ */
247