1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/sysctl.h> 34 #include <sys/ioctl.h> 35 #include <sys/mman.h> 36 #include <sys/_iovec.h> 37 #include <sys/cpuset.h> 38 39 #include <x86/segments.h> 40 #include <machine/specialreg.h> 41 #include <machine/param.h> 42 43 #include <errno.h> 44 #include <stdio.h> 45 #include <stdlib.h> 46 #include <assert.h> 47 #include <string.h> 48 #include <fcntl.h> 49 #include <unistd.h> 50 51 #include <libutil.h> 52 53 #include <machine/vmm.h> 54 #include <machine/vmm_dev.h> 55 56 #include "vmmapi.h" 57 58 #define MB (1024 * 1024UL) 59 #define GB (1024 * 1024 * 1024UL) 60 61 /* 62 * Size of the guard region before and after the virtual address space 63 * mapping the guest physical memory. This must be a multiple of the 64 * superpage size for performance reasons. 65 */ 66 #define VM_MMAP_GUARD_SIZE (4 * MB) 67 68 #define PROT_RW (PROT_READ | PROT_WRITE) 69 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC) 70 71 struct vmctx { 72 int fd; 73 uint32_t lowmem_limit; 74 int memflags; 75 size_t lowmem; 76 size_t highmem; 77 char *baseaddr; 78 char *name; 79 }; 80 81 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 82 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 83 84 static int 85 vm_device_open(const char *name) 86 { 87 int fd, len; 88 char *vmfile; 89 90 len = strlen("/dev/vmm/") + strlen(name) + 1; 91 vmfile = malloc(len); 92 assert(vmfile != NULL); 93 snprintf(vmfile, len, "/dev/vmm/%s", name); 94 95 /* Open the device file */ 96 fd = open(vmfile, O_RDWR, 0); 97 98 free(vmfile); 99 return (fd); 100 } 101 102 int 103 vm_create(const char *name) 104 { 105 106 return (CREATE((char *)name)); 107 } 108 109 struct vmctx * 110 vm_open(const char *name) 111 { 112 struct vmctx *vm; 113 114 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 115 assert(vm != NULL); 116 117 vm->fd = -1; 118 vm->memflags = 0; 119 vm->lowmem_limit = 3 * GB; 120 vm->name = (char *)(vm + 1); 121 strcpy(vm->name, name); 122 123 if ((vm->fd = vm_device_open(vm->name)) < 0) 124 goto err; 125 126 return (vm); 127 err: 128 vm_destroy(vm); 129 return (NULL); 130 } 131 132 void 133 vm_destroy(struct vmctx *vm) 134 { 135 assert(vm != NULL); 136 137 if (vm->fd >= 0) 138 close(vm->fd); 139 DESTROY(vm->name); 140 141 free(vm); 142 } 143 144 int 145 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 146 { 147 char *endptr; 148 size_t optval; 149 int error; 150 151 optval = strtoul(optarg, &endptr, 0); 152 if (*optarg != '\0' && *endptr == '\0') { 153 /* 154 * For the sake of backward compatibility if the memory size 155 * specified on the command line is less than a megabyte then 156 * it is interpreted as being in units of MB. 157 */ 158 if (optval < MB) 159 optval *= MB; 160 *ret_memsize = optval; 161 error = 0; 162 } else 163 error = expand_number(optarg, ret_memsize); 164 165 return (error); 166 } 167 168 uint32_t 169 vm_get_lowmem_limit(struct vmctx *ctx) 170 { 171 172 return (ctx->lowmem_limit); 173 } 174 175 void 176 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 177 { 178 179 ctx->lowmem_limit = limit; 180 } 181 182 void 183 vm_set_memflags(struct vmctx *ctx, int flags) 184 { 185 186 ctx->memflags = flags; 187 } 188 189 int 190 vm_get_memflags(struct vmctx *ctx) 191 { 192 193 return (ctx->memflags); 194 } 195 196 /* 197 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len). 198 */ 199 int 200 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off, 201 size_t len, int prot) 202 { 203 struct vm_memmap memmap; 204 int error, flags; 205 206 memmap.gpa = gpa; 207 memmap.segid = segid; 208 memmap.segoff = off; 209 memmap.len = len; 210 memmap.prot = prot; 211 memmap.flags = 0; 212 213 if (ctx->memflags & VM_MEM_F_WIRED) 214 memmap.flags |= VM_MEMMAP_F_WIRED; 215 216 /* 217 * If this mapping already exists then don't create it again. This 218 * is the common case for SYSMEM mappings created by bhyveload(8). 219 */ 220 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags); 221 if (error == 0 && gpa == memmap.gpa) { 222 if (segid != memmap.segid || off != memmap.segoff || 223 prot != memmap.prot || flags != memmap.flags) { 224 errno = EEXIST; 225 return (-1); 226 } else { 227 return (0); 228 } 229 } 230 231 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap); 232 return (error); 233 } 234 235 int 236 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid, 237 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags) 238 { 239 struct vm_memmap memmap; 240 int error; 241 242 bzero(&memmap, sizeof(struct vm_memmap)); 243 memmap.gpa = *gpa; 244 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap); 245 if (error == 0) { 246 *gpa = memmap.gpa; 247 *segid = memmap.segid; 248 *segoff = memmap.segoff; 249 *len = memmap.len; 250 *prot = memmap.prot; 251 *flags = memmap.flags; 252 } 253 return (error); 254 } 255 256 /* 257 * Return 0 if the segments are identical and non-zero otherwise. 258 * 259 * This is slightly complicated by the fact that only device memory segments 260 * are named. 261 */ 262 static int 263 cmpseg(size_t len, const char *str, size_t len2, const char *str2) 264 { 265 266 if (len == len2) { 267 if ((!str && !str2) || (str && str2 && !strcmp(str, str2))) 268 return (0); 269 } 270 return (-1); 271 } 272 273 static int 274 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name) 275 { 276 struct vm_memseg memseg; 277 size_t n; 278 int error; 279 280 /* 281 * If the memory segment has already been created then just return. 282 * This is the usual case for the SYSMEM segment created by userspace 283 * loaders like bhyveload(8). 284 */ 285 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name, 286 sizeof(memseg.name)); 287 if (error) 288 return (error); 289 290 if (memseg.len != 0) { 291 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) { 292 errno = EINVAL; 293 return (-1); 294 } else { 295 return (0); 296 } 297 } 298 299 bzero(&memseg, sizeof(struct vm_memseg)); 300 memseg.segid = segid; 301 memseg.len = len; 302 if (name != NULL) { 303 n = strlcpy(memseg.name, name, sizeof(memseg.name)); 304 if (n >= sizeof(memseg.name)) { 305 errno = ENAMETOOLONG; 306 return (-1); 307 } 308 } 309 310 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg); 311 return (error); 312 } 313 314 int 315 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf, 316 size_t bufsize) 317 { 318 struct vm_memseg memseg; 319 size_t n; 320 int error; 321 322 memseg.segid = segid; 323 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg); 324 if (error == 0) { 325 *lenp = memseg.len; 326 n = strlcpy(namebuf, memseg.name, bufsize); 327 if (n >= bufsize) { 328 errno = ENAMETOOLONG; 329 error = -1; 330 } 331 } 332 return (error); 333 } 334 335 static int 336 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base) 337 { 338 char *ptr; 339 int error, flags; 340 341 /* Map 'len' bytes starting at 'gpa' in the guest address space */ 342 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL); 343 if (error) 344 return (error); 345 346 flags = MAP_SHARED | MAP_FIXED; 347 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 348 flags |= MAP_NOCORE; 349 350 /* mmap into the process address space on the host */ 351 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa); 352 if (ptr == MAP_FAILED) 353 return (-1); 354 355 return (0); 356 } 357 358 int 359 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 360 { 361 size_t objsize, len; 362 vm_paddr_t gpa; 363 char *baseaddr, *ptr; 364 int error, flags; 365 366 assert(vms == VM_MMAP_ALL); 367 368 /* 369 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 370 * create another 'highmem' segment above 4GB for the remainder. 371 */ 372 if (memsize > ctx->lowmem_limit) { 373 ctx->lowmem = ctx->lowmem_limit; 374 ctx->highmem = memsize - ctx->lowmem_limit; 375 objsize = 4*GB + ctx->highmem; 376 } else { 377 ctx->lowmem = memsize; 378 ctx->highmem = 0; 379 objsize = ctx->lowmem; 380 } 381 382 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL); 383 if (error) 384 return (error); 385 386 /* 387 * Stake out a contiguous region covering the guest physical memory 388 * and the adjoining guard regions. 389 */ 390 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE; 391 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 392 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0); 393 if (ptr == MAP_FAILED) 394 return (-1); 395 396 baseaddr = ptr + VM_MMAP_GUARD_SIZE; 397 if (ctx->highmem > 0) { 398 gpa = 4*GB; 399 len = ctx->highmem; 400 error = setup_memory_segment(ctx, gpa, len, baseaddr); 401 if (error) 402 return (error); 403 } 404 405 if (ctx->lowmem > 0) { 406 gpa = 0; 407 len = ctx->lowmem; 408 error = setup_memory_segment(ctx, gpa, len, baseaddr); 409 if (error) 410 return (error); 411 } 412 413 ctx->baseaddr = baseaddr; 414 415 return (0); 416 } 417 418 void * 419 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 420 { 421 vm_paddr_t start, end, mapend; 422 423 start = gaddr; 424 end = gaddr + len; 425 mapend = ctx->highmem ? 4*GB + ctx->highmem : ctx->lowmem; 426 427 if (start <= end && end <= mapend) 428 return (ctx->baseaddr + start); 429 else 430 return (NULL); 431 } 432 433 size_t 434 vm_get_lowmem_size(struct vmctx *ctx) 435 { 436 437 return (ctx->lowmem); 438 } 439 440 size_t 441 vm_get_highmem_size(struct vmctx *ctx) 442 { 443 444 return (ctx->highmem); 445 } 446 447 void * 448 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len) 449 { 450 char pathname[MAXPATHLEN]; 451 size_t len2; 452 char *base, *ptr; 453 int fd, error, flags; 454 455 fd = -1; 456 ptr = MAP_FAILED; 457 if (name == NULL || strlen(name) == 0) { 458 errno = EINVAL; 459 goto done; 460 } 461 462 error = vm_alloc_memseg(ctx, segid, len, name); 463 if (error) 464 goto done; 465 466 strlcpy(pathname, "/dev/vmm/", sizeof(pathname)); 467 strlcat(pathname, ctx->name, sizeof(pathname)); 468 strlcat(pathname, ".", sizeof(pathname)); 469 strlcat(pathname, name, sizeof(pathname)); 470 471 fd = open(pathname, O_RDWR); 472 if (fd < 0) 473 goto done; 474 475 /* 476 * Stake out a contiguous region covering the device memory and the 477 * adjoining guard regions. 478 */ 479 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE; 480 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 481 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0); 482 if (base == MAP_FAILED) 483 goto done; 484 485 flags = MAP_SHARED | MAP_FIXED; 486 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 487 flags |= MAP_NOCORE; 488 489 /* mmap the devmem region in the host address space */ 490 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0); 491 done: 492 if (fd >= 0) 493 close(fd); 494 return (ptr); 495 } 496 497 int 498 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 499 uint64_t base, uint32_t limit, uint32_t access) 500 { 501 int error; 502 struct vm_seg_desc vmsegdesc; 503 504 bzero(&vmsegdesc, sizeof(vmsegdesc)); 505 vmsegdesc.cpuid = vcpu; 506 vmsegdesc.regnum = reg; 507 vmsegdesc.desc.base = base; 508 vmsegdesc.desc.limit = limit; 509 vmsegdesc.desc.access = access; 510 511 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 512 return (error); 513 } 514 515 int 516 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 517 uint64_t *base, uint32_t *limit, uint32_t *access) 518 { 519 int error; 520 struct vm_seg_desc vmsegdesc; 521 522 bzero(&vmsegdesc, sizeof(vmsegdesc)); 523 vmsegdesc.cpuid = vcpu; 524 vmsegdesc.regnum = reg; 525 526 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 527 if (error == 0) { 528 *base = vmsegdesc.desc.base; 529 *limit = vmsegdesc.desc.limit; 530 *access = vmsegdesc.desc.access; 531 } 532 return (error); 533 } 534 535 int 536 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 537 { 538 int error; 539 540 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 541 &seg_desc->access); 542 return (error); 543 } 544 545 int 546 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 547 { 548 int error; 549 struct vm_register vmreg; 550 551 bzero(&vmreg, sizeof(vmreg)); 552 vmreg.cpuid = vcpu; 553 vmreg.regnum = reg; 554 vmreg.regval = val; 555 556 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 557 return (error); 558 } 559 560 int 561 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 562 { 563 int error; 564 struct vm_register vmreg; 565 566 bzero(&vmreg, sizeof(vmreg)); 567 vmreg.cpuid = vcpu; 568 vmreg.regnum = reg; 569 570 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 571 *ret_val = vmreg.regval; 572 return (error); 573 } 574 575 int 576 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit) 577 { 578 int error; 579 struct vm_run vmrun; 580 581 bzero(&vmrun, sizeof(vmrun)); 582 vmrun.cpuid = vcpu; 583 584 error = ioctl(ctx->fd, VM_RUN, &vmrun); 585 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 586 return (error); 587 } 588 589 int 590 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 591 { 592 struct vm_suspend vmsuspend; 593 594 bzero(&vmsuspend, sizeof(vmsuspend)); 595 vmsuspend.how = how; 596 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 597 } 598 599 int 600 vm_reinit(struct vmctx *ctx) 601 { 602 603 return (ioctl(ctx->fd, VM_REINIT, 0)); 604 } 605 606 int 607 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid, 608 uint32_t errcode, int restart_instruction) 609 { 610 struct vm_exception exc; 611 612 exc.cpuid = vcpu; 613 exc.vector = vector; 614 exc.error_code = errcode; 615 exc.error_code_valid = errcode_valid; 616 exc.restart_instruction = restart_instruction; 617 618 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 619 } 620 621 int 622 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 623 { 624 /* 625 * The apic id associated with the 'vcpu' has the same numerical value 626 * as the 'vcpu' itself. 627 */ 628 return (apicid); 629 } 630 631 int 632 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 633 { 634 struct vm_lapic_irq vmirq; 635 636 bzero(&vmirq, sizeof(vmirq)); 637 vmirq.cpuid = vcpu; 638 vmirq.vector = vector; 639 640 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 641 } 642 643 int 644 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 645 { 646 struct vm_lapic_irq vmirq; 647 648 bzero(&vmirq, sizeof(vmirq)); 649 vmirq.cpuid = vcpu; 650 vmirq.vector = vector; 651 652 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 653 } 654 655 int 656 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 657 { 658 struct vm_lapic_msi vmmsi; 659 660 bzero(&vmmsi, sizeof(vmmsi)); 661 vmmsi.addr = addr; 662 vmmsi.msg = msg; 663 664 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 665 } 666 667 int 668 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 669 { 670 struct vm_ioapic_irq ioapic_irq; 671 672 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 673 ioapic_irq.irq = irq; 674 675 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 676 } 677 678 int 679 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 680 { 681 struct vm_ioapic_irq ioapic_irq; 682 683 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 684 ioapic_irq.irq = irq; 685 686 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 687 } 688 689 int 690 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 691 { 692 struct vm_ioapic_irq ioapic_irq; 693 694 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 695 ioapic_irq.irq = irq; 696 697 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 698 } 699 700 int 701 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 702 { 703 704 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 705 } 706 707 int 708 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 709 { 710 struct vm_isa_irq isa_irq; 711 712 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 713 isa_irq.atpic_irq = atpic_irq; 714 isa_irq.ioapic_irq = ioapic_irq; 715 716 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 717 } 718 719 int 720 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 721 { 722 struct vm_isa_irq isa_irq; 723 724 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 725 isa_irq.atpic_irq = atpic_irq; 726 isa_irq.ioapic_irq = ioapic_irq; 727 728 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 729 } 730 731 int 732 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 733 { 734 struct vm_isa_irq isa_irq; 735 736 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 737 isa_irq.atpic_irq = atpic_irq; 738 isa_irq.ioapic_irq = ioapic_irq; 739 740 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 741 } 742 743 int 744 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 745 enum vm_intr_trigger trigger) 746 { 747 struct vm_isa_irq_trigger isa_irq_trigger; 748 749 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 750 isa_irq_trigger.atpic_irq = atpic_irq; 751 isa_irq_trigger.trigger = trigger; 752 753 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 754 } 755 756 int 757 vm_inject_nmi(struct vmctx *ctx, int vcpu) 758 { 759 struct vm_nmi vmnmi; 760 761 bzero(&vmnmi, sizeof(vmnmi)); 762 vmnmi.cpuid = vcpu; 763 764 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 765 } 766 767 static struct { 768 const char *name; 769 int type; 770 } capstrmap[] = { 771 { "hlt_exit", VM_CAP_HALT_EXIT }, 772 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 773 { "pause_exit", VM_CAP_PAUSE_EXIT }, 774 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 775 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 776 { 0 } 777 }; 778 779 int 780 vm_capability_name2type(const char *capname) 781 { 782 int i; 783 784 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 785 if (strcmp(capstrmap[i].name, capname) == 0) 786 return (capstrmap[i].type); 787 } 788 789 return (-1); 790 } 791 792 const char * 793 vm_capability_type2name(int type) 794 { 795 int i; 796 797 for (i = 0; capstrmap[i].name != NULL; i++) { 798 if (capstrmap[i].type == type) 799 return (capstrmap[i].name); 800 } 801 802 return (NULL); 803 } 804 805 int 806 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 807 int *retval) 808 { 809 int error; 810 struct vm_capability vmcap; 811 812 bzero(&vmcap, sizeof(vmcap)); 813 vmcap.cpuid = vcpu; 814 vmcap.captype = cap; 815 816 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 817 *retval = vmcap.capval; 818 return (error); 819 } 820 821 int 822 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 823 { 824 struct vm_capability vmcap; 825 826 bzero(&vmcap, sizeof(vmcap)); 827 vmcap.cpuid = vcpu; 828 vmcap.captype = cap; 829 vmcap.capval = val; 830 831 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 832 } 833 834 int 835 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 836 { 837 struct vm_pptdev pptdev; 838 839 bzero(&pptdev, sizeof(pptdev)); 840 pptdev.bus = bus; 841 pptdev.slot = slot; 842 pptdev.func = func; 843 844 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 845 } 846 847 int 848 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 849 { 850 struct vm_pptdev pptdev; 851 852 bzero(&pptdev, sizeof(pptdev)); 853 pptdev.bus = bus; 854 pptdev.slot = slot; 855 pptdev.func = func; 856 857 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 858 } 859 860 int 861 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 862 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 863 { 864 struct vm_pptdev_mmio pptmmio; 865 866 bzero(&pptmmio, sizeof(pptmmio)); 867 pptmmio.bus = bus; 868 pptmmio.slot = slot; 869 pptmmio.func = func; 870 pptmmio.gpa = gpa; 871 pptmmio.len = len; 872 pptmmio.hpa = hpa; 873 874 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 875 } 876 877 int 878 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 879 uint64_t addr, uint64_t msg, int numvec) 880 { 881 struct vm_pptdev_msi pptmsi; 882 883 bzero(&pptmsi, sizeof(pptmsi)); 884 pptmsi.vcpu = vcpu; 885 pptmsi.bus = bus; 886 pptmsi.slot = slot; 887 pptmsi.func = func; 888 pptmsi.msg = msg; 889 pptmsi.addr = addr; 890 pptmsi.numvec = numvec; 891 892 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 893 } 894 895 int 896 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 897 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 898 { 899 struct vm_pptdev_msix pptmsix; 900 901 bzero(&pptmsix, sizeof(pptmsix)); 902 pptmsix.vcpu = vcpu; 903 pptmsix.bus = bus; 904 pptmsix.slot = slot; 905 pptmsix.func = func; 906 pptmsix.idx = idx; 907 pptmsix.msg = msg; 908 pptmsix.addr = addr; 909 pptmsix.vector_control = vector_control; 910 911 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 912 } 913 914 uint64_t * 915 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 916 int *ret_entries) 917 { 918 int error; 919 920 static struct vm_stats vmstats; 921 922 vmstats.cpuid = vcpu; 923 924 error = ioctl(ctx->fd, VM_STATS, &vmstats); 925 if (error == 0) { 926 if (ret_entries) 927 *ret_entries = vmstats.num_entries; 928 if (ret_tv) 929 *ret_tv = vmstats.tv; 930 return (vmstats.statbuf); 931 } else 932 return (NULL); 933 } 934 935 const char * 936 vm_get_stat_desc(struct vmctx *ctx, int index) 937 { 938 static struct vm_stat_desc statdesc; 939 940 statdesc.index = index; 941 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 942 return (statdesc.desc); 943 else 944 return (NULL); 945 } 946 947 int 948 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 949 { 950 int error; 951 struct vm_x2apic x2apic; 952 953 bzero(&x2apic, sizeof(x2apic)); 954 x2apic.cpuid = vcpu; 955 956 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 957 *state = x2apic.state; 958 return (error); 959 } 960 961 int 962 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 963 { 964 int error; 965 struct vm_x2apic x2apic; 966 967 bzero(&x2apic, sizeof(x2apic)); 968 x2apic.cpuid = vcpu; 969 x2apic.state = state; 970 971 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 972 973 return (error); 974 } 975 976 /* 977 * From Intel Vol 3a: 978 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 979 */ 980 int 981 vcpu_reset(struct vmctx *vmctx, int vcpu) 982 { 983 int error; 984 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 985 uint32_t desc_access, desc_limit; 986 uint16_t sel; 987 988 zero = 0; 989 990 rflags = 0x2; 991 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 992 if (error) 993 goto done; 994 995 rip = 0xfff0; 996 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 997 goto done; 998 999 cr0 = CR0_NE; 1000 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 1001 goto done; 1002 1003 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 1004 goto done; 1005 1006 cr4 = 0; 1007 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 1008 goto done; 1009 1010 /* 1011 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 1012 */ 1013 desc_base = 0xffff0000; 1014 desc_limit = 0xffff; 1015 desc_access = 0x0093; 1016 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 1017 desc_base, desc_limit, desc_access); 1018 if (error) 1019 goto done; 1020 1021 sel = 0xf000; 1022 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 1023 goto done; 1024 1025 /* 1026 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 1027 */ 1028 desc_base = 0; 1029 desc_limit = 0xffff; 1030 desc_access = 0x0093; 1031 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 1032 desc_base, desc_limit, desc_access); 1033 if (error) 1034 goto done; 1035 1036 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 1037 desc_base, desc_limit, desc_access); 1038 if (error) 1039 goto done; 1040 1041 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 1042 desc_base, desc_limit, desc_access); 1043 if (error) 1044 goto done; 1045 1046 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 1047 desc_base, desc_limit, desc_access); 1048 if (error) 1049 goto done; 1050 1051 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 1052 desc_base, desc_limit, desc_access); 1053 if (error) 1054 goto done; 1055 1056 sel = 0; 1057 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 1058 goto done; 1059 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 1060 goto done; 1061 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 1062 goto done; 1063 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 1064 goto done; 1065 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 1066 goto done; 1067 1068 /* General purpose registers */ 1069 rdx = 0xf00; 1070 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 1071 goto done; 1072 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 1073 goto done; 1074 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 1075 goto done; 1076 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 1077 goto done; 1078 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 1079 goto done; 1080 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 1081 goto done; 1082 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 1083 goto done; 1084 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 1085 goto done; 1086 1087 /* GDTR, IDTR */ 1088 desc_base = 0; 1089 desc_limit = 0xffff; 1090 desc_access = 0; 1091 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 1092 desc_base, desc_limit, desc_access); 1093 if (error != 0) 1094 goto done; 1095 1096 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 1097 desc_base, desc_limit, desc_access); 1098 if (error != 0) 1099 goto done; 1100 1101 /* TR */ 1102 desc_base = 0; 1103 desc_limit = 0xffff; 1104 desc_access = 0x0000008b; 1105 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 1106 if (error) 1107 goto done; 1108 1109 sel = 0; 1110 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 1111 goto done; 1112 1113 /* LDTR */ 1114 desc_base = 0; 1115 desc_limit = 0xffff; 1116 desc_access = 0x00000082; 1117 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 1118 desc_limit, desc_access); 1119 if (error) 1120 goto done; 1121 1122 sel = 0; 1123 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 1124 goto done; 1125 1126 /* XXX cr2, debug registers */ 1127 1128 error = 0; 1129 done: 1130 return (error); 1131 } 1132 1133 int 1134 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 1135 { 1136 int error, i; 1137 struct vm_gpa_pte gpapte; 1138 1139 bzero(&gpapte, sizeof(gpapte)); 1140 gpapte.gpa = gpa; 1141 1142 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 1143 1144 if (error == 0) { 1145 *num = gpapte.ptenum; 1146 for (i = 0; i < gpapte.ptenum; i++) 1147 pte[i] = gpapte.pte[i]; 1148 } 1149 1150 return (error); 1151 } 1152 1153 int 1154 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 1155 { 1156 int error; 1157 struct vm_hpet_cap cap; 1158 1159 bzero(&cap, sizeof(struct vm_hpet_cap)); 1160 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 1161 if (capabilities != NULL) 1162 *capabilities = cap.capabilities; 1163 return (error); 1164 } 1165 1166 int 1167 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1168 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1169 { 1170 struct vm_gla2gpa gg; 1171 int error; 1172 1173 bzero(&gg, sizeof(struct vm_gla2gpa)); 1174 gg.vcpuid = vcpu; 1175 gg.prot = prot; 1176 gg.gla = gla; 1177 gg.paging = *paging; 1178 1179 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 1180 if (error == 0) { 1181 *fault = gg.fault; 1182 *gpa = gg.gpa; 1183 } 1184 return (error); 1185 } 1186 1187 #ifndef min 1188 #define min(a,b) (((a) < (b)) ? (a) : (b)) 1189 #endif 1190 1191 int 1192 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1193 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, 1194 int *fault) 1195 { 1196 void *va; 1197 uint64_t gpa; 1198 int error, i, n, off; 1199 1200 for (i = 0; i < iovcnt; i++) { 1201 iov[i].iov_base = 0; 1202 iov[i].iov_len = 0; 1203 } 1204 1205 while (len) { 1206 assert(iovcnt > 0); 1207 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault); 1208 if (error || *fault) 1209 return (error); 1210 1211 off = gpa & PAGE_MASK; 1212 n = min(len, PAGE_SIZE - off); 1213 1214 va = vm_map_gpa(ctx, gpa, n); 1215 if (va == NULL) 1216 return (EFAULT); 1217 1218 iov->iov_base = va; 1219 iov->iov_len = n; 1220 iov++; 1221 iovcnt--; 1222 1223 gla += n; 1224 len -= n; 1225 } 1226 return (0); 1227 } 1228 1229 void 1230 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt) 1231 { 1232 1233 return; 1234 } 1235 1236 void 1237 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1238 { 1239 const char *src; 1240 char *dst; 1241 size_t n; 1242 1243 dst = vp; 1244 while (len) { 1245 assert(iov->iov_len); 1246 n = min(len, iov->iov_len); 1247 src = iov->iov_base; 1248 bcopy(src, dst, n); 1249 1250 iov++; 1251 dst += n; 1252 len -= n; 1253 } 1254 } 1255 1256 void 1257 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1258 size_t len) 1259 { 1260 const char *src; 1261 char *dst; 1262 size_t n; 1263 1264 src = vp; 1265 while (len) { 1266 assert(iov->iov_len); 1267 n = min(len, iov->iov_len); 1268 dst = iov->iov_base; 1269 bcopy(src, dst, n); 1270 1271 iov++; 1272 src += n; 1273 len -= n; 1274 } 1275 } 1276 1277 static int 1278 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1279 { 1280 struct vm_cpuset vm_cpuset; 1281 int error; 1282 1283 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1284 vm_cpuset.which = which; 1285 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1286 vm_cpuset.cpus = cpus; 1287 1288 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1289 return (error); 1290 } 1291 1292 int 1293 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1294 { 1295 1296 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1297 } 1298 1299 int 1300 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1301 { 1302 1303 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1304 } 1305 1306 int 1307 vm_activate_cpu(struct vmctx *ctx, int vcpu) 1308 { 1309 struct vm_activate_cpu ac; 1310 int error; 1311 1312 bzero(&ac, sizeof(struct vm_activate_cpu)); 1313 ac.vcpuid = vcpu; 1314 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1315 return (error); 1316 } 1317 1318 int 1319 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1320 { 1321 struct vm_intinfo vmii; 1322 int error; 1323 1324 bzero(&vmii, sizeof(struct vm_intinfo)); 1325 vmii.vcpuid = vcpu; 1326 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1327 if (error == 0) { 1328 *info1 = vmii.info1; 1329 *info2 = vmii.info2; 1330 } 1331 return (error); 1332 } 1333 1334 int 1335 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1336 { 1337 struct vm_intinfo vmii; 1338 int error; 1339 1340 bzero(&vmii, sizeof(struct vm_intinfo)); 1341 vmii.vcpuid = vcpu; 1342 vmii.info1 = info1; 1343 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1344 return (error); 1345 } 1346 1347 int 1348 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value) 1349 { 1350 struct vm_rtc_data rtcdata; 1351 int error; 1352 1353 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1354 rtcdata.offset = offset; 1355 rtcdata.value = value; 1356 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata); 1357 return (error); 1358 } 1359 1360 int 1361 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval) 1362 { 1363 struct vm_rtc_data rtcdata; 1364 int error; 1365 1366 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1367 rtcdata.offset = offset; 1368 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata); 1369 if (error == 0) 1370 *retval = rtcdata.value; 1371 return (error); 1372 } 1373 1374 int 1375 vm_rtc_settime(struct vmctx *ctx, time_t secs) 1376 { 1377 struct vm_rtc_time rtctime; 1378 int error; 1379 1380 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1381 rtctime.secs = secs; 1382 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime); 1383 return (error); 1384 } 1385 1386 int 1387 vm_rtc_gettime(struct vmctx *ctx, time_t *secs) 1388 { 1389 struct vm_rtc_time rtctime; 1390 int error; 1391 1392 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1393 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime); 1394 if (error == 0) 1395 *secs = rtctime.secs; 1396 return (error); 1397 } 1398 1399 int 1400 vm_restart_instruction(void *arg, int vcpu) 1401 { 1402 struct vmctx *ctx = arg; 1403 1404 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu)); 1405 } 1406