1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/types.h> 33 #include <sys/sysctl.h> 34 #include <sys/ioctl.h> 35 #include <sys/mman.h> 36 37 #include <machine/specialreg.h> 38 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <assert.h> 42 #include <string.h> 43 #include <fcntl.h> 44 #include <unistd.h> 45 46 #include <libutil.h> 47 48 #include <machine/vmm.h> 49 #include <machine/vmm_dev.h> 50 51 #include "vmmapi.h" 52 53 #define MB (1024 * 1024UL) 54 #define GB (1024 * 1024 * 1024UL) 55 56 struct vmctx { 57 int fd; 58 uint32_t lowmem_limit; 59 enum vm_mmap_style vms; 60 size_t lowmem; 61 char *lowmem_addr; 62 size_t highmem; 63 char *highmem_addr; 64 char *name; 65 }; 66 67 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 68 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 69 70 static int 71 vm_device_open(const char *name) 72 { 73 int fd, len; 74 char *vmfile; 75 76 len = strlen("/dev/vmm/") + strlen(name) + 1; 77 vmfile = malloc(len); 78 assert(vmfile != NULL); 79 snprintf(vmfile, len, "/dev/vmm/%s", name); 80 81 /* Open the device file */ 82 fd = open(vmfile, O_RDWR, 0); 83 84 free(vmfile); 85 return (fd); 86 } 87 88 int 89 vm_create(const char *name) 90 { 91 92 return (CREATE((char *)name)); 93 } 94 95 struct vmctx * 96 vm_open(const char *name) 97 { 98 struct vmctx *vm; 99 100 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 101 assert(vm != NULL); 102 103 vm->fd = -1; 104 vm->lowmem_limit = 3 * GB; 105 vm->name = (char *)(vm + 1); 106 strcpy(vm->name, name); 107 108 if ((vm->fd = vm_device_open(vm->name)) < 0) 109 goto err; 110 111 return (vm); 112 err: 113 vm_destroy(vm); 114 return (NULL); 115 } 116 117 void 118 vm_destroy(struct vmctx *vm) 119 { 120 assert(vm != NULL); 121 122 if (vm->fd >= 0) 123 close(vm->fd); 124 DESTROY(vm->name); 125 126 free(vm); 127 } 128 129 int 130 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 131 { 132 char *endptr; 133 size_t optval; 134 int error; 135 136 optval = strtoul(optarg, &endptr, 0); 137 if (*optarg != '\0' && *endptr == '\0') { 138 /* 139 * For the sake of backward compatibility if the memory size 140 * specified on the command line is less than a megabyte then 141 * it is interpreted as being in units of MB. 142 */ 143 if (optval < MB) 144 optval *= MB; 145 *ret_memsize = optval; 146 error = 0; 147 } else 148 error = expand_number(optarg, ret_memsize); 149 150 return (error); 151 } 152 153 int 154 vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len, 155 int *wired) 156 { 157 int error; 158 struct vm_memory_segment seg; 159 160 bzero(&seg, sizeof(seg)); 161 seg.gpa = gpa; 162 error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg); 163 *ret_len = seg.len; 164 if (wired != NULL) 165 *wired = seg.wired; 166 return (error); 167 } 168 169 uint32_t 170 vm_get_lowmem_limit(struct vmctx *ctx) 171 { 172 173 return (ctx->lowmem_limit); 174 } 175 176 void 177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 178 { 179 180 ctx->lowmem_limit = limit; 181 } 182 183 static int 184 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr) 185 { 186 int error; 187 struct vm_memory_segment seg; 188 189 /* 190 * Create and optionally map 'len' bytes of memory at guest 191 * physical address 'gpa' 192 */ 193 bzero(&seg, sizeof(seg)); 194 seg.gpa = gpa; 195 seg.len = len; 196 error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg); 197 if (error == 0 && addr != NULL) { 198 *addr = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, 199 ctx->fd, gpa); 200 } 201 return (error); 202 } 203 204 int 205 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 206 { 207 char **addr; 208 int error; 209 210 /* XXX VM_MMAP_SPARSE not implemented yet */ 211 assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL); 212 ctx->vms = vms; 213 214 /* 215 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 216 * create another 'highmem' segment above 4GB for the remainder. 217 */ 218 if (memsize > ctx->lowmem_limit) { 219 ctx->lowmem = ctx->lowmem_limit; 220 ctx->highmem = memsize - ctx->lowmem; 221 } else { 222 ctx->lowmem = memsize; 223 ctx->highmem = 0; 224 } 225 226 if (ctx->lowmem > 0) { 227 addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL; 228 error = setup_memory_segment(ctx, 0, ctx->lowmem, addr); 229 if (error) 230 return (error); 231 } 232 233 if (ctx->highmem > 0) { 234 addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL; 235 error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr); 236 if (error) 237 return (error); 238 } 239 240 return (0); 241 } 242 243 void * 244 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 245 { 246 247 /* XXX VM_MMAP_SPARSE not implemented yet */ 248 assert(ctx->vms == VM_MMAP_ALL); 249 250 if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem) 251 return ((void *)(ctx->lowmem_addr + gaddr)); 252 253 if (gaddr >= 4*GB) { 254 gaddr -= 4*GB; 255 if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem) 256 return ((void *)(ctx->highmem_addr + gaddr)); 257 } 258 259 return (NULL); 260 } 261 262 int 263 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 264 uint64_t base, uint32_t limit, uint32_t access) 265 { 266 int error; 267 struct vm_seg_desc vmsegdesc; 268 269 bzero(&vmsegdesc, sizeof(vmsegdesc)); 270 vmsegdesc.cpuid = vcpu; 271 vmsegdesc.regnum = reg; 272 vmsegdesc.desc.base = base; 273 vmsegdesc.desc.limit = limit; 274 vmsegdesc.desc.access = access; 275 276 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 277 return (error); 278 } 279 280 int 281 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 282 uint64_t *base, uint32_t *limit, uint32_t *access) 283 { 284 int error; 285 struct vm_seg_desc vmsegdesc; 286 287 bzero(&vmsegdesc, sizeof(vmsegdesc)); 288 vmsegdesc.cpuid = vcpu; 289 vmsegdesc.regnum = reg; 290 291 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 292 if (error == 0) { 293 *base = vmsegdesc.desc.base; 294 *limit = vmsegdesc.desc.limit; 295 *access = vmsegdesc.desc.access; 296 } 297 return (error); 298 } 299 300 int 301 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 302 { 303 int error; 304 struct vm_register vmreg; 305 306 bzero(&vmreg, sizeof(vmreg)); 307 vmreg.cpuid = vcpu; 308 vmreg.regnum = reg; 309 vmreg.regval = val; 310 311 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 312 return (error); 313 } 314 315 int 316 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 317 { 318 int error; 319 struct vm_register vmreg; 320 321 bzero(&vmreg, sizeof(vmreg)); 322 vmreg.cpuid = vcpu; 323 vmreg.regnum = reg; 324 325 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 326 *ret_val = vmreg.regval; 327 return (error); 328 } 329 330 int 331 vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit) 332 { 333 int error; 334 struct vm_run vmrun; 335 336 bzero(&vmrun, sizeof(vmrun)); 337 vmrun.cpuid = vcpu; 338 vmrun.rip = rip; 339 340 error = ioctl(ctx->fd, VM_RUN, &vmrun); 341 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 342 return (error); 343 } 344 345 static int 346 vm_inject_exception_real(struct vmctx *ctx, int vcpu, int vector, 347 int error_code, int error_code_valid) 348 { 349 struct vm_exception exc; 350 351 bzero(&exc, sizeof(exc)); 352 exc.cpuid = vcpu; 353 exc.vector = vector; 354 exc.error_code = error_code; 355 exc.error_code_valid = error_code_valid; 356 357 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 358 } 359 360 int 361 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector) 362 { 363 364 return (vm_inject_exception_real(ctx, vcpu, vector, 0, 0)); 365 } 366 367 int 368 vm_inject_exception2(struct vmctx *ctx, int vcpu, int vector, int errcode) 369 { 370 371 return (vm_inject_exception_real(ctx, vcpu, vector, errcode, 1)); 372 } 373 374 int 375 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 376 { 377 /* 378 * The apic id associated with the 'vcpu' has the same numerical value 379 * as the 'vcpu' itself. 380 */ 381 return (apicid); 382 } 383 384 int 385 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 386 { 387 struct vm_lapic_irq vmirq; 388 389 bzero(&vmirq, sizeof(vmirq)); 390 vmirq.cpuid = vcpu; 391 vmirq.vector = vector; 392 393 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 394 } 395 396 int 397 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 398 { 399 struct vm_lapic_irq vmirq; 400 401 bzero(&vmirq, sizeof(vmirq)); 402 vmirq.cpuid = vcpu; 403 vmirq.vector = vector; 404 405 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 406 } 407 408 int 409 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 410 { 411 struct vm_lapic_msi vmmsi; 412 413 bzero(&vmmsi, sizeof(vmmsi)); 414 vmmsi.addr = addr; 415 vmmsi.msg = msg; 416 417 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 418 } 419 420 int 421 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 422 { 423 struct vm_ioapic_irq ioapic_irq; 424 425 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 426 ioapic_irq.irq = irq; 427 428 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 429 } 430 431 int 432 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 433 { 434 struct vm_ioapic_irq ioapic_irq; 435 436 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 437 ioapic_irq.irq = irq; 438 439 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 440 } 441 442 int 443 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 444 { 445 struct vm_ioapic_irq ioapic_irq; 446 447 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 448 ioapic_irq.irq = irq; 449 450 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 451 } 452 453 int 454 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 455 { 456 457 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 458 } 459 460 int 461 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 462 { 463 struct vm_isa_irq isa_irq; 464 465 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 466 isa_irq.atpic_irq = atpic_irq; 467 isa_irq.ioapic_irq = ioapic_irq; 468 469 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 470 } 471 472 int 473 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 474 { 475 struct vm_isa_irq isa_irq; 476 477 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 478 isa_irq.atpic_irq = atpic_irq; 479 isa_irq.ioapic_irq = ioapic_irq; 480 481 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 482 } 483 484 int 485 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 486 { 487 struct vm_isa_irq isa_irq; 488 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 489 isa_irq.atpic_irq = atpic_irq; 490 isa_irq.ioapic_irq = ioapic_irq; 491 492 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 493 } 494 495 int 496 vm_inject_nmi(struct vmctx *ctx, int vcpu) 497 { 498 struct vm_nmi vmnmi; 499 500 bzero(&vmnmi, sizeof(vmnmi)); 501 vmnmi.cpuid = vcpu; 502 503 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 504 } 505 506 static struct { 507 const char *name; 508 int type; 509 } capstrmap[] = { 510 { "hlt_exit", VM_CAP_HALT_EXIT }, 511 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 512 { "pause_exit", VM_CAP_PAUSE_EXIT }, 513 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 514 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 515 { 0 } 516 }; 517 518 int 519 vm_capability_name2type(const char *capname) 520 { 521 int i; 522 523 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 524 if (strcmp(capstrmap[i].name, capname) == 0) 525 return (capstrmap[i].type); 526 } 527 528 return (-1); 529 } 530 531 const char * 532 vm_capability_type2name(int type) 533 { 534 int i; 535 536 for (i = 0; capstrmap[i].name != NULL; i++) { 537 if (capstrmap[i].type == type) 538 return (capstrmap[i].name); 539 } 540 541 return (NULL); 542 } 543 544 int 545 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 546 int *retval) 547 { 548 int error; 549 struct vm_capability vmcap; 550 551 bzero(&vmcap, sizeof(vmcap)); 552 vmcap.cpuid = vcpu; 553 vmcap.captype = cap; 554 555 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 556 *retval = vmcap.capval; 557 return (error); 558 } 559 560 int 561 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 562 { 563 struct vm_capability vmcap; 564 565 bzero(&vmcap, sizeof(vmcap)); 566 vmcap.cpuid = vcpu; 567 vmcap.captype = cap; 568 vmcap.capval = val; 569 570 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 571 } 572 573 int 574 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 575 { 576 struct vm_pptdev pptdev; 577 578 bzero(&pptdev, sizeof(pptdev)); 579 pptdev.bus = bus; 580 pptdev.slot = slot; 581 pptdev.func = func; 582 583 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 584 } 585 586 int 587 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 588 { 589 struct vm_pptdev pptdev; 590 591 bzero(&pptdev, sizeof(pptdev)); 592 pptdev.bus = bus; 593 pptdev.slot = slot; 594 pptdev.func = func; 595 596 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 597 } 598 599 int 600 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 601 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 602 { 603 struct vm_pptdev_mmio pptmmio; 604 605 bzero(&pptmmio, sizeof(pptmmio)); 606 pptmmio.bus = bus; 607 pptmmio.slot = slot; 608 pptmmio.func = func; 609 pptmmio.gpa = gpa; 610 pptmmio.len = len; 611 pptmmio.hpa = hpa; 612 613 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 614 } 615 616 int 617 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 618 uint64_t addr, uint64_t msg, int numvec) 619 { 620 struct vm_pptdev_msi pptmsi; 621 622 bzero(&pptmsi, sizeof(pptmsi)); 623 pptmsi.vcpu = vcpu; 624 pptmsi.bus = bus; 625 pptmsi.slot = slot; 626 pptmsi.func = func; 627 pptmsi.msg = msg; 628 pptmsi.addr = addr; 629 pptmsi.numvec = numvec; 630 631 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 632 } 633 634 int 635 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 636 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 637 { 638 struct vm_pptdev_msix pptmsix; 639 640 bzero(&pptmsix, sizeof(pptmsix)); 641 pptmsix.vcpu = vcpu; 642 pptmsix.bus = bus; 643 pptmsix.slot = slot; 644 pptmsix.func = func; 645 pptmsix.idx = idx; 646 pptmsix.msg = msg; 647 pptmsix.addr = addr; 648 pptmsix.vector_control = vector_control; 649 650 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 651 } 652 653 uint64_t * 654 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 655 int *ret_entries) 656 { 657 int error; 658 659 static struct vm_stats vmstats; 660 661 vmstats.cpuid = vcpu; 662 663 error = ioctl(ctx->fd, VM_STATS, &vmstats); 664 if (error == 0) { 665 if (ret_entries) 666 *ret_entries = vmstats.num_entries; 667 if (ret_tv) 668 *ret_tv = vmstats.tv; 669 return (vmstats.statbuf); 670 } else 671 return (NULL); 672 } 673 674 const char * 675 vm_get_stat_desc(struct vmctx *ctx, int index) 676 { 677 static struct vm_stat_desc statdesc; 678 679 statdesc.index = index; 680 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 681 return (statdesc.desc); 682 else 683 return (NULL); 684 } 685 686 int 687 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 688 { 689 int error; 690 struct vm_x2apic x2apic; 691 692 bzero(&x2apic, sizeof(x2apic)); 693 x2apic.cpuid = vcpu; 694 695 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 696 *state = x2apic.state; 697 return (error); 698 } 699 700 int 701 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 702 { 703 int error; 704 struct vm_x2apic x2apic; 705 706 bzero(&x2apic, sizeof(x2apic)); 707 x2apic.cpuid = vcpu; 708 x2apic.state = state; 709 710 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 711 712 return (error); 713 } 714 715 /* 716 * From Intel Vol 3a: 717 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 718 */ 719 int 720 vcpu_reset(struct vmctx *vmctx, int vcpu) 721 { 722 int error; 723 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 724 uint32_t desc_access, desc_limit; 725 uint16_t sel; 726 727 zero = 0; 728 729 rflags = 0x2; 730 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 731 if (error) 732 goto done; 733 734 rip = 0xfff0; 735 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 736 goto done; 737 738 cr0 = CR0_NE; 739 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 740 goto done; 741 742 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 743 goto done; 744 745 cr4 = 0; 746 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 747 goto done; 748 749 /* 750 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 751 */ 752 desc_base = 0xffff0000; 753 desc_limit = 0xffff; 754 desc_access = 0x0093; 755 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 756 desc_base, desc_limit, desc_access); 757 if (error) 758 goto done; 759 760 sel = 0xf000; 761 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 762 goto done; 763 764 /* 765 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 766 */ 767 desc_base = 0; 768 desc_limit = 0xffff; 769 desc_access = 0x0093; 770 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 771 desc_base, desc_limit, desc_access); 772 if (error) 773 goto done; 774 775 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 776 desc_base, desc_limit, desc_access); 777 if (error) 778 goto done; 779 780 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 781 desc_base, desc_limit, desc_access); 782 if (error) 783 goto done; 784 785 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 786 desc_base, desc_limit, desc_access); 787 if (error) 788 goto done; 789 790 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 791 desc_base, desc_limit, desc_access); 792 if (error) 793 goto done; 794 795 sel = 0; 796 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 797 goto done; 798 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 799 goto done; 800 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 801 goto done; 802 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 803 goto done; 804 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 805 goto done; 806 807 /* General purpose registers */ 808 rdx = 0xf00; 809 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 810 goto done; 811 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 812 goto done; 813 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 814 goto done; 815 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 816 goto done; 817 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 818 goto done; 819 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 820 goto done; 821 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 822 goto done; 823 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 824 goto done; 825 826 /* GDTR, IDTR */ 827 desc_base = 0; 828 desc_limit = 0xffff; 829 desc_access = 0; 830 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 831 desc_base, desc_limit, desc_access); 832 if (error != 0) 833 goto done; 834 835 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 836 desc_base, desc_limit, desc_access); 837 if (error != 0) 838 goto done; 839 840 /* TR */ 841 desc_base = 0; 842 desc_limit = 0xffff; 843 desc_access = 0x0000008b; 844 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 845 if (error) 846 goto done; 847 848 sel = 0; 849 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 850 goto done; 851 852 /* LDTR */ 853 desc_base = 0; 854 desc_limit = 0xffff; 855 desc_access = 0x00000082; 856 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 857 desc_limit, desc_access); 858 if (error) 859 goto done; 860 861 sel = 0; 862 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 863 goto done; 864 865 /* XXX cr2, debug registers */ 866 867 error = 0; 868 done: 869 return (error); 870 } 871 872 int 873 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 874 { 875 int error, i; 876 struct vm_gpa_pte gpapte; 877 878 bzero(&gpapte, sizeof(gpapte)); 879 gpapte.gpa = gpa; 880 881 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 882 883 if (error == 0) { 884 *num = gpapte.ptenum; 885 for (i = 0; i < gpapte.ptenum; i++) 886 pte[i] = gpapte.pte[i]; 887 } 888 889 return (error); 890 } 891 892 int 893 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 894 { 895 int error; 896 struct vm_hpet_cap cap; 897 898 bzero(&cap, sizeof(struct vm_hpet_cap)); 899 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 900 if (capabilities != NULL) 901 *capabilities = cap.capabilities; 902 return (error); 903 } 904