1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/sysctl.h> 36 #include <sys/ioctl.h> 37 #include <sys/mman.h> 38 #include <sys/_iovec.h> 39 #include <sys/cpuset.h> 40 41 #include <x86/segments.h> 42 #include <machine/specialreg.h> 43 44 #include <errno.h> 45 #include <stdio.h> 46 #include <stdlib.h> 47 #include <assert.h> 48 #include <string.h> 49 #include <fcntl.h> 50 #include <unistd.h> 51 52 #include <libutil.h> 53 54 #include <machine/vmm.h> 55 #include <machine/vmm_dev.h> 56 57 #include "vmmapi.h" 58 59 #define MB (1024 * 1024UL) 60 #define GB (1024 * 1024 * 1024UL) 61 62 /* 63 * Size of the guard region before and after the virtual address space 64 * mapping the guest physical memory. This must be a multiple of the 65 * superpage size for performance reasons. 66 */ 67 #define VM_MMAP_GUARD_SIZE (4 * MB) 68 69 #define PROT_RW (PROT_READ | PROT_WRITE) 70 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC) 71 72 struct vmctx { 73 int fd; 74 uint32_t lowmem_limit; 75 int memflags; 76 size_t lowmem; 77 size_t highmem; 78 char *baseaddr; 79 char *name; 80 }; 81 82 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 83 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 84 85 static int 86 vm_device_open(const char *name) 87 { 88 int fd, len; 89 char *vmfile; 90 91 len = strlen("/dev/vmm/") + strlen(name) + 1; 92 vmfile = malloc(len); 93 assert(vmfile != NULL); 94 snprintf(vmfile, len, "/dev/vmm/%s", name); 95 96 /* Open the device file */ 97 fd = open(vmfile, O_RDWR, 0); 98 99 free(vmfile); 100 return (fd); 101 } 102 103 int 104 vm_create(const char *name) 105 { 106 107 return (CREATE((char *)name)); 108 } 109 110 struct vmctx * 111 vm_open(const char *name) 112 { 113 struct vmctx *vm; 114 115 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 116 assert(vm != NULL); 117 118 vm->fd = -1; 119 vm->memflags = 0; 120 vm->lowmem_limit = 3 * GB; 121 vm->name = (char *)(vm + 1); 122 strcpy(vm->name, name); 123 124 if ((vm->fd = vm_device_open(vm->name)) < 0) 125 goto err; 126 127 return (vm); 128 err: 129 vm_destroy(vm); 130 return (NULL); 131 } 132 133 void 134 vm_destroy(struct vmctx *vm) 135 { 136 assert(vm != NULL); 137 138 if (vm->fd >= 0) 139 close(vm->fd); 140 DESTROY(vm->name); 141 142 free(vm); 143 } 144 145 int 146 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 147 { 148 char *endptr; 149 size_t optval; 150 int error; 151 152 optval = strtoul(optarg, &endptr, 0); 153 if (*optarg != '\0' && *endptr == '\0') { 154 /* 155 * For the sake of backward compatibility if the memory size 156 * specified on the command line is less than a megabyte then 157 * it is interpreted as being in units of MB. 158 */ 159 if (optval < MB) 160 optval *= MB; 161 *ret_memsize = optval; 162 error = 0; 163 } else 164 error = expand_number(optarg, ret_memsize); 165 166 return (error); 167 } 168 169 uint32_t 170 vm_get_lowmem_limit(struct vmctx *ctx) 171 { 172 173 return (ctx->lowmem_limit); 174 } 175 176 void 177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 178 { 179 180 ctx->lowmem_limit = limit; 181 } 182 183 void 184 vm_set_memflags(struct vmctx *ctx, int flags) 185 { 186 187 ctx->memflags = flags; 188 } 189 190 int 191 vm_get_memflags(struct vmctx *ctx) 192 { 193 194 return (ctx->memflags); 195 } 196 197 /* 198 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len). 199 */ 200 int 201 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off, 202 size_t len, int prot) 203 { 204 struct vm_memmap memmap; 205 int error, flags; 206 207 memmap.gpa = gpa; 208 memmap.segid = segid; 209 memmap.segoff = off; 210 memmap.len = len; 211 memmap.prot = prot; 212 memmap.flags = 0; 213 214 if (ctx->memflags & VM_MEM_F_WIRED) 215 memmap.flags |= VM_MEMMAP_F_WIRED; 216 217 /* 218 * If this mapping already exists then don't create it again. This 219 * is the common case for SYSMEM mappings created by bhyveload(8). 220 */ 221 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags); 222 if (error == 0 && gpa == memmap.gpa) { 223 if (segid != memmap.segid || off != memmap.segoff || 224 prot != memmap.prot || flags != memmap.flags) { 225 errno = EEXIST; 226 return (-1); 227 } else { 228 return (0); 229 } 230 } 231 232 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap); 233 return (error); 234 } 235 236 int 237 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid, 238 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags) 239 { 240 struct vm_memmap memmap; 241 int error; 242 243 bzero(&memmap, sizeof(struct vm_memmap)); 244 memmap.gpa = *gpa; 245 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap); 246 if (error == 0) { 247 *gpa = memmap.gpa; 248 *segid = memmap.segid; 249 *segoff = memmap.segoff; 250 *len = memmap.len; 251 *prot = memmap.prot; 252 *flags = memmap.flags; 253 } 254 return (error); 255 } 256 257 /* 258 * Return 0 if the segments are identical and non-zero otherwise. 259 * 260 * This is slightly complicated by the fact that only device memory segments 261 * are named. 262 */ 263 static int 264 cmpseg(size_t len, const char *str, size_t len2, const char *str2) 265 { 266 267 if (len == len2) { 268 if ((!str && !str2) || (str && str2 && !strcmp(str, str2))) 269 return (0); 270 } 271 return (-1); 272 } 273 274 static int 275 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name) 276 { 277 struct vm_memseg memseg; 278 size_t n; 279 int error; 280 281 /* 282 * If the memory segment has already been created then just return. 283 * This is the usual case for the SYSMEM segment created by userspace 284 * loaders like bhyveload(8). 285 */ 286 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name, 287 sizeof(memseg.name)); 288 if (error) 289 return (error); 290 291 if (memseg.len != 0) { 292 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) { 293 errno = EINVAL; 294 return (-1); 295 } else { 296 return (0); 297 } 298 } 299 300 bzero(&memseg, sizeof(struct vm_memseg)); 301 memseg.segid = segid; 302 memseg.len = len; 303 if (name != NULL) { 304 n = strlcpy(memseg.name, name, sizeof(memseg.name)); 305 if (n >= sizeof(memseg.name)) { 306 errno = ENAMETOOLONG; 307 return (-1); 308 } 309 } 310 311 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg); 312 return (error); 313 } 314 315 int 316 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf, 317 size_t bufsize) 318 { 319 struct vm_memseg memseg; 320 size_t n; 321 int error; 322 323 memseg.segid = segid; 324 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg); 325 if (error == 0) { 326 *lenp = memseg.len; 327 n = strlcpy(namebuf, memseg.name, bufsize); 328 if (n >= bufsize) { 329 errno = ENAMETOOLONG; 330 error = -1; 331 } 332 } 333 return (error); 334 } 335 336 static int 337 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base) 338 { 339 char *ptr; 340 int error, flags; 341 342 /* Map 'len' bytes starting at 'gpa' in the guest address space */ 343 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL); 344 if (error) 345 return (error); 346 347 flags = MAP_SHARED | MAP_FIXED; 348 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 349 flags |= MAP_NOCORE; 350 351 /* mmap into the process address space on the host */ 352 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa); 353 if (ptr == MAP_FAILED) 354 return (-1); 355 356 return (0); 357 } 358 359 int 360 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 361 { 362 size_t objsize, len; 363 vm_paddr_t gpa; 364 char *baseaddr, *ptr; 365 int error, flags; 366 367 assert(vms == VM_MMAP_ALL); 368 369 /* 370 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 371 * create another 'highmem' segment above 4GB for the remainder. 372 */ 373 if (memsize > ctx->lowmem_limit) { 374 ctx->lowmem = ctx->lowmem_limit; 375 ctx->highmem = memsize - ctx->lowmem_limit; 376 objsize = 4*GB + ctx->highmem; 377 } else { 378 ctx->lowmem = memsize; 379 ctx->highmem = 0; 380 objsize = ctx->lowmem; 381 } 382 383 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL); 384 if (error) 385 return (error); 386 387 /* 388 * Stake out a contiguous region covering the guest physical memory 389 * and the adjoining guard regions. 390 */ 391 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE; 392 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 393 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0); 394 if (ptr == MAP_FAILED) 395 return (-1); 396 397 baseaddr = ptr + VM_MMAP_GUARD_SIZE; 398 if (ctx->highmem > 0) { 399 gpa = 4*GB; 400 len = ctx->highmem; 401 error = setup_memory_segment(ctx, gpa, len, baseaddr); 402 if (error) 403 return (error); 404 } 405 406 if (ctx->lowmem > 0) { 407 gpa = 0; 408 len = ctx->lowmem; 409 error = setup_memory_segment(ctx, gpa, len, baseaddr); 410 if (error) 411 return (error); 412 } 413 414 ctx->baseaddr = baseaddr; 415 416 return (0); 417 } 418 419 /* 420 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in 421 * the lowmem or highmem regions. 422 * 423 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region. 424 * The instruction emulation code depends on this behavior. 425 */ 426 void * 427 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 428 { 429 430 if (ctx->lowmem > 0) { 431 if (gaddr < ctx->lowmem && len <= ctx->lowmem && 432 gaddr + len <= ctx->lowmem) 433 return (ctx->baseaddr + gaddr); 434 } 435 436 if (ctx->highmem > 0) { 437 if (gaddr >= 4*GB) { 438 if (gaddr < 4*GB + ctx->highmem && 439 len <= ctx->highmem && 440 gaddr + len <= 4*GB + ctx->highmem) 441 return (ctx->baseaddr + gaddr); 442 } 443 } 444 445 return (NULL); 446 } 447 448 size_t 449 vm_get_lowmem_size(struct vmctx *ctx) 450 { 451 452 return (ctx->lowmem); 453 } 454 455 size_t 456 vm_get_highmem_size(struct vmctx *ctx) 457 { 458 459 return (ctx->highmem); 460 } 461 462 void * 463 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len) 464 { 465 char pathname[MAXPATHLEN]; 466 size_t len2; 467 char *base, *ptr; 468 int fd, error, flags; 469 470 fd = -1; 471 ptr = MAP_FAILED; 472 if (name == NULL || strlen(name) == 0) { 473 errno = EINVAL; 474 goto done; 475 } 476 477 error = vm_alloc_memseg(ctx, segid, len, name); 478 if (error) 479 goto done; 480 481 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname)); 482 strlcat(pathname, ctx->name, sizeof(pathname)); 483 strlcat(pathname, ".", sizeof(pathname)); 484 strlcat(pathname, name, sizeof(pathname)); 485 486 fd = open(pathname, O_RDWR); 487 if (fd < 0) 488 goto done; 489 490 /* 491 * Stake out a contiguous region covering the device memory and the 492 * adjoining guard regions. 493 */ 494 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE; 495 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 496 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0); 497 if (base == MAP_FAILED) 498 goto done; 499 500 flags = MAP_SHARED | MAP_FIXED; 501 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 502 flags |= MAP_NOCORE; 503 504 /* mmap the devmem region in the host address space */ 505 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0); 506 done: 507 if (fd >= 0) 508 close(fd); 509 return (ptr); 510 } 511 512 int 513 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 514 uint64_t base, uint32_t limit, uint32_t access) 515 { 516 int error; 517 struct vm_seg_desc vmsegdesc; 518 519 bzero(&vmsegdesc, sizeof(vmsegdesc)); 520 vmsegdesc.cpuid = vcpu; 521 vmsegdesc.regnum = reg; 522 vmsegdesc.desc.base = base; 523 vmsegdesc.desc.limit = limit; 524 vmsegdesc.desc.access = access; 525 526 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 527 return (error); 528 } 529 530 int 531 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 532 uint64_t *base, uint32_t *limit, uint32_t *access) 533 { 534 int error; 535 struct vm_seg_desc vmsegdesc; 536 537 bzero(&vmsegdesc, sizeof(vmsegdesc)); 538 vmsegdesc.cpuid = vcpu; 539 vmsegdesc.regnum = reg; 540 541 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 542 if (error == 0) { 543 *base = vmsegdesc.desc.base; 544 *limit = vmsegdesc.desc.limit; 545 *access = vmsegdesc.desc.access; 546 } 547 return (error); 548 } 549 550 int 551 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 552 { 553 int error; 554 555 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 556 &seg_desc->access); 557 return (error); 558 } 559 560 int 561 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 562 { 563 int error; 564 struct vm_register vmreg; 565 566 bzero(&vmreg, sizeof(vmreg)); 567 vmreg.cpuid = vcpu; 568 vmreg.regnum = reg; 569 vmreg.regval = val; 570 571 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 572 return (error); 573 } 574 575 int 576 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 577 { 578 int error; 579 struct vm_register vmreg; 580 581 bzero(&vmreg, sizeof(vmreg)); 582 vmreg.cpuid = vcpu; 583 vmreg.regnum = reg; 584 585 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 586 *ret_val = vmreg.regval; 587 return (error); 588 } 589 590 int 591 vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count, 592 const int *regnums, uint64_t *regvals) 593 { 594 int error; 595 struct vm_register_set vmregset; 596 597 bzero(&vmregset, sizeof(vmregset)); 598 vmregset.cpuid = vcpu; 599 vmregset.count = count; 600 vmregset.regnums = regnums; 601 vmregset.regvals = regvals; 602 603 error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset); 604 return (error); 605 } 606 607 int 608 vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count, 609 const int *regnums, uint64_t *regvals) 610 { 611 int error; 612 struct vm_register_set vmregset; 613 614 bzero(&vmregset, sizeof(vmregset)); 615 vmregset.cpuid = vcpu; 616 vmregset.count = count; 617 vmregset.regnums = regnums; 618 vmregset.regvals = regvals; 619 620 error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset); 621 return (error); 622 } 623 624 int 625 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit) 626 { 627 int error; 628 struct vm_run vmrun; 629 630 bzero(&vmrun, sizeof(vmrun)); 631 vmrun.cpuid = vcpu; 632 633 error = ioctl(ctx->fd, VM_RUN, &vmrun); 634 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 635 return (error); 636 } 637 638 int 639 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 640 { 641 struct vm_suspend vmsuspend; 642 643 bzero(&vmsuspend, sizeof(vmsuspend)); 644 vmsuspend.how = how; 645 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 646 } 647 648 int 649 vm_reinit(struct vmctx *ctx) 650 { 651 652 return (ioctl(ctx->fd, VM_REINIT, 0)); 653 } 654 655 int 656 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid, 657 uint32_t errcode, int restart_instruction) 658 { 659 struct vm_exception exc; 660 661 exc.cpuid = vcpu; 662 exc.vector = vector; 663 exc.error_code = errcode; 664 exc.error_code_valid = errcode_valid; 665 exc.restart_instruction = restart_instruction; 666 667 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 668 } 669 670 int 671 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 672 { 673 /* 674 * The apic id associated with the 'vcpu' has the same numerical value 675 * as the 'vcpu' itself. 676 */ 677 return (apicid); 678 } 679 680 int 681 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 682 { 683 struct vm_lapic_irq vmirq; 684 685 bzero(&vmirq, sizeof(vmirq)); 686 vmirq.cpuid = vcpu; 687 vmirq.vector = vector; 688 689 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 690 } 691 692 int 693 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 694 { 695 struct vm_lapic_irq vmirq; 696 697 bzero(&vmirq, sizeof(vmirq)); 698 vmirq.cpuid = vcpu; 699 vmirq.vector = vector; 700 701 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 702 } 703 704 int 705 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 706 { 707 struct vm_lapic_msi vmmsi; 708 709 bzero(&vmmsi, sizeof(vmmsi)); 710 vmmsi.addr = addr; 711 vmmsi.msg = msg; 712 713 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 714 } 715 716 int 717 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 718 { 719 struct vm_ioapic_irq ioapic_irq; 720 721 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 722 ioapic_irq.irq = irq; 723 724 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 725 } 726 727 int 728 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 729 { 730 struct vm_ioapic_irq ioapic_irq; 731 732 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 733 ioapic_irq.irq = irq; 734 735 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 736 } 737 738 int 739 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 740 { 741 struct vm_ioapic_irq ioapic_irq; 742 743 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 744 ioapic_irq.irq = irq; 745 746 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 747 } 748 749 int 750 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 751 { 752 753 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 754 } 755 756 int 757 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 758 { 759 struct vm_isa_irq isa_irq; 760 761 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 762 isa_irq.atpic_irq = atpic_irq; 763 isa_irq.ioapic_irq = ioapic_irq; 764 765 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 766 } 767 768 int 769 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 770 { 771 struct vm_isa_irq isa_irq; 772 773 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 774 isa_irq.atpic_irq = atpic_irq; 775 isa_irq.ioapic_irq = ioapic_irq; 776 777 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 778 } 779 780 int 781 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 782 { 783 struct vm_isa_irq isa_irq; 784 785 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 786 isa_irq.atpic_irq = atpic_irq; 787 isa_irq.ioapic_irq = ioapic_irq; 788 789 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 790 } 791 792 int 793 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 794 enum vm_intr_trigger trigger) 795 { 796 struct vm_isa_irq_trigger isa_irq_trigger; 797 798 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 799 isa_irq_trigger.atpic_irq = atpic_irq; 800 isa_irq_trigger.trigger = trigger; 801 802 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 803 } 804 805 int 806 vm_inject_nmi(struct vmctx *ctx, int vcpu) 807 { 808 struct vm_nmi vmnmi; 809 810 bzero(&vmnmi, sizeof(vmnmi)); 811 vmnmi.cpuid = vcpu; 812 813 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 814 } 815 816 static struct { 817 const char *name; 818 int type; 819 } capstrmap[] = { 820 { "hlt_exit", VM_CAP_HALT_EXIT }, 821 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 822 { "pause_exit", VM_CAP_PAUSE_EXIT }, 823 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 824 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 825 { 0 } 826 }; 827 828 int 829 vm_capability_name2type(const char *capname) 830 { 831 int i; 832 833 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 834 if (strcmp(capstrmap[i].name, capname) == 0) 835 return (capstrmap[i].type); 836 } 837 838 return (-1); 839 } 840 841 const char * 842 vm_capability_type2name(int type) 843 { 844 int i; 845 846 for (i = 0; capstrmap[i].name != NULL; i++) { 847 if (capstrmap[i].type == type) 848 return (capstrmap[i].name); 849 } 850 851 return (NULL); 852 } 853 854 int 855 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 856 int *retval) 857 { 858 int error; 859 struct vm_capability vmcap; 860 861 bzero(&vmcap, sizeof(vmcap)); 862 vmcap.cpuid = vcpu; 863 vmcap.captype = cap; 864 865 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 866 *retval = vmcap.capval; 867 return (error); 868 } 869 870 int 871 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 872 { 873 struct vm_capability vmcap; 874 875 bzero(&vmcap, sizeof(vmcap)); 876 vmcap.cpuid = vcpu; 877 vmcap.captype = cap; 878 vmcap.capval = val; 879 880 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 881 } 882 883 int 884 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 885 { 886 struct vm_pptdev pptdev; 887 888 bzero(&pptdev, sizeof(pptdev)); 889 pptdev.bus = bus; 890 pptdev.slot = slot; 891 pptdev.func = func; 892 893 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 894 } 895 896 int 897 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 898 { 899 struct vm_pptdev pptdev; 900 901 bzero(&pptdev, sizeof(pptdev)); 902 pptdev.bus = bus; 903 pptdev.slot = slot; 904 pptdev.func = func; 905 906 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 907 } 908 909 int 910 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 911 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 912 { 913 struct vm_pptdev_mmio pptmmio; 914 915 bzero(&pptmmio, sizeof(pptmmio)); 916 pptmmio.bus = bus; 917 pptmmio.slot = slot; 918 pptmmio.func = func; 919 pptmmio.gpa = gpa; 920 pptmmio.len = len; 921 pptmmio.hpa = hpa; 922 923 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 924 } 925 926 int 927 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 928 uint64_t addr, uint64_t msg, int numvec) 929 { 930 struct vm_pptdev_msi pptmsi; 931 932 bzero(&pptmsi, sizeof(pptmsi)); 933 pptmsi.vcpu = vcpu; 934 pptmsi.bus = bus; 935 pptmsi.slot = slot; 936 pptmsi.func = func; 937 pptmsi.msg = msg; 938 pptmsi.addr = addr; 939 pptmsi.numvec = numvec; 940 941 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 942 } 943 944 int 945 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 946 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 947 { 948 struct vm_pptdev_msix pptmsix; 949 950 bzero(&pptmsix, sizeof(pptmsix)); 951 pptmsix.vcpu = vcpu; 952 pptmsix.bus = bus; 953 pptmsix.slot = slot; 954 pptmsix.func = func; 955 pptmsix.idx = idx; 956 pptmsix.msg = msg; 957 pptmsix.addr = addr; 958 pptmsix.vector_control = vector_control; 959 960 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 961 } 962 963 uint64_t * 964 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 965 int *ret_entries) 966 { 967 int error; 968 969 static struct vm_stats vmstats; 970 971 vmstats.cpuid = vcpu; 972 973 error = ioctl(ctx->fd, VM_STATS, &vmstats); 974 if (error == 0) { 975 if (ret_entries) 976 *ret_entries = vmstats.num_entries; 977 if (ret_tv) 978 *ret_tv = vmstats.tv; 979 return (vmstats.statbuf); 980 } else 981 return (NULL); 982 } 983 984 const char * 985 vm_get_stat_desc(struct vmctx *ctx, int index) 986 { 987 static struct vm_stat_desc statdesc; 988 989 statdesc.index = index; 990 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 991 return (statdesc.desc); 992 else 993 return (NULL); 994 } 995 996 int 997 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 998 { 999 int error; 1000 struct vm_x2apic x2apic; 1001 1002 bzero(&x2apic, sizeof(x2apic)); 1003 x2apic.cpuid = vcpu; 1004 1005 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 1006 *state = x2apic.state; 1007 return (error); 1008 } 1009 1010 int 1011 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 1012 { 1013 int error; 1014 struct vm_x2apic x2apic; 1015 1016 bzero(&x2apic, sizeof(x2apic)); 1017 x2apic.cpuid = vcpu; 1018 x2apic.state = state; 1019 1020 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 1021 1022 return (error); 1023 } 1024 1025 /* 1026 * From Intel Vol 3a: 1027 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 1028 */ 1029 int 1030 vcpu_reset(struct vmctx *vmctx, int vcpu) 1031 { 1032 int error; 1033 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 1034 uint32_t desc_access, desc_limit; 1035 uint16_t sel; 1036 1037 zero = 0; 1038 1039 rflags = 0x2; 1040 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 1041 if (error) 1042 goto done; 1043 1044 rip = 0xfff0; 1045 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 1046 goto done; 1047 1048 cr0 = CR0_NE; 1049 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 1050 goto done; 1051 1052 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 1053 goto done; 1054 1055 cr4 = 0; 1056 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 1057 goto done; 1058 1059 /* 1060 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 1061 */ 1062 desc_base = 0xffff0000; 1063 desc_limit = 0xffff; 1064 desc_access = 0x0093; 1065 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 1066 desc_base, desc_limit, desc_access); 1067 if (error) 1068 goto done; 1069 1070 sel = 0xf000; 1071 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 1072 goto done; 1073 1074 /* 1075 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 1076 */ 1077 desc_base = 0; 1078 desc_limit = 0xffff; 1079 desc_access = 0x0093; 1080 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 1081 desc_base, desc_limit, desc_access); 1082 if (error) 1083 goto done; 1084 1085 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 1086 desc_base, desc_limit, desc_access); 1087 if (error) 1088 goto done; 1089 1090 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 1091 desc_base, desc_limit, desc_access); 1092 if (error) 1093 goto done; 1094 1095 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 1096 desc_base, desc_limit, desc_access); 1097 if (error) 1098 goto done; 1099 1100 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 1101 desc_base, desc_limit, desc_access); 1102 if (error) 1103 goto done; 1104 1105 sel = 0; 1106 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 1107 goto done; 1108 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 1109 goto done; 1110 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 1111 goto done; 1112 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 1113 goto done; 1114 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 1115 goto done; 1116 1117 /* General purpose registers */ 1118 rdx = 0xf00; 1119 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 1120 goto done; 1121 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 1122 goto done; 1123 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 1124 goto done; 1125 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 1126 goto done; 1127 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 1128 goto done; 1129 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 1130 goto done; 1131 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 1132 goto done; 1133 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 1134 goto done; 1135 1136 /* GDTR, IDTR */ 1137 desc_base = 0; 1138 desc_limit = 0xffff; 1139 desc_access = 0; 1140 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 1141 desc_base, desc_limit, desc_access); 1142 if (error != 0) 1143 goto done; 1144 1145 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 1146 desc_base, desc_limit, desc_access); 1147 if (error != 0) 1148 goto done; 1149 1150 /* TR */ 1151 desc_base = 0; 1152 desc_limit = 0xffff; 1153 desc_access = 0x0000008b; 1154 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 1155 if (error) 1156 goto done; 1157 1158 sel = 0; 1159 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 1160 goto done; 1161 1162 /* LDTR */ 1163 desc_base = 0; 1164 desc_limit = 0xffff; 1165 desc_access = 0x00000082; 1166 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 1167 desc_limit, desc_access); 1168 if (error) 1169 goto done; 1170 1171 sel = 0; 1172 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 1173 goto done; 1174 1175 /* XXX cr2, debug registers */ 1176 1177 error = 0; 1178 done: 1179 return (error); 1180 } 1181 1182 int 1183 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 1184 { 1185 int error, i; 1186 struct vm_gpa_pte gpapte; 1187 1188 bzero(&gpapte, sizeof(gpapte)); 1189 gpapte.gpa = gpa; 1190 1191 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 1192 1193 if (error == 0) { 1194 *num = gpapte.ptenum; 1195 for (i = 0; i < gpapte.ptenum; i++) 1196 pte[i] = gpapte.pte[i]; 1197 } 1198 1199 return (error); 1200 } 1201 1202 int 1203 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 1204 { 1205 int error; 1206 struct vm_hpet_cap cap; 1207 1208 bzero(&cap, sizeof(struct vm_hpet_cap)); 1209 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 1210 if (capabilities != NULL) 1211 *capabilities = cap.capabilities; 1212 return (error); 1213 } 1214 1215 int 1216 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1217 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1218 { 1219 struct vm_gla2gpa gg; 1220 int error; 1221 1222 bzero(&gg, sizeof(struct vm_gla2gpa)); 1223 gg.vcpuid = vcpu; 1224 gg.prot = prot; 1225 gg.gla = gla; 1226 gg.paging = *paging; 1227 1228 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 1229 if (error == 0) { 1230 *fault = gg.fault; 1231 *gpa = gg.gpa; 1232 } 1233 return (error); 1234 } 1235 1236 int 1237 vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1238 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1239 { 1240 struct vm_gla2gpa gg; 1241 int error; 1242 1243 bzero(&gg, sizeof(struct vm_gla2gpa)); 1244 gg.vcpuid = vcpu; 1245 gg.prot = prot; 1246 gg.gla = gla; 1247 gg.paging = *paging; 1248 1249 error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg); 1250 if (error == 0) { 1251 *fault = gg.fault; 1252 *gpa = gg.gpa; 1253 } 1254 return (error); 1255 } 1256 1257 #ifndef min 1258 #define min(a,b) (((a) < (b)) ? (a) : (b)) 1259 #endif 1260 1261 int 1262 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1263 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, 1264 int *fault) 1265 { 1266 void *va; 1267 uint64_t gpa; 1268 int error, i, n, off; 1269 1270 for (i = 0; i < iovcnt; i++) { 1271 iov[i].iov_base = 0; 1272 iov[i].iov_len = 0; 1273 } 1274 1275 while (len) { 1276 assert(iovcnt > 0); 1277 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault); 1278 if (error || *fault) 1279 return (error); 1280 1281 off = gpa & PAGE_MASK; 1282 n = min(len, PAGE_SIZE - off); 1283 1284 va = vm_map_gpa(ctx, gpa, n); 1285 if (va == NULL) 1286 return (EFAULT); 1287 1288 iov->iov_base = va; 1289 iov->iov_len = n; 1290 iov++; 1291 iovcnt--; 1292 1293 gla += n; 1294 len -= n; 1295 } 1296 return (0); 1297 } 1298 1299 void 1300 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt) 1301 { 1302 1303 return; 1304 } 1305 1306 void 1307 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1308 { 1309 const char *src; 1310 char *dst; 1311 size_t n; 1312 1313 dst = vp; 1314 while (len) { 1315 assert(iov->iov_len); 1316 n = min(len, iov->iov_len); 1317 src = iov->iov_base; 1318 bcopy(src, dst, n); 1319 1320 iov++; 1321 dst += n; 1322 len -= n; 1323 } 1324 } 1325 1326 void 1327 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1328 size_t len) 1329 { 1330 const char *src; 1331 char *dst; 1332 size_t n; 1333 1334 src = vp; 1335 while (len) { 1336 assert(iov->iov_len); 1337 n = min(len, iov->iov_len); 1338 dst = iov->iov_base; 1339 bcopy(src, dst, n); 1340 1341 iov++; 1342 src += n; 1343 len -= n; 1344 } 1345 } 1346 1347 static int 1348 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1349 { 1350 struct vm_cpuset vm_cpuset; 1351 int error; 1352 1353 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1354 vm_cpuset.which = which; 1355 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1356 vm_cpuset.cpus = cpus; 1357 1358 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1359 return (error); 1360 } 1361 1362 int 1363 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1364 { 1365 1366 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1367 } 1368 1369 int 1370 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1371 { 1372 1373 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1374 } 1375 1376 int 1377 vm_activate_cpu(struct vmctx *ctx, int vcpu) 1378 { 1379 struct vm_activate_cpu ac; 1380 int error; 1381 1382 bzero(&ac, sizeof(struct vm_activate_cpu)); 1383 ac.vcpuid = vcpu; 1384 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1385 return (error); 1386 } 1387 1388 int 1389 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1390 { 1391 struct vm_intinfo vmii; 1392 int error; 1393 1394 bzero(&vmii, sizeof(struct vm_intinfo)); 1395 vmii.vcpuid = vcpu; 1396 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1397 if (error == 0) { 1398 *info1 = vmii.info1; 1399 *info2 = vmii.info2; 1400 } 1401 return (error); 1402 } 1403 1404 int 1405 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1406 { 1407 struct vm_intinfo vmii; 1408 int error; 1409 1410 bzero(&vmii, sizeof(struct vm_intinfo)); 1411 vmii.vcpuid = vcpu; 1412 vmii.info1 = info1; 1413 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1414 return (error); 1415 } 1416 1417 int 1418 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value) 1419 { 1420 struct vm_rtc_data rtcdata; 1421 int error; 1422 1423 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1424 rtcdata.offset = offset; 1425 rtcdata.value = value; 1426 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata); 1427 return (error); 1428 } 1429 1430 int 1431 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval) 1432 { 1433 struct vm_rtc_data rtcdata; 1434 int error; 1435 1436 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1437 rtcdata.offset = offset; 1438 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata); 1439 if (error == 0) 1440 *retval = rtcdata.value; 1441 return (error); 1442 } 1443 1444 int 1445 vm_rtc_settime(struct vmctx *ctx, time_t secs) 1446 { 1447 struct vm_rtc_time rtctime; 1448 int error; 1449 1450 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1451 rtctime.secs = secs; 1452 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime); 1453 return (error); 1454 } 1455 1456 int 1457 vm_rtc_gettime(struct vmctx *ctx, time_t *secs) 1458 { 1459 struct vm_rtc_time rtctime; 1460 int error; 1461 1462 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1463 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime); 1464 if (error == 0) 1465 *secs = rtctime.secs; 1466 return (error); 1467 } 1468 1469 int 1470 vm_restart_instruction(void *arg, int vcpu) 1471 { 1472 struct vmctx *ctx = arg; 1473 1474 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu)); 1475 } 1476 1477 int 1478 vm_get_device_fd(struct vmctx *ctx) 1479 { 1480 1481 return (ctx->fd); 1482 } 1483 1484 const cap_ioctl_t * 1485 vm_get_ioctls(size_t *len) 1486 { 1487 cap_ioctl_t *cmds; 1488 /* keep in sync with machine/vmm_dev.h */ 1489 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT, 1490 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG, 1491 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER, 1492 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR, 1493 VM_SET_REGISTER_SET, VM_GET_REGISTER_SET, 1494 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ, 1495 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ, 1496 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ, 1497 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER, 1498 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV, 1499 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI, 1500 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC, 1501 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE, 1502 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA, 1503 VM_GLA2GPA_NOFAULT, 1504 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SET_INTINFO, VM_GET_INTINFO, 1505 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME, 1506 VM_RESTART_INSTRUCTION }; 1507 1508 if (len == NULL) { 1509 cmds = malloc(sizeof(vm_ioctl_cmds)); 1510 if (cmds == NULL) 1511 return (NULL); 1512 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds)); 1513 return (cmds); 1514 } 1515 1516 *len = nitems(vm_ioctl_cmds); 1517 return (NULL); 1518 } 1519 1520