1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/types.h> 33 #include <sys/sysctl.h> 34 #include <sys/ioctl.h> 35 #include <sys/mman.h> 36 37 #include <machine/specialreg.h> 38 39 #include <stdio.h> 40 #include <stdlib.h> 41 #include <assert.h> 42 #include <string.h> 43 #include <fcntl.h> 44 #include <unistd.h> 45 46 #include <libutil.h> 47 48 #include <machine/vmm.h> 49 #include <machine/vmm_dev.h> 50 51 #include "vmmapi.h" 52 53 #define MB (1024 * 1024UL) 54 #define GB (1024 * 1024 * 1024UL) 55 56 struct vmctx { 57 int fd; 58 uint32_t lowmem_limit; 59 enum vm_mmap_style vms; 60 size_t lowmem; 61 char *lowmem_addr; 62 size_t highmem; 63 char *highmem_addr; 64 char *name; 65 }; 66 67 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 68 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 69 70 static int 71 vm_device_open(const char *name) 72 { 73 int fd, len; 74 char *vmfile; 75 76 len = strlen("/dev/vmm/") + strlen(name) + 1; 77 vmfile = malloc(len); 78 assert(vmfile != NULL); 79 snprintf(vmfile, len, "/dev/vmm/%s", name); 80 81 /* Open the device file */ 82 fd = open(vmfile, O_RDWR, 0); 83 84 free(vmfile); 85 return (fd); 86 } 87 88 int 89 vm_create(const char *name) 90 { 91 92 return (CREATE((char *)name)); 93 } 94 95 struct vmctx * 96 vm_open(const char *name) 97 { 98 struct vmctx *vm; 99 100 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 101 assert(vm != NULL); 102 103 vm->fd = -1; 104 vm->lowmem_limit = 3 * GB; 105 vm->name = (char *)(vm + 1); 106 strcpy(vm->name, name); 107 108 if ((vm->fd = vm_device_open(vm->name)) < 0) 109 goto err; 110 111 return (vm); 112 err: 113 vm_destroy(vm); 114 return (NULL); 115 } 116 117 void 118 vm_destroy(struct vmctx *vm) 119 { 120 assert(vm != NULL); 121 122 if (vm->fd >= 0) 123 close(vm->fd); 124 DESTROY(vm->name); 125 126 free(vm); 127 } 128 129 int 130 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 131 { 132 char *endptr; 133 size_t optval; 134 int error; 135 136 optval = strtoul(optarg, &endptr, 0); 137 if (*optarg != '\0' && *endptr == '\0') { 138 /* 139 * For the sake of backward compatibility if the memory size 140 * specified on the command line is less than a megabyte then 141 * it is interpreted as being in units of MB. 142 */ 143 if (optval < MB) 144 optval *= MB; 145 *ret_memsize = optval; 146 error = 0; 147 } else 148 error = expand_number(optarg, ret_memsize); 149 150 return (error); 151 } 152 153 int 154 vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len, 155 int *wired) 156 { 157 int error; 158 struct vm_memory_segment seg; 159 160 bzero(&seg, sizeof(seg)); 161 seg.gpa = gpa; 162 error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg); 163 *ret_len = seg.len; 164 if (wired != NULL) 165 *wired = seg.wired; 166 return (error); 167 } 168 169 uint32_t 170 vm_get_lowmem_limit(struct vmctx *ctx) 171 { 172 173 return (ctx->lowmem_limit); 174 } 175 176 void 177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 178 { 179 180 ctx->lowmem_limit = limit; 181 } 182 183 static int 184 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr) 185 { 186 int error; 187 struct vm_memory_segment seg; 188 189 /* 190 * Create and optionally map 'len' bytes of memory at guest 191 * physical address 'gpa' 192 */ 193 bzero(&seg, sizeof(seg)); 194 seg.gpa = gpa; 195 seg.len = len; 196 error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg); 197 if (error == 0 && addr != NULL) { 198 *addr = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, 199 ctx->fd, gpa); 200 } 201 return (error); 202 } 203 204 int 205 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 206 { 207 char **addr; 208 int error; 209 210 /* XXX VM_MMAP_SPARSE not implemented yet */ 211 assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL); 212 ctx->vms = vms; 213 214 /* 215 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 216 * create another 'highmem' segment above 4GB for the remainder. 217 */ 218 if (memsize > ctx->lowmem_limit) { 219 ctx->lowmem = ctx->lowmem_limit; 220 ctx->highmem = memsize - ctx->lowmem; 221 } else { 222 ctx->lowmem = memsize; 223 ctx->highmem = 0; 224 } 225 226 if (ctx->lowmem > 0) { 227 addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL; 228 error = setup_memory_segment(ctx, 0, ctx->lowmem, addr); 229 if (error) 230 return (error); 231 } 232 233 if (ctx->highmem > 0) { 234 addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL; 235 error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr); 236 if (error) 237 return (error); 238 } 239 240 return (0); 241 } 242 243 void * 244 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 245 { 246 247 /* XXX VM_MMAP_SPARSE not implemented yet */ 248 assert(ctx->vms == VM_MMAP_ALL); 249 250 if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem) 251 return ((void *)(ctx->lowmem_addr + gaddr)); 252 253 if (gaddr >= 4*GB) { 254 gaddr -= 4*GB; 255 if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem) 256 return ((void *)(ctx->highmem_addr + gaddr)); 257 } 258 259 return (NULL); 260 } 261 262 int 263 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 264 uint64_t base, uint32_t limit, uint32_t access) 265 { 266 int error; 267 struct vm_seg_desc vmsegdesc; 268 269 bzero(&vmsegdesc, sizeof(vmsegdesc)); 270 vmsegdesc.cpuid = vcpu; 271 vmsegdesc.regnum = reg; 272 vmsegdesc.desc.base = base; 273 vmsegdesc.desc.limit = limit; 274 vmsegdesc.desc.access = access; 275 276 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 277 return (error); 278 } 279 280 int 281 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 282 uint64_t *base, uint32_t *limit, uint32_t *access) 283 { 284 int error; 285 struct vm_seg_desc vmsegdesc; 286 287 bzero(&vmsegdesc, sizeof(vmsegdesc)); 288 vmsegdesc.cpuid = vcpu; 289 vmsegdesc.regnum = reg; 290 291 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 292 if (error == 0) { 293 *base = vmsegdesc.desc.base; 294 *limit = vmsegdesc.desc.limit; 295 *access = vmsegdesc.desc.access; 296 } 297 return (error); 298 } 299 300 int 301 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 302 { 303 int error; 304 struct vm_register vmreg; 305 306 bzero(&vmreg, sizeof(vmreg)); 307 vmreg.cpuid = vcpu; 308 vmreg.regnum = reg; 309 vmreg.regval = val; 310 311 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 312 return (error); 313 } 314 315 int 316 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 317 { 318 int error; 319 struct vm_register vmreg; 320 321 bzero(&vmreg, sizeof(vmreg)); 322 vmreg.cpuid = vcpu; 323 vmreg.regnum = reg; 324 325 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 326 *ret_val = vmreg.regval; 327 return (error); 328 } 329 330 int 331 vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit) 332 { 333 int error; 334 struct vm_run vmrun; 335 336 bzero(&vmrun, sizeof(vmrun)); 337 vmrun.cpuid = vcpu; 338 vmrun.rip = rip; 339 340 error = ioctl(ctx->fd, VM_RUN, &vmrun); 341 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 342 return (error); 343 } 344 345 int 346 vm_suspend(struct vmctx *ctx) 347 { 348 349 return (ioctl(ctx->fd, VM_SUSPEND, 0)); 350 } 351 352 static int 353 vm_inject_exception_real(struct vmctx *ctx, int vcpu, int vector, 354 int error_code, int error_code_valid) 355 { 356 struct vm_exception exc; 357 358 bzero(&exc, sizeof(exc)); 359 exc.cpuid = vcpu; 360 exc.vector = vector; 361 exc.error_code = error_code; 362 exc.error_code_valid = error_code_valid; 363 364 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 365 } 366 367 int 368 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector) 369 { 370 371 return (vm_inject_exception_real(ctx, vcpu, vector, 0, 0)); 372 } 373 374 int 375 vm_inject_exception2(struct vmctx *ctx, int vcpu, int vector, int errcode) 376 { 377 378 return (vm_inject_exception_real(ctx, vcpu, vector, errcode, 1)); 379 } 380 381 int 382 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 383 { 384 /* 385 * The apic id associated with the 'vcpu' has the same numerical value 386 * as the 'vcpu' itself. 387 */ 388 return (apicid); 389 } 390 391 int 392 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 393 { 394 struct vm_lapic_irq vmirq; 395 396 bzero(&vmirq, sizeof(vmirq)); 397 vmirq.cpuid = vcpu; 398 vmirq.vector = vector; 399 400 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 401 } 402 403 int 404 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 405 { 406 struct vm_lapic_irq vmirq; 407 408 bzero(&vmirq, sizeof(vmirq)); 409 vmirq.cpuid = vcpu; 410 vmirq.vector = vector; 411 412 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 413 } 414 415 int 416 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 417 { 418 struct vm_lapic_msi vmmsi; 419 420 bzero(&vmmsi, sizeof(vmmsi)); 421 vmmsi.addr = addr; 422 vmmsi.msg = msg; 423 424 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 425 } 426 427 int 428 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 429 { 430 struct vm_ioapic_irq ioapic_irq; 431 432 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 433 ioapic_irq.irq = irq; 434 435 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 436 } 437 438 int 439 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 440 { 441 struct vm_ioapic_irq ioapic_irq; 442 443 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 444 ioapic_irq.irq = irq; 445 446 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 447 } 448 449 int 450 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 451 { 452 struct vm_ioapic_irq ioapic_irq; 453 454 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 455 ioapic_irq.irq = irq; 456 457 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 458 } 459 460 int 461 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 462 { 463 464 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 465 } 466 467 int 468 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 469 { 470 struct vm_isa_irq isa_irq; 471 472 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 473 isa_irq.atpic_irq = atpic_irq; 474 isa_irq.ioapic_irq = ioapic_irq; 475 476 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 477 } 478 479 int 480 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 481 { 482 struct vm_isa_irq isa_irq; 483 484 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 485 isa_irq.atpic_irq = atpic_irq; 486 isa_irq.ioapic_irq = ioapic_irq; 487 488 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 489 } 490 491 int 492 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 493 { 494 struct vm_isa_irq isa_irq; 495 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 496 isa_irq.atpic_irq = atpic_irq; 497 isa_irq.ioapic_irq = ioapic_irq; 498 499 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 500 } 501 502 int 503 vm_inject_nmi(struct vmctx *ctx, int vcpu) 504 { 505 struct vm_nmi vmnmi; 506 507 bzero(&vmnmi, sizeof(vmnmi)); 508 vmnmi.cpuid = vcpu; 509 510 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 511 } 512 513 static struct { 514 const char *name; 515 int type; 516 } capstrmap[] = { 517 { "hlt_exit", VM_CAP_HALT_EXIT }, 518 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 519 { "pause_exit", VM_CAP_PAUSE_EXIT }, 520 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 521 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 522 { 0 } 523 }; 524 525 int 526 vm_capability_name2type(const char *capname) 527 { 528 int i; 529 530 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 531 if (strcmp(capstrmap[i].name, capname) == 0) 532 return (capstrmap[i].type); 533 } 534 535 return (-1); 536 } 537 538 const char * 539 vm_capability_type2name(int type) 540 { 541 int i; 542 543 for (i = 0; capstrmap[i].name != NULL; i++) { 544 if (capstrmap[i].type == type) 545 return (capstrmap[i].name); 546 } 547 548 return (NULL); 549 } 550 551 int 552 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 553 int *retval) 554 { 555 int error; 556 struct vm_capability vmcap; 557 558 bzero(&vmcap, sizeof(vmcap)); 559 vmcap.cpuid = vcpu; 560 vmcap.captype = cap; 561 562 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 563 *retval = vmcap.capval; 564 return (error); 565 } 566 567 int 568 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 569 { 570 struct vm_capability vmcap; 571 572 bzero(&vmcap, sizeof(vmcap)); 573 vmcap.cpuid = vcpu; 574 vmcap.captype = cap; 575 vmcap.capval = val; 576 577 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 578 } 579 580 int 581 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 582 { 583 struct vm_pptdev pptdev; 584 585 bzero(&pptdev, sizeof(pptdev)); 586 pptdev.bus = bus; 587 pptdev.slot = slot; 588 pptdev.func = func; 589 590 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 591 } 592 593 int 594 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 595 { 596 struct vm_pptdev pptdev; 597 598 bzero(&pptdev, sizeof(pptdev)); 599 pptdev.bus = bus; 600 pptdev.slot = slot; 601 pptdev.func = func; 602 603 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 604 } 605 606 int 607 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 608 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 609 { 610 struct vm_pptdev_mmio pptmmio; 611 612 bzero(&pptmmio, sizeof(pptmmio)); 613 pptmmio.bus = bus; 614 pptmmio.slot = slot; 615 pptmmio.func = func; 616 pptmmio.gpa = gpa; 617 pptmmio.len = len; 618 pptmmio.hpa = hpa; 619 620 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 621 } 622 623 int 624 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 625 uint64_t addr, uint64_t msg, int numvec) 626 { 627 struct vm_pptdev_msi pptmsi; 628 629 bzero(&pptmsi, sizeof(pptmsi)); 630 pptmsi.vcpu = vcpu; 631 pptmsi.bus = bus; 632 pptmsi.slot = slot; 633 pptmsi.func = func; 634 pptmsi.msg = msg; 635 pptmsi.addr = addr; 636 pptmsi.numvec = numvec; 637 638 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 639 } 640 641 int 642 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 643 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 644 { 645 struct vm_pptdev_msix pptmsix; 646 647 bzero(&pptmsix, sizeof(pptmsix)); 648 pptmsix.vcpu = vcpu; 649 pptmsix.bus = bus; 650 pptmsix.slot = slot; 651 pptmsix.func = func; 652 pptmsix.idx = idx; 653 pptmsix.msg = msg; 654 pptmsix.addr = addr; 655 pptmsix.vector_control = vector_control; 656 657 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 658 } 659 660 uint64_t * 661 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 662 int *ret_entries) 663 { 664 int error; 665 666 static struct vm_stats vmstats; 667 668 vmstats.cpuid = vcpu; 669 670 error = ioctl(ctx->fd, VM_STATS, &vmstats); 671 if (error == 0) { 672 if (ret_entries) 673 *ret_entries = vmstats.num_entries; 674 if (ret_tv) 675 *ret_tv = vmstats.tv; 676 return (vmstats.statbuf); 677 } else 678 return (NULL); 679 } 680 681 const char * 682 vm_get_stat_desc(struct vmctx *ctx, int index) 683 { 684 static struct vm_stat_desc statdesc; 685 686 statdesc.index = index; 687 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 688 return (statdesc.desc); 689 else 690 return (NULL); 691 } 692 693 int 694 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 695 { 696 int error; 697 struct vm_x2apic x2apic; 698 699 bzero(&x2apic, sizeof(x2apic)); 700 x2apic.cpuid = vcpu; 701 702 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 703 *state = x2apic.state; 704 return (error); 705 } 706 707 int 708 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 709 { 710 int error; 711 struct vm_x2apic x2apic; 712 713 bzero(&x2apic, sizeof(x2apic)); 714 x2apic.cpuid = vcpu; 715 x2apic.state = state; 716 717 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 718 719 return (error); 720 } 721 722 /* 723 * From Intel Vol 3a: 724 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 725 */ 726 int 727 vcpu_reset(struct vmctx *vmctx, int vcpu) 728 { 729 int error; 730 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 731 uint32_t desc_access, desc_limit; 732 uint16_t sel; 733 734 zero = 0; 735 736 rflags = 0x2; 737 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 738 if (error) 739 goto done; 740 741 rip = 0xfff0; 742 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 743 goto done; 744 745 cr0 = CR0_NE; 746 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 747 goto done; 748 749 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 750 goto done; 751 752 cr4 = 0; 753 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 754 goto done; 755 756 /* 757 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 758 */ 759 desc_base = 0xffff0000; 760 desc_limit = 0xffff; 761 desc_access = 0x0093; 762 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 763 desc_base, desc_limit, desc_access); 764 if (error) 765 goto done; 766 767 sel = 0xf000; 768 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 769 goto done; 770 771 /* 772 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 773 */ 774 desc_base = 0; 775 desc_limit = 0xffff; 776 desc_access = 0x0093; 777 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 778 desc_base, desc_limit, desc_access); 779 if (error) 780 goto done; 781 782 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 783 desc_base, desc_limit, desc_access); 784 if (error) 785 goto done; 786 787 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 788 desc_base, desc_limit, desc_access); 789 if (error) 790 goto done; 791 792 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 793 desc_base, desc_limit, desc_access); 794 if (error) 795 goto done; 796 797 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 798 desc_base, desc_limit, desc_access); 799 if (error) 800 goto done; 801 802 sel = 0; 803 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 804 goto done; 805 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 806 goto done; 807 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 808 goto done; 809 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 810 goto done; 811 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 812 goto done; 813 814 /* General purpose registers */ 815 rdx = 0xf00; 816 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 817 goto done; 818 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 819 goto done; 820 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 821 goto done; 822 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 823 goto done; 824 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 825 goto done; 826 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 827 goto done; 828 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 829 goto done; 830 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 831 goto done; 832 833 /* GDTR, IDTR */ 834 desc_base = 0; 835 desc_limit = 0xffff; 836 desc_access = 0; 837 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 838 desc_base, desc_limit, desc_access); 839 if (error != 0) 840 goto done; 841 842 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 843 desc_base, desc_limit, desc_access); 844 if (error != 0) 845 goto done; 846 847 /* TR */ 848 desc_base = 0; 849 desc_limit = 0xffff; 850 desc_access = 0x0000008b; 851 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 852 if (error) 853 goto done; 854 855 sel = 0; 856 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 857 goto done; 858 859 /* LDTR */ 860 desc_base = 0; 861 desc_limit = 0xffff; 862 desc_access = 0x00000082; 863 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 864 desc_limit, desc_access); 865 if (error) 866 goto done; 867 868 sel = 0; 869 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 870 goto done; 871 872 /* XXX cr2, debug registers */ 873 874 error = 0; 875 done: 876 return (error); 877 } 878 879 int 880 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 881 { 882 int error, i; 883 struct vm_gpa_pte gpapte; 884 885 bzero(&gpapte, sizeof(gpapte)); 886 gpapte.gpa = gpa; 887 888 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 889 890 if (error == 0) { 891 *num = gpapte.ptenum; 892 for (i = 0; i < gpapte.ptenum; i++) 893 pte[i] = gpapte.pte[i]; 894 } 895 896 return (error); 897 } 898 899 int 900 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 901 { 902 int error; 903 struct vm_hpet_cap cap; 904 905 bzero(&cap, sizeof(struct vm_hpet_cap)); 906 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 907 if (capabilities != NULL) 908 *capabilities = cap.capabilities; 909 return (error); 910 } 911