xref: /freebsd/lib/libvmmapi/vmmapi.c (revision 6d732c66bca5da4d261577aad2c8ea84519b0bea)
1 /*-
2  * Copyright (c) 2011 NetApp, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/types.h>
33 #include <sys/sysctl.h>
34 #include <sys/ioctl.h>
35 #include <sys/mman.h>
36 
37 #include <machine/specialreg.h>
38 
39 #include <stdio.h>
40 #include <stdlib.h>
41 #include <assert.h>
42 #include <string.h>
43 #include <fcntl.h>
44 #include <unistd.h>
45 
46 #include <libutil.h>
47 
48 #include <machine/vmm.h>
49 #include <machine/vmm_dev.h>
50 
51 #include "vmmapi.h"
52 
53 #define	MB	(1024 * 1024UL)
54 #define	GB	(1024 * 1024 * 1024UL)
55 
56 struct vmctx {
57 	int	fd;
58 	uint32_t lowmem_limit;
59 	enum vm_mmap_style vms;
60 	size_t	lowmem;
61 	char	*lowmem_addr;
62 	size_t	highmem;
63 	char	*highmem_addr;
64 	char	*name;
65 };
66 
67 #define	CREATE(x)  sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
68 #define	DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
69 
70 static int
71 vm_device_open(const char *name)
72 {
73         int fd, len;
74         char *vmfile;
75 
76 	len = strlen("/dev/vmm/") + strlen(name) + 1;
77 	vmfile = malloc(len);
78 	assert(vmfile != NULL);
79 	snprintf(vmfile, len, "/dev/vmm/%s", name);
80 
81         /* Open the device file */
82         fd = open(vmfile, O_RDWR, 0);
83 
84 	free(vmfile);
85         return (fd);
86 }
87 
88 int
89 vm_create(const char *name)
90 {
91 
92 	return (CREATE((char *)name));
93 }
94 
95 struct vmctx *
96 vm_open(const char *name)
97 {
98 	struct vmctx *vm;
99 
100 	vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
101 	assert(vm != NULL);
102 
103 	vm->fd = -1;
104 	vm->lowmem_limit = 3 * GB;
105 	vm->name = (char *)(vm + 1);
106 	strcpy(vm->name, name);
107 
108 	if ((vm->fd = vm_device_open(vm->name)) < 0)
109 		goto err;
110 
111 	return (vm);
112 err:
113 	vm_destroy(vm);
114 	return (NULL);
115 }
116 
117 void
118 vm_destroy(struct vmctx *vm)
119 {
120 	assert(vm != NULL);
121 
122 	if (vm->fd >= 0)
123 		close(vm->fd);
124 	DESTROY(vm->name);
125 
126 	free(vm);
127 }
128 
129 int
130 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
131 {
132 	char *endptr;
133 	size_t optval;
134 	int error;
135 
136 	optval = strtoul(optarg, &endptr, 0);
137 	if (*optarg != '\0' && *endptr == '\0') {
138 		/*
139 		 * For the sake of backward compatibility if the memory size
140 		 * specified on the command line is less than a megabyte then
141 		 * it is interpreted as being in units of MB.
142 		 */
143 		if (optval < MB)
144 			optval *= MB;
145 		*ret_memsize = optval;
146 		error = 0;
147 	} else
148 		error = expand_number(optarg, ret_memsize);
149 
150 	return (error);
151 }
152 
153 int
154 vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
155 		  int *wired)
156 {
157 	int error;
158 	struct vm_memory_segment seg;
159 
160 	bzero(&seg, sizeof(seg));
161 	seg.gpa = gpa;
162 	error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
163 	*ret_len = seg.len;
164 	if (wired != NULL)
165 		*wired = seg.wired;
166 	return (error);
167 }
168 
169 uint32_t
170 vm_get_lowmem_limit(struct vmctx *ctx)
171 {
172 
173 	return (ctx->lowmem_limit);
174 }
175 
176 void
177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
178 {
179 
180 	ctx->lowmem_limit = limit;
181 }
182 
183 static int
184 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr)
185 {
186 	int error;
187 	struct vm_memory_segment seg;
188 
189 	/*
190 	 * Create and optionally map 'len' bytes of memory at guest
191 	 * physical address 'gpa'
192 	 */
193 	bzero(&seg, sizeof(seg));
194 	seg.gpa = gpa;
195 	seg.len = len;
196 	error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
197 	if (error == 0 && addr != NULL) {
198 		*addr = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED,
199 				ctx->fd, gpa);
200 	}
201 	return (error);
202 }
203 
204 int
205 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
206 {
207 	char **addr;
208 	int error;
209 
210 	/* XXX VM_MMAP_SPARSE not implemented yet */
211 	assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL);
212 	ctx->vms = vms;
213 
214 	/*
215 	 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
216 	 * create another 'highmem' segment above 4GB for the remainder.
217 	 */
218 	if (memsize > ctx->lowmem_limit) {
219 		ctx->lowmem = ctx->lowmem_limit;
220 		ctx->highmem = memsize - ctx->lowmem;
221 	} else {
222 		ctx->lowmem = memsize;
223 		ctx->highmem = 0;
224 	}
225 
226 	if (ctx->lowmem > 0) {
227 		addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL;
228 		error = setup_memory_segment(ctx, 0, ctx->lowmem, addr);
229 		if (error)
230 			return (error);
231 	}
232 
233 	if (ctx->highmem > 0) {
234 		addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL;
235 		error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr);
236 		if (error)
237 			return (error);
238 	}
239 
240 	return (0);
241 }
242 
243 void *
244 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
245 {
246 
247 	/* XXX VM_MMAP_SPARSE not implemented yet */
248 	assert(ctx->vms == VM_MMAP_ALL);
249 
250 	if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem)
251 		return ((void *)(ctx->lowmem_addr + gaddr));
252 
253 	if (gaddr >= 4*GB) {
254 		gaddr -= 4*GB;
255 		if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem)
256 			return ((void *)(ctx->highmem_addr + gaddr));
257 	}
258 
259 	return (NULL);
260 }
261 
262 int
263 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
264 	    uint64_t base, uint32_t limit, uint32_t access)
265 {
266 	int error;
267 	struct vm_seg_desc vmsegdesc;
268 
269 	bzero(&vmsegdesc, sizeof(vmsegdesc));
270 	vmsegdesc.cpuid = vcpu;
271 	vmsegdesc.regnum = reg;
272 	vmsegdesc.desc.base = base;
273 	vmsegdesc.desc.limit = limit;
274 	vmsegdesc.desc.access = access;
275 
276 	error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
277 	return (error);
278 }
279 
280 int
281 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
282 	    uint64_t *base, uint32_t *limit, uint32_t *access)
283 {
284 	int error;
285 	struct vm_seg_desc vmsegdesc;
286 
287 	bzero(&vmsegdesc, sizeof(vmsegdesc));
288 	vmsegdesc.cpuid = vcpu;
289 	vmsegdesc.regnum = reg;
290 
291 	error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
292 	if (error == 0) {
293 		*base = vmsegdesc.desc.base;
294 		*limit = vmsegdesc.desc.limit;
295 		*access = vmsegdesc.desc.access;
296 	}
297 	return (error);
298 }
299 
300 int
301 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
302 {
303 	int error;
304 	struct vm_register vmreg;
305 
306 	bzero(&vmreg, sizeof(vmreg));
307 	vmreg.cpuid = vcpu;
308 	vmreg.regnum = reg;
309 	vmreg.regval = val;
310 
311 	error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
312 	return (error);
313 }
314 
315 int
316 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
317 {
318 	int error;
319 	struct vm_register vmreg;
320 
321 	bzero(&vmreg, sizeof(vmreg));
322 	vmreg.cpuid = vcpu;
323 	vmreg.regnum = reg;
324 
325 	error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
326 	*ret_val = vmreg.regval;
327 	return (error);
328 }
329 
330 int
331 vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit)
332 {
333 	int error;
334 	struct vm_run vmrun;
335 
336 	bzero(&vmrun, sizeof(vmrun));
337 	vmrun.cpuid = vcpu;
338 	vmrun.rip = rip;
339 
340 	error = ioctl(ctx->fd, VM_RUN, &vmrun);
341 	bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
342 	return (error);
343 }
344 
345 static int
346 vm_inject_event_real(struct vmctx *ctx, int vcpu, enum vm_event_type type,
347 		     int vector, int error_code, int error_code_valid)
348 {
349 	struct vm_event ev;
350 
351 	bzero(&ev, sizeof(ev));
352 	ev.cpuid = vcpu;
353 	ev.type = type;
354 	ev.vector = vector;
355 	ev.error_code = error_code;
356 	ev.error_code_valid = error_code_valid;
357 
358 	return (ioctl(ctx->fd, VM_INJECT_EVENT, &ev));
359 }
360 
361 int
362 vm_inject_event(struct vmctx *ctx, int vcpu, enum vm_event_type type,
363 		int vector)
364 {
365 
366 	return (vm_inject_event_real(ctx, vcpu, type, vector, 0, 0));
367 }
368 
369 int
370 vm_inject_event2(struct vmctx *ctx, int vcpu, enum vm_event_type type,
371 		 int vector, int error_code)
372 {
373 
374 	return (vm_inject_event_real(ctx, vcpu, type, vector, error_code, 1));
375 }
376 
377 int
378 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
379 {
380 	/*
381 	 * The apic id associated with the 'vcpu' has the same numerical value
382 	 * as the 'vcpu' itself.
383 	 */
384 	return (apicid);
385 }
386 
387 int
388 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
389 {
390 	struct vm_lapic_irq vmirq;
391 
392 	bzero(&vmirq, sizeof(vmirq));
393 	vmirq.cpuid = vcpu;
394 	vmirq.vector = vector;
395 
396 	return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
397 }
398 
399 int
400 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
401 {
402 	struct vm_lapic_irq vmirq;
403 
404 	bzero(&vmirq, sizeof(vmirq));
405 	vmirq.cpuid = vcpu;
406 	vmirq.vector = vector;
407 
408 	return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
409 }
410 
411 int
412 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
413 {
414 	struct vm_lapic_msi vmmsi;
415 
416 	bzero(&vmmsi, sizeof(vmmsi));
417 	vmmsi.addr = addr;
418 	vmmsi.msg = msg;
419 
420 	return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
421 }
422 
423 int
424 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
425 {
426 	struct vm_ioapic_irq ioapic_irq;
427 
428 	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
429 	ioapic_irq.irq = irq;
430 
431 	return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
432 }
433 
434 int
435 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
436 {
437 	struct vm_ioapic_irq ioapic_irq;
438 
439 	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
440 	ioapic_irq.irq = irq;
441 
442 	return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
443 }
444 
445 int
446 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
447 {
448 	struct vm_ioapic_irq ioapic_irq;
449 
450 	bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
451 	ioapic_irq.irq = irq;
452 
453 	return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
454 }
455 
456 int
457 vm_inject_nmi(struct vmctx *ctx, int vcpu)
458 {
459 	struct vm_nmi vmnmi;
460 
461 	bzero(&vmnmi, sizeof(vmnmi));
462 	vmnmi.cpuid = vcpu;
463 
464 	return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
465 }
466 
467 static struct {
468 	const char	*name;
469 	int		type;
470 } capstrmap[] = {
471 	{ "hlt_exit",		VM_CAP_HALT_EXIT },
472 	{ "mtrap_exit",		VM_CAP_MTRAP_EXIT },
473 	{ "pause_exit",		VM_CAP_PAUSE_EXIT },
474 	{ "unrestricted_guest",	VM_CAP_UNRESTRICTED_GUEST },
475 	{ "enable_invpcid",	VM_CAP_ENABLE_INVPCID },
476 	{ 0 }
477 };
478 
479 int
480 vm_capability_name2type(const char *capname)
481 {
482 	int i;
483 
484 	for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
485 		if (strcmp(capstrmap[i].name, capname) == 0)
486 			return (capstrmap[i].type);
487 	}
488 
489 	return (-1);
490 }
491 
492 const char *
493 vm_capability_type2name(int type)
494 {
495 	int i;
496 
497 	for (i = 0; capstrmap[i].name != NULL; i++) {
498 		if (capstrmap[i].type == type)
499 			return (capstrmap[i].name);
500 	}
501 
502 	return (NULL);
503 }
504 
505 int
506 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
507 		  int *retval)
508 {
509 	int error;
510 	struct vm_capability vmcap;
511 
512 	bzero(&vmcap, sizeof(vmcap));
513 	vmcap.cpuid = vcpu;
514 	vmcap.captype = cap;
515 
516 	error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
517 	*retval = vmcap.capval;
518 	return (error);
519 }
520 
521 int
522 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
523 {
524 	struct vm_capability vmcap;
525 
526 	bzero(&vmcap, sizeof(vmcap));
527 	vmcap.cpuid = vcpu;
528 	vmcap.captype = cap;
529 	vmcap.capval = val;
530 
531 	return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
532 }
533 
534 int
535 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
536 {
537 	struct vm_pptdev pptdev;
538 
539 	bzero(&pptdev, sizeof(pptdev));
540 	pptdev.bus = bus;
541 	pptdev.slot = slot;
542 	pptdev.func = func;
543 
544 	return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
545 }
546 
547 int
548 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
549 {
550 	struct vm_pptdev pptdev;
551 
552 	bzero(&pptdev, sizeof(pptdev));
553 	pptdev.bus = bus;
554 	pptdev.slot = slot;
555 	pptdev.func = func;
556 
557 	return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
558 }
559 
560 int
561 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
562 		   vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
563 {
564 	struct vm_pptdev_mmio pptmmio;
565 
566 	bzero(&pptmmio, sizeof(pptmmio));
567 	pptmmio.bus = bus;
568 	pptmmio.slot = slot;
569 	pptmmio.func = func;
570 	pptmmio.gpa = gpa;
571 	pptmmio.len = len;
572 	pptmmio.hpa = hpa;
573 
574 	return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
575 }
576 
577 int
578 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
579     uint64_t addr, uint64_t msg, int numvec)
580 {
581 	struct vm_pptdev_msi pptmsi;
582 
583 	bzero(&pptmsi, sizeof(pptmsi));
584 	pptmsi.vcpu = vcpu;
585 	pptmsi.bus = bus;
586 	pptmsi.slot = slot;
587 	pptmsi.func = func;
588 	pptmsi.msg = msg;
589 	pptmsi.addr = addr;
590 	pptmsi.numvec = numvec;
591 
592 	return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
593 }
594 
595 int
596 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
597     int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
598 {
599 	struct vm_pptdev_msix pptmsix;
600 
601 	bzero(&pptmsix, sizeof(pptmsix));
602 	pptmsix.vcpu = vcpu;
603 	pptmsix.bus = bus;
604 	pptmsix.slot = slot;
605 	pptmsix.func = func;
606 	pptmsix.idx = idx;
607 	pptmsix.msg = msg;
608 	pptmsix.addr = addr;
609 	pptmsix.vector_control = vector_control;
610 
611 	return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
612 }
613 
614 uint64_t *
615 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
616 	     int *ret_entries)
617 {
618 	int error;
619 
620 	static struct vm_stats vmstats;
621 
622 	vmstats.cpuid = vcpu;
623 
624 	error = ioctl(ctx->fd, VM_STATS, &vmstats);
625 	if (error == 0) {
626 		if (ret_entries)
627 			*ret_entries = vmstats.num_entries;
628 		if (ret_tv)
629 			*ret_tv = vmstats.tv;
630 		return (vmstats.statbuf);
631 	} else
632 		return (NULL);
633 }
634 
635 const char *
636 vm_get_stat_desc(struct vmctx *ctx, int index)
637 {
638 	static struct vm_stat_desc statdesc;
639 
640 	statdesc.index = index;
641 	if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
642 		return (statdesc.desc);
643 	else
644 		return (NULL);
645 }
646 
647 int
648 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
649 {
650 	int error;
651 	struct vm_x2apic x2apic;
652 
653 	bzero(&x2apic, sizeof(x2apic));
654 	x2apic.cpuid = vcpu;
655 
656 	error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
657 	*state = x2apic.state;
658 	return (error);
659 }
660 
661 int
662 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
663 {
664 	int error;
665 	struct vm_x2apic x2apic;
666 
667 	bzero(&x2apic, sizeof(x2apic));
668 	x2apic.cpuid = vcpu;
669 	x2apic.state = state;
670 
671 	error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
672 
673 	return (error);
674 }
675 
676 /*
677  * From Intel Vol 3a:
678  * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
679  */
680 int
681 vcpu_reset(struct vmctx *vmctx, int vcpu)
682 {
683 	int error;
684 	uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
685 	uint32_t desc_access, desc_limit;
686 	uint16_t sel;
687 
688 	zero = 0;
689 
690 	rflags = 0x2;
691 	error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
692 	if (error)
693 		goto done;
694 
695 	rip = 0xfff0;
696 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
697 		goto done;
698 
699 	cr0 = CR0_NE;
700 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
701 		goto done;
702 
703 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
704 		goto done;
705 
706 	cr4 = 0;
707 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
708 		goto done;
709 
710 	/*
711 	 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
712 	 */
713 	desc_base = 0xffff0000;
714 	desc_limit = 0xffff;
715 	desc_access = 0x0093;
716 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
717 			    desc_base, desc_limit, desc_access);
718 	if (error)
719 		goto done;
720 
721 	sel = 0xf000;
722 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
723 		goto done;
724 
725 	/*
726 	 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
727 	 */
728 	desc_base = 0;
729 	desc_limit = 0xffff;
730 	desc_access = 0x0093;
731 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
732 			    desc_base, desc_limit, desc_access);
733 	if (error)
734 		goto done;
735 
736 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
737 			    desc_base, desc_limit, desc_access);
738 	if (error)
739 		goto done;
740 
741 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
742 			    desc_base, desc_limit, desc_access);
743 	if (error)
744 		goto done;
745 
746 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
747 			    desc_base, desc_limit, desc_access);
748 	if (error)
749 		goto done;
750 
751 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
752 			    desc_base, desc_limit, desc_access);
753 	if (error)
754 		goto done;
755 
756 	sel = 0;
757 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
758 		goto done;
759 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
760 		goto done;
761 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
762 		goto done;
763 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
764 		goto done;
765 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
766 		goto done;
767 
768 	/* General purpose registers */
769 	rdx = 0xf00;
770 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
771 		goto done;
772 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
773 		goto done;
774 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
775 		goto done;
776 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
777 		goto done;
778 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
779 		goto done;
780 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
781 		goto done;
782 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
783 		goto done;
784 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
785 		goto done;
786 
787 	/* GDTR, IDTR */
788 	desc_base = 0;
789 	desc_limit = 0xffff;
790 	desc_access = 0;
791 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
792 			    desc_base, desc_limit, desc_access);
793 	if (error != 0)
794 		goto done;
795 
796 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
797 			    desc_base, desc_limit, desc_access);
798 	if (error != 0)
799 		goto done;
800 
801 	/* TR */
802 	desc_base = 0;
803 	desc_limit = 0xffff;
804 	desc_access = 0x0000008b;
805 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
806 	if (error)
807 		goto done;
808 
809 	sel = 0;
810 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
811 		goto done;
812 
813 	/* LDTR */
814 	desc_base = 0;
815 	desc_limit = 0xffff;
816 	desc_access = 0x00000082;
817 	error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
818 			    desc_limit, desc_access);
819 	if (error)
820 		goto done;
821 
822 	sel = 0;
823 	if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
824 		goto done;
825 
826 	/* XXX cr2, debug registers */
827 
828 	error = 0;
829 done:
830 	return (error);
831 }
832 
833 int
834 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
835 {
836 	int error, i;
837 	struct vm_gpa_pte gpapte;
838 
839 	bzero(&gpapte, sizeof(gpapte));
840 	gpapte.gpa = gpa;
841 
842 	error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
843 
844 	if (error == 0) {
845 		*num = gpapte.ptenum;
846 		for (i = 0; i < gpapte.ptenum; i++)
847 			pte[i] = gpapte.pte[i];
848 	}
849 
850 	return (error);
851 }
852 
853 int
854 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
855 {
856 	int error;
857 	struct vm_hpet_cap cap;
858 
859 	bzero(&cap, sizeof(struct vm_hpet_cap));
860 	error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
861 	if (capabilities != NULL)
862 		*capabilities = cap.capabilities;
863 	return (error);
864 }
865