1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/sysctl.h> 36 #include <sys/ioctl.h> 37 #include <sys/linker.h> 38 #include <sys/mman.h> 39 #include <sys/module.h> 40 #include <sys/_iovec.h> 41 #include <sys/cpuset.h> 42 43 #include <x86/segments.h> 44 #include <machine/specialreg.h> 45 46 #include <errno.h> 47 #include <stdbool.h> 48 #include <stdio.h> 49 #include <stdlib.h> 50 #include <assert.h> 51 #include <string.h> 52 #include <fcntl.h> 53 #include <unistd.h> 54 55 #include <libutil.h> 56 57 #include <vm/vm.h> 58 #include <machine/vmm.h> 59 #include <machine/vmm_dev.h> 60 #include <machine/vmm_snapshot.h> 61 62 #include "vmmapi.h" 63 64 #define MB (1024 * 1024UL) 65 #define GB (1024 * 1024 * 1024UL) 66 67 /* 68 * Size of the guard region before and after the virtual address space 69 * mapping the guest physical memory. This must be a multiple of the 70 * superpage size for performance reasons. 71 */ 72 #define VM_MMAP_GUARD_SIZE (4 * MB) 73 74 #define PROT_RW (PROT_READ | PROT_WRITE) 75 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC) 76 77 struct vmctx { 78 int fd; 79 uint32_t lowmem_limit; 80 int memflags; 81 size_t lowmem; 82 size_t highmem; 83 char *baseaddr; 84 char *name; 85 }; 86 87 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 88 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 89 90 static int 91 vm_device_open(const char *name) 92 { 93 int fd, len; 94 char *vmfile; 95 96 len = strlen("/dev/vmm/") + strlen(name) + 1; 97 vmfile = malloc(len); 98 assert(vmfile != NULL); 99 snprintf(vmfile, len, "/dev/vmm/%s", name); 100 101 /* Open the device file */ 102 fd = open(vmfile, O_RDWR, 0); 103 104 free(vmfile); 105 return (fd); 106 } 107 108 int 109 vm_create(const char *name) 110 { 111 /* Try to load vmm(4) module before creating a guest. */ 112 if (modfind("vmm") < 0) 113 kldload("vmm"); 114 return (CREATE((char *)name)); 115 } 116 117 struct vmctx * 118 vm_open(const char *name) 119 { 120 struct vmctx *vm; 121 122 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 123 assert(vm != NULL); 124 125 vm->fd = -1; 126 vm->memflags = 0; 127 vm->lowmem_limit = 3 * GB; 128 vm->name = (char *)(vm + 1); 129 strcpy(vm->name, name); 130 131 if ((vm->fd = vm_device_open(vm->name)) < 0) 132 goto err; 133 134 return (vm); 135 err: 136 vm_destroy(vm); 137 return (NULL); 138 } 139 140 void 141 vm_destroy(struct vmctx *vm) 142 { 143 assert(vm != NULL); 144 145 if (vm->fd >= 0) 146 close(vm->fd); 147 DESTROY(vm->name); 148 149 free(vm); 150 } 151 152 int 153 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 154 { 155 char *endptr; 156 size_t optval; 157 int error; 158 159 optval = strtoul(optarg, &endptr, 0); 160 if (*optarg != '\0' && *endptr == '\0') { 161 /* 162 * For the sake of backward compatibility if the memory size 163 * specified on the command line is less than a megabyte then 164 * it is interpreted as being in units of MB. 165 */ 166 if (optval < MB) 167 optval *= MB; 168 *ret_memsize = optval; 169 error = 0; 170 } else 171 error = expand_number(optarg, ret_memsize); 172 173 return (error); 174 } 175 176 uint32_t 177 vm_get_lowmem_limit(struct vmctx *ctx) 178 { 179 180 return (ctx->lowmem_limit); 181 } 182 183 void 184 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 185 { 186 187 ctx->lowmem_limit = limit; 188 } 189 190 void 191 vm_set_memflags(struct vmctx *ctx, int flags) 192 { 193 194 ctx->memflags = flags; 195 } 196 197 int 198 vm_get_memflags(struct vmctx *ctx) 199 { 200 201 return (ctx->memflags); 202 } 203 204 /* 205 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len). 206 */ 207 int 208 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off, 209 size_t len, int prot) 210 { 211 struct vm_memmap memmap; 212 int error, flags; 213 214 memmap.gpa = gpa; 215 memmap.segid = segid; 216 memmap.segoff = off; 217 memmap.len = len; 218 memmap.prot = prot; 219 memmap.flags = 0; 220 221 if (ctx->memflags & VM_MEM_F_WIRED) 222 memmap.flags |= VM_MEMMAP_F_WIRED; 223 224 /* 225 * If this mapping already exists then don't create it again. This 226 * is the common case for SYSMEM mappings created by bhyveload(8). 227 */ 228 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags); 229 if (error == 0 && gpa == memmap.gpa) { 230 if (segid != memmap.segid || off != memmap.segoff || 231 prot != memmap.prot || flags != memmap.flags) { 232 errno = EEXIST; 233 return (-1); 234 } else { 235 return (0); 236 } 237 } 238 239 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap); 240 return (error); 241 } 242 243 int 244 vm_get_guestmem_from_ctx(struct vmctx *ctx, char **guest_baseaddr, 245 size_t *lowmem_size, size_t *highmem_size) 246 { 247 248 *guest_baseaddr = ctx->baseaddr; 249 *lowmem_size = ctx->lowmem; 250 *highmem_size = ctx->highmem; 251 return (0); 252 } 253 254 int 255 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid, 256 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags) 257 { 258 struct vm_memmap memmap; 259 int error; 260 261 bzero(&memmap, sizeof(struct vm_memmap)); 262 memmap.gpa = *gpa; 263 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap); 264 if (error == 0) { 265 *gpa = memmap.gpa; 266 *segid = memmap.segid; 267 *segoff = memmap.segoff; 268 *len = memmap.len; 269 *prot = memmap.prot; 270 *flags = memmap.flags; 271 } 272 return (error); 273 } 274 275 /* 276 * Return 0 if the segments are identical and non-zero otherwise. 277 * 278 * This is slightly complicated by the fact that only device memory segments 279 * are named. 280 */ 281 static int 282 cmpseg(size_t len, const char *str, size_t len2, const char *str2) 283 { 284 285 if (len == len2) { 286 if ((!str && !str2) || (str && str2 && !strcmp(str, str2))) 287 return (0); 288 } 289 return (-1); 290 } 291 292 static int 293 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name) 294 { 295 struct vm_memseg memseg; 296 size_t n; 297 int error; 298 299 /* 300 * If the memory segment has already been created then just return. 301 * This is the usual case for the SYSMEM segment created by userspace 302 * loaders like bhyveload(8). 303 */ 304 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name, 305 sizeof(memseg.name)); 306 if (error) 307 return (error); 308 309 if (memseg.len != 0) { 310 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) { 311 errno = EINVAL; 312 return (-1); 313 } else { 314 return (0); 315 } 316 } 317 318 bzero(&memseg, sizeof(struct vm_memseg)); 319 memseg.segid = segid; 320 memseg.len = len; 321 if (name != NULL) { 322 n = strlcpy(memseg.name, name, sizeof(memseg.name)); 323 if (n >= sizeof(memseg.name)) { 324 errno = ENAMETOOLONG; 325 return (-1); 326 } 327 } 328 329 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg); 330 return (error); 331 } 332 333 int 334 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf, 335 size_t bufsize) 336 { 337 struct vm_memseg memseg; 338 size_t n; 339 int error; 340 341 memseg.segid = segid; 342 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg); 343 if (error == 0) { 344 *lenp = memseg.len; 345 n = strlcpy(namebuf, memseg.name, bufsize); 346 if (n >= bufsize) { 347 errno = ENAMETOOLONG; 348 error = -1; 349 } 350 } 351 return (error); 352 } 353 354 static int 355 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base) 356 { 357 char *ptr; 358 int error, flags; 359 360 /* Map 'len' bytes starting at 'gpa' in the guest address space */ 361 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL); 362 if (error) 363 return (error); 364 365 flags = MAP_SHARED | MAP_FIXED; 366 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 367 flags |= MAP_NOCORE; 368 369 /* mmap into the process address space on the host */ 370 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa); 371 if (ptr == MAP_FAILED) 372 return (-1); 373 374 return (0); 375 } 376 377 int 378 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 379 { 380 size_t objsize, len; 381 vm_paddr_t gpa; 382 char *baseaddr, *ptr; 383 int error; 384 385 assert(vms == VM_MMAP_ALL); 386 387 /* 388 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 389 * create another 'highmem' segment above 4GB for the remainder. 390 */ 391 if (memsize > ctx->lowmem_limit) { 392 ctx->lowmem = ctx->lowmem_limit; 393 ctx->highmem = memsize - ctx->lowmem_limit; 394 objsize = 4*GB + ctx->highmem; 395 } else { 396 ctx->lowmem = memsize; 397 ctx->highmem = 0; 398 objsize = ctx->lowmem; 399 } 400 401 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL); 402 if (error) 403 return (error); 404 405 /* 406 * Stake out a contiguous region covering the guest physical memory 407 * and the adjoining guard regions. 408 */ 409 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE; 410 ptr = mmap(NULL, len, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1, 0); 411 if (ptr == MAP_FAILED) 412 return (-1); 413 414 baseaddr = ptr + VM_MMAP_GUARD_SIZE; 415 if (ctx->highmem > 0) { 416 gpa = 4*GB; 417 len = ctx->highmem; 418 error = setup_memory_segment(ctx, gpa, len, baseaddr); 419 if (error) 420 return (error); 421 } 422 423 if (ctx->lowmem > 0) { 424 gpa = 0; 425 len = ctx->lowmem; 426 error = setup_memory_segment(ctx, gpa, len, baseaddr); 427 if (error) 428 return (error); 429 } 430 431 ctx->baseaddr = baseaddr; 432 433 return (0); 434 } 435 436 /* 437 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in 438 * the lowmem or highmem regions. 439 * 440 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region. 441 * The instruction emulation code depends on this behavior. 442 */ 443 void * 444 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 445 { 446 447 if (ctx->lowmem > 0) { 448 if (gaddr < ctx->lowmem && len <= ctx->lowmem && 449 gaddr + len <= ctx->lowmem) 450 return (ctx->baseaddr + gaddr); 451 } 452 453 if (ctx->highmem > 0) { 454 if (gaddr >= 4*GB) { 455 if (gaddr < 4*GB + ctx->highmem && 456 len <= ctx->highmem && 457 gaddr + len <= 4*GB + ctx->highmem) 458 return (ctx->baseaddr + gaddr); 459 } 460 } 461 462 return (NULL); 463 } 464 465 vm_paddr_t 466 vm_rev_map_gpa(struct vmctx *ctx, void *addr) 467 { 468 vm_paddr_t offaddr; 469 470 offaddr = (char *)addr - ctx->baseaddr; 471 472 if (ctx->lowmem > 0) 473 if (offaddr >= 0 && offaddr <= ctx->lowmem) 474 return (offaddr); 475 476 if (ctx->highmem > 0) 477 if (offaddr >= 4*GB && offaddr < 4*GB + ctx->highmem) 478 return (offaddr); 479 480 return ((vm_paddr_t)-1); 481 } 482 483 /* TODO: maximum size for vmname */ 484 int 485 vm_get_name(struct vmctx *ctx, char *buf, size_t max_len) 486 { 487 488 if (strlcpy(buf, ctx->name, max_len) >= max_len) 489 return (EINVAL); 490 return (0); 491 } 492 493 size_t 494 vm_get_lowmem_size(struct vmctx *ctx) 495 { 496 497 return (ctx->lowmem); 498 } 499 500 size_t 501 vm_get_highmem_size(struct vmctx *ctx) 502 { 503 504 return (ctx->highmem); 505 } 506 507 void * 508 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len) 509 { 510 char pathname[MAXPATHLEN]; 511 size_t len2; 512 char *base, *ptr; 513 int fd, error, flags; 514 515 fd = -1; 516 ptr = MAP_FAILED; 517 if (name == NULL || strlen(name) == 0) { 518 errno = EINVAL; 519 goto done; 520 } 521 522 error = vm_alloc_memseg(ctx, segid, len, name); 523 if (error) 524 goto done; 525 526 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname)); 527 strlcat(pathname, ctx->name, sizeof(pathname)); 528 strlcat(pathname, ".", sizeof(pathname)); 529 strlcat(pathname, name, sizeof(pathname)); 530 531 fd = open(pathname, O_RDWR); 532 if (fd < 0) 533 goto done; 534 535 /* 536 * Stake out a contiguous region covering the device memory and the 537 * adjoining guard regions. 538 */ 539 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE; 540 base = mmap(NULL, len2, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1, 541 0); 542 if (base == MAP_FAILED) 543 goto done; 544 545 flags = MAP_SHARED | MAP_FIXED; 546 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 547 flags |= MAP_NOCORE; 548 549 /* mmap the devmem region in the host address space */ 550 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0); 551 done: 552 if (fd >= 0) 553 close(fd); 554 return (ptr); 555 } 556 557 int 558 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 559 uint64_t base, uint32_t limit, uint32_t access) 560 { 561 int error; 562 struct vm_seg_desc vmsegdesc; 563 564 bzero(&vmsegdesc, sizeof(vmsegdesc)); 565 vmsegdesc.cpuid = vcpu; 566 vmsegdesc.regnum = reg; 567 vmsegdesc.desc.base = base; 568 vmsegdesc.desc.limit = limit; 569 vmsegdesc.desc.access = access; 570 571 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 572 return (error); 573 } 574 575 int 576 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 577 uint64_t *base, uint32_t *limit, uint32_t *access) 578 { 579 int error; 580 struct vm_seg_desc vmsegdesc; 581 582 bzero(&vmsegdesc, sizeof(vmsegdesc)); 583 vmsegdesc.cpuid = vcpu; 584 vmsegdesc.regnum = reg; 585 586 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 587 if (error == 0) { 588 *base = vmsegdesc.desc.base; 589 *limit = vmsegdesc.desc.limit; 590 *access = vmsegdesc.desc.access; 591 } 592 return (error); 593 } 594 595 int 596 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 597 { 598 int error; 599 600 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 601 &seg_desc->access); 602 return (error); 603 } 604 605 int 606 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 607 { 608 int error; 609 struct vm_register vmreg; 610 611 bzero(&vmreg, sizeof(vmreg)); 612 vmreg.cpuid = vcpu; 613 vmreg.regnum = reg; 614 vmreg.regval = val; 615 616 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 617 return (error); 618 } 619 620 int 621 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 622 { 623 int error; 624 struct vm_register vmreg; 625 626 bzero(&vmreg, sizeof(vmreg)); 627 vmreg.cpuid = vcpu; 628 vmreg.regnum = reg; 629 630 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 631 *ret_val = vmreg.regval; 632 return (error); 633 } 634 635 int 636 vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count, 637 const int *regnums, uint64_t *regvals) 638 { 639 int error; 640 struct vm_register_set vmregset; 641 642 bzero(&vmregset, sizeof(vmregset)); 643 vmregset.cpuid = vcpu; 644 vmregset.count = count; 645 vmregset.regnums = regnums; 646 vmregset.regvals = regvals; 647 648 error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset); 649 return (error); 650 } 651 652 int 653 vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count, 654 const int *regnums, uint64_t *regvals) 655 { 656 int error; 657 struct vm_register_set vmregset; 658 659 bzero(&vmregset, sizeof(vmregset)); 660 vmregset.cpuid = vcpu; 661 vmregset.count = count; 662 vmregset.regnums = regnums; 663 vmregset.regvals = regvals; 664 665 error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset); 666 return (error); 667 } 668 669 int 670 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit) 671 { 672 int error; 673 struct vm_run vmrun; 674 675 bzero(&vmrun, sizeof(vmrun)); 676 vmrun.cpuid = vcpu; 677 678 error = ioctl(ctx->fd, VM_RUN, &vmrun); 679 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 680 return (error); 681 } 682 683 int 684 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 685 { 686 struct vm_suspend vmsuspend; 687 688 bzero(&vmsuspend, sizeof(vmsuspend)); 689 vmsuspend.how = how; 690 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 691 } 692 693 int 694 vm_reinit(struct vmctx *ctx) 695 { 696 697 return (ioctl(ctx->fd, VM_REINIT, 0)); 698 } 699 700 int 701 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid, 702 uint32_t errcode, int restart_instruction) 703 { 704 struct vm_exception exc; 705 706 exc.cpuid = vcpu; 707 exc.vector = vector; 708 exc.error_code = errcode; 709 exc.error_code_valid = errcode_valid; 710 exc.restart_instruction = restart_instruction; 711 712 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 713 } 714 715 int 716 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 717 { 718 /* 719 * The apic id associated with the 'vcpu' has the same numerical value 720 * as the 'vcpu' itself. 721 */ 722 return (apicid); 723 } 724 725 int 726 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 727 { 728 struct vm_lapic_irq vmirq; 729 730 bzero(&vmirq, sizeof(vmirq)); 731 vmirq.cpuid = vcpu; 732 vmirq.vector = vector; 733 734 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 735 } 736 737 int 738 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 739 { 740 struct vm_lapic_irq vmirq; 741 742 bzero(&vmirq, sizeof(vmirq)); 743 vmirq.cpuid = vcpu; 744 vmirq.vector = vector; 745 746 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 747 } 748 749 int 750 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 751 { 752 struct vm_lapic_msi vmmsi; 753 754 bzero(&vmmsi, sizeof(vmmsi)); 755 vmmsi.addr = addr; 756 vmmsi.msg = msg; 757 758 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 759 } 760 761 int 762 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 763 { 764 struct vm_ioapic_irq ioapic_irq; 765 766 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 767 ioapic_irq.irq = irq; 768 769 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 770 } 771 772 int 773 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 774 { 775 struct vm_ioapic_irq ioapic_irq; 776 777 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 778 ioapic_irq.irq = irq; 779 780 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 781 } 782 783 int 784 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 785 { 786 struct vm_ioapic_irq ioapic_irq; 787 788 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 789 ioapic_irq.irq = irq; 790 791 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 792 } 793 794 int 795 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 796 { 797 798 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 799 } 800 801 int 802 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 803 { 804 struct vm_isa_irq isa_irq; 805 806 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 807 isa_irq.atpic_irq = atpic_irq; 808 isa_irq.ioapic_irq = ioapic_irq; 809 810 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 811 } 812 813 int 814 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 815 { 816 struct vm_isa_irq isa_irq; 817 818 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 819 isa_irq.atpic_irq = atpic_irq; 820 isa_irq.ioapic_irq = ioapic_irq; 821 822 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 823 } 824 825 int 826 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 827 { 828 struct vm_isa_irq isa_irq; 829 830 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 831 isa_irq.atpic_irq = atpic_irq; 832 isa_irq.ioapic_irq = ioapic_irq; 833 834 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 835 } 836 837 int 838 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 839 enum vm_intr_trigger trigger) 840 { 841 struct vm_isa_irq_trigger isa_irq_trigger; 842 843 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 844 isa_irq_trigger.atpic_irq = atpic_irq; 845 isa_irq_trigger.trigger = trigger; 846 847 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 848 } 849 850 int 851 vm_inject_nmi(struct vmctx *ctx, int vcpu) 852 { 853 struct vm_nmi vmnmi; 854 855 bzero(&vmnmi, sizeof(vmnmi)); 856 vmnmi.cpuid = vcpu; 857 858 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 859 } 860 861 static const char *capstrmap[] = { 862 [VM_CAP_HALT_EXIT] = "hlt_exit", 863 [VM_CAP_MTRAP_EXIT] = "mtrap_exit", 864 [VM_CAP_PAUSE_EXIT] = "pause_exit", 865 [VM_CAP_UNRESTRICTED_GUEST] = "unrestricted_guest", 866 [VM_CAP_ENABLE_INVPCID] = "enable_invpcid", 867 [VM_CAP_BPT_EXIT] = "bpt_exit", 868 }; 869 870 int 871 vm_capability_name2type(const char *capname) 872 { 873 int i; 874 875 for (i = 0; i < nitems(capstrmap); i++) { 876 if (strcmp(capstrmap[i], capname) == 0) 877 return (i); 878 } 879 880 return (-1); 881 } 882 883 const char * 884 vm_capability_type2name(int type) 885 { 886 if (type >= 0 && type < nitems(capstrmap)) 887 return (capstrmap[type]); 888 889 return (NULL); 890 } 891 892 int 893 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 894 int *retval) 895 { 896 int error; 897 struct vm_capability vmcap; 898 899 bzero(&vmcap, sizeof(vmcap)); 900 vmcap.cpuid = vcpu; 901 vmcap.captype = cap; 902 903 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 904 *retval = vmcap.capval; 905 return (error); 906 } 907 908 int 909 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 910 { 911 struct vm_capability vmcap; 912 913 bzero(&vmcap, sizeof(vmcap)); 914 vmcap.cpuid = vcpu; 915 vmcap.captype = cap; 916 vmcap.capval = val; 917 918 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 919 } 920 921 int 922 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 923 { 924 struct vm_pptdev pptdev; 925 926 bzero(&pptdev, sizeof(pptdev)); 927 pptdev.bus = bus; 928 pptdev.slot = slot; 929 pptdev.func = func; 930 931 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 932 } 933 934 int 935 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 936 { 937 struct vm_pptdev pptdev; 938 939 bzero(&pptdev, sizeof(pptdev)); 940 pptdev.bus = bus; 941 pptdev.slot = slot; 942 pptdev.func = func; 943 944 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 945 } 946 947 int 948 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 949 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 950 { 951 struct vm_pptdev_mmio pptmmio; 952 953 bzero(&pptmmio, sizeof(pptmmio)); 954 pptmmio.bus = bus; 955 pptmmio.slot = slot; 956 pptmmio.func = func; 957 pptmmio.gpa = gpa; 958 pptmmio.len = len; 959 pptmmio.hpa = hpa; 960 961 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 962 } 963 964 int 965 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 966 uint64_t addr, uint64_t msg, int numvec) 967 { 968 struct vm_pptdev_msi pptmsi; 969 970 bzero(&pptmsi, sizeof(pptmsi)); 971 pptmsi.vcpu = vcpu; 972 pptmsi.bus = bus; 973 pptmsi.slot = slot; 974 pptmsi.func = func; 975 pptmsi.msg = msg; 976 pptmsi.addr = addr; 977 pptmsi.numvec = numvec; 978 979 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 980 } 981 982 int 983 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 984 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 985 { 986 struct vm_pptdev_msix pptmsix; 987 988 bzero(&pptmsix, sizeof(pptmsix)); 989 pptmsix.vcpu = vcpu; 990 pptmsix.bus = bus; 991 pptmsix.slot = slot; 992 pptmsix.func = func; 993 pptmsix.idx = idx; 994 pptmsix.msg = msg; 995 pptmsix.addr = addr; 996 pptmsix.vector_control = vector_control; 997 998 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 999 } 1000 1001 uint64_t * 1002 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 1003 int *ret_entries) 1004 { 1005 int error; 1006 1007 static struct vm_stats vmstats; 1008 1009 vmstats.cpuid = vcpu; 1010 1011 error = ioctl(ctx->fd, VM_STATS, &vmstats); 1012 if (error == 0) { 1013 if (ret_entries) 1014 *ret_entries = vmstats.num_entries; 1015 if (ret_tv) 1016 *ret_tv = vmstats.tv; 1017 return (vmstats.statbuf); 1018 } else 1019 return (NULL); 1020 } 1021 1022 const char * 1023 vm_get_stat_desc(struct vmctx *ctx, int index) 1024 { 1025 static struct vm_stat_desc statdesc; 1026 1027 statdesc.index = index; 1028 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 1029 return (statdesc.desc); 1030 else 1031 return (NULL); 1032 } 1033 1034 int 1035 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 1036 { 1037 int error; 1038 struct vm_x2apic x2apic; 1039 1040 bzero(&x2apic, sizeof(x2apic)); 1041 x2apic.cpuid = vcpu; 1042 1043 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 1044 *state = x2apic.state; 1045 return (error); 1046 } 1047 1048 int 1049 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 1050 { 1051 int error; 1052 struct vm_x2apic x2apic; 1053 1054 bzero(&x2apic, sizeof(x2apic)); 1055 x2apic.cpuid = vcpu; 1056 x2apic.state = state; 1057 1058 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 1059 1060 return (error); 1061 } 1062 1063 /* 1064 * From Intel Vol 3a: 1065 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 1066 */ 1067 int 1068 vcpu_reset(struct vmctx *vmctx, int vcpu) 1069 { 1070 int error; 1071 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 1072 uint32_t desc_access, desc_limit; 1073 uint16_t sel; 1074 1075 zero = 0; 1076 1077 rflags = 0x2; 1078 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 1079 if (error) 1080 goto done; 1081 1082 rip = 0xfff0; 1083 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 1084 goto done; 1085 1086 cr0 = CR0_NE; 1087 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 1088 goto done; 1089 1090 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 1091 goto done; 1092 1093 cr4 = 0; 1094 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 1095 goto done; 1096 1097 /* 1098 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 1099 */ 1100 desc_base = 0xffff0000; 1101 desc_limit = 0xffff; 1102 desc_access = 0x0093; 1103 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 1104 desc_base, desc_limit, desc_access); 1105 if (error) 1106 goto done; 1107 1108 sel = 0xf000; 1109 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 1110 goto done; 1111 1112 /* 1113 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 1114 */ 1115 desc_base = 0; 1116 desc_limit = 0xffff; 1117 desc_access = 0x0093; 1118 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 1119 desc_base, desc_limit, desc_access); 1120 if (error) 1121 goto done; 1122 1123 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 1124 desc_base, desc_limit, desc_access); 1125 if (error) 1126 goto done; 1127 1128 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 1129 desc_base, desc_limit, desc_access); 1130 if (error) 1131 goto done; 1132 1133 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 1134 desc_base, desc_limit, desc_access); 1135 if (error) 1136 goto done; 1137 1138 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 1139 desc_base, desc_limit, desc_access); 1140 if (error) 1141 goto done; 1142 1143 sel = 0; 1144 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 1145 goto done; 1146 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 1147 goto done; 1148 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 1149 goto done; 1150 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 1151 goto done; 1152 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 1153 goto done; 1154 1155 /* General purpose registers */ 1156 rdx = 0xf00; 1157 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 1158 goto done; 1159 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 1160 goto done; 1161 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 1162 goto done; 1163 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 1164 goto done; 1165 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 1166 goto done; 1167 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 1168 goto done; 1169 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 1170 goto done; 1171 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 1172 goto done; 1173 1174 /* GDTR, IDTR */ 1175 desc_base = 0; 1176 desc_limit = 0xffff; 1177 desc_access = 0; 1178 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 1179 desc_base, desc_limit, desc_access); 1180 if (error != 0) 1181 goto done; 1182 1183 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 1184 desc_base, desc_limit, desc_access); 1185 if (error != 0) 1186 goto done; 1187 1188 /* TR */ 1189 desc_base = 0; 1190 desc_limit = 0xffff; 1191 desc_access = 0x0000008b; 1192 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 1193 if (error) 1194 goto done; 1195 1196 sel = 0; 1197 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 1198 goto done; 1199 1200 /* LDTR */ 1201 desc_base = 0; 1202 desc_limit = 0xffff; 1203 desc_access = 0x00000082; 1204 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 1205 desc_limit, desc_access); 1206 if (error) 1207 goto done; 1208 1209 sel = 0; 1210 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 1211 goto done; 1212 1213 /* XXX cr2, debug registers */ 1214 1215 error = 0; 1216 done: 1217 return (error); 1218 } 1219 1220 int 1221 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 1222 { 1223 int error, i; 1224 struct vm_gpa_pte gpapte; 1225 1226 bzero(&gpapte, sizeof(gpapte)); 1227 gpapte.gpa = gpa; 1228 1229 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 1230 1231 if (error == 0) { 1232 *num = gpapte.ptenum; 1233 for (i = 0; i < gpapte.ptenum; i++) 1234 pte[i] = gpapte.pte[i]; 1235 } 1236 1237 return (error); 1238 } 1239 1240 int 1241 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 1242 { 1243 int error; 1244 struct vm_hpet_cap cap; 1245 1246 bzero(&cap, sizeof(struct vm_hpet_cap)); 1247 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 1248 if (capabilities != NULL) 1249 *capabilities = cap.capabilities; 1250 return (error); 1251 } 1252 1253 int 1254 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1255 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1256 { 1257 struct vm_gla2gpa gg; 1258 int error; 1259 1260 bzero(&gg, sizeof(struct vm_gla2gpa)); 1261 gg.vcpuid = vcpu; 1262 gg.prot = prot; 1263 gg.gla = gla; 1264 gg.paging = *paging; 1265 1266 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 1267 if (error == 0) { 1268 *fault = gg.fault; 1269 *gpa = gg.gpa; 1270 } 1271 return (error); 1272 } 1273 1274 int 1275 vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1276 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1277 { 1278 struct vm_gla2gpa gg; 1279 int error; 1280 1281 bzero(&gg, sizeof(struct vm_gla2gpa)); 1282 gg.vcpuid = vcpu; 1283 gg.prot = prot; 1284 gg.gla = gla; 1285 gg.paging = *paging; 1286 1287 error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg); 1288 if (error == 0) { 1289 *fault = gg.fault; 1290 *gpa = gg.gpa; 1291 } 1292 return (error); 1293 } 1294 1295 #ifndef min 1296 #define min(a,b) (((a) < (b)) ? (a) : (b)) 1297 #endif 1298 1299 int 1300 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1301 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, 1302 int *fault) 1303 { 1304 void *va; 1305 uint64_t gpa; 1306 int error, i, n, off; 1307 1308 for (i = 0; i < iovcnt; i++) { 1309 iov[i].iov_base = 0; 1310 iov[i].iov_len = 0; 1311 } 1312 1313 while (len) { 1314 assert(iovcnt > 0); 1315 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault); 1316 if (error || *fault) 1317 return (error); 1318 1319 off = gpa & PAGE_MASK; 1320 n = min(len, PAGE_SIZE - off); 1321 1322 va = vm_map_gpa(ctx, gpa, n); 1323 if (va == NULL) 1324 return (EFAULT); 1325 1326 iov->iov_base = va; 1327 iov->iov_len = n; 1328 iov++; 1329 iovcnt--; 1330 1331 gla += n; 1332 len -= n; 1333 } 1334 return (0); 1335 } 1336 1337 void 1338 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt) 1339 { 1340 1341 return; 1342 } 1343 1344 void 1345 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1346 { 1347 const char *src; 1348 char *dst; 1349 size_t n; 1350 1351 dst = vp; 1352 while (len) { 1353 assert(iov->iov_len); 1354 n = min(len, iov->iov_len); 1355 src = iov->iov_base; 1356 bcopy(src, dst, n); 1357 1358 iov++; 1359 dst += n; 1360 len -= n; 1361 } 1362 } 1363 1364 void 1365 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1366 size_t len) 1367 { 1368 const char *src; 1369 char *dst; 1370 size_t n; 1371 1372 src = vp; 1373 while (len) { 1374 assert(iov->iov_len); 1375 n = min(len, iov->iov_len); 1376 dst = iov->iov_base; 1377 bcopy(src, dst, n); 1378 1379 iov++; 1380 src += n; 1381 len -= n; 1382 } 1383 } 1384 1385 static int 1386 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1387 { 1388 struct vm_cpuset vm_cpuset; 1389 int error; 1390 1391 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1392 vm_cpuset.which = which; 1393 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1394 vm_cpuset.cpus = cpus; 1395 1396 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1397 return (error); 1398 } 1399 1400 int 1401 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1402 { 1403 1404 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1405 } 1406 1407 int 1408 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1409 { 1410 1411 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1412 } 1413 1414 int 1415 vm_debug_cpus(struct vmctx *ctx, cpuset_t *cpus) 1416 { 1417 1418 return (vm_get_cpus(ctx, VM_DEBUG_CPUS, cpus)); 1419 } 1420 1421 int 1422 vm_activate_cpu(struct vmctx *ctx, int vcpu) 1423 { 1424 struct vm_activate_cpu ac; 1425 int error; 1426 1427 bzero(&ac, sizeof(struct vm_activate_cpu)); 1428 ac.vcpuid = vcpu; 1429 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1430 return (error); 1431 } 1432 1433 int 1434 vm_suspend_cpu(struct vmctx *ctx, int vcpu) 1435 { 1436 struct vm_activate_cpu ac; 1437 int error; 1438 1439 bzero(&ac, sizeof(struct vm_activate_cpu)); 1440 ac.vcpuid = vcpu; 1441 error = ioctl(ctx->fd, VM_SUSPEND_CPU, &ac); 1442 return (error); 1443 } 1444 1445 int 1446 vm_resume_cpu(struct vmctx *ctx, int vcpu) 1447 { 1448 struct vm_activate_cpu ac; 1449 int error; 1450 1451 bzero(&ac, sizeof(struct vm_activate_cpu)); 1452 ac.vcpuid = vcpu; 1453 error = ioctl(ctx->fd, VM_RESUME_CPU, &ac); 1454 return (error); 1455 } 1456 1457 int 1458 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1459 { 1460 struct vm_intinfo vmii; 1461 int error; 1462 1463 bzero(&vmii, sizeof(struct vm_intinfo)); 1464 vmii.vcpuid = vcpu; 1465 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1466 if (error == 0) { 1467 *info1 = vmii.info1; 1468 *info2 = vmii.info2; 1469 } 1470 return (error); 1471 } 1472 1473 int 1474 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1475 { 1476 struct vm_intinfo vmii; 1477 int error; 1478 1479 bzero(&vmii, sizeof(struct vm_intinfo)); 1480 vmii.vcpuid = vcpu; 1481 vmii.info1 = info1; 1482 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1483 return (error); 1484 } 1485 1486 int 1487 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value) 1488 { 1489 struct vm_rtc_data rtcdata; 1490 int error; 1491 1492 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1493 rtcdata.offset = offset; 1494 rtcdata.value = value; 1495 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata); 1496 return (error); 1497 } 1498 1499 int 1500 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval) 1501 { 1502 struct vm_rtc_data rtcdata; 1503 int error; 1504 1505 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1506 rtcdata.offset = offset; 1507 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata); 1508 if (error == 0) 1509 *retval = rtcdata.value; 1510 return (error); 1511 } 1512 1513 int 1514 vm_rtc_settime(struct vmctx *ctx, time_t secs) 1515 { 1516 struct vm_rtc_time rtctime; 1517 int error; 1518 1519 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1520 rtctime.secs = secs; 1521 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime); 1522 return (error); 1523 } 1524 1525 int 1526 vm_rtc_gettime(struct vmctx *ctx, time_t *secs) 1527 { 1528 struct vm_rtc_time rtctime; 1529 int error; 1530 1531 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1532 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime); 1533 if (error == 0) 1534 *secs = rtctime.secs; 1535 return (error); 1536 } 1537 1538 int 1539 vm_restart_instruction(void *arg, int vcpu) 1540 { 1541 struct vmctx *ctx = arg; 1542 1543 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu)); 1544 } 1545 1546 int 1547 vm_snapshot_req(struct vm_snapshot_meta *meta) 1548 { 1549 1550 if (ioctl(meta->ctx->fd, VM_SNAPSHOT_REQ, meta) == -1) { 1551 #ifdef SNAPSHOT_DEBUG 1552 fprintf(stderr, "%s: snapshot failed for %s: %d\r\n", 1553 __func__, meta->dev_name, errno); 1554 #endif 1555 return (-1); 1556 } 1557 return (0); 1558 } 1559 1560 int 1561 vm_restore_time(struct vmctx *ctx) 1562 { 1563 int dummy; 1564 1565 dummy = 0; 1566 return (ioctl(ctx->fd, VM_RESTORE_TIME, &dummy)); 1567 } 1568 1569 int 1570 vm_set_topology(struct vmctx *ctx, 1571 uint16_t sockets, uint16_t cores, uint16_t threads, uint16_t maxcpus) 1572 { 1573 struct vm_cpu_topology topology; 1574 1575 bzero(&topology, sizeof (struct vm_cpu_topology)); 1576 topology.sockets = sockets; 1577 topology.cores = cores; 1578 topology.threads = threads; 1579 topology.maxcpus = maxcpus; 1580 return (ioctl(ctx->fd, VM_SET_TOPOLOGY, &topology)); 1581 } 1582 1583 int 1584 vm_get_topology(struct vmctx *ctx, 1585 uint16_t *sockets, uint16_t *cores, uint16_t *threads, uint16_t *maxcpus) 1586 { 1587 struct vm_cpu_topology topology; 1588 int error; 1589 1590 bzero(&topology, sizeof (struct vm_cpu_topology)); 1591 error = ioctl(ctx->fd, VM_GET_TOPOLOGY, &topology); 1592 if (error == 0) { 1593 *sockets = topology.sockets; 1594 *cores = topology.cores; 1595 *threads = topology.threads; 1596 *maxcpus = topology.maxcpus; 1597 } 1598 return (error); 1599 } 1600 1601 int 1602 vm_get_device_fd(struct vmctx *ctx) 1603 { 1604 1605 return (ctx->fd); 1606 } 1607 1608 const cap_ioctl_t * 1609 vm_get_ioctls(size_t *len) 1610 { 1611 cap_ioctl_t *cmds; 1612 /* keep in sync with machine/vmm_dev.h */ 1613 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT, 1614 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG, 1615 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER, 1616 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR, 1617 VM_SET_REGISTER_SET, VM_GET_REGISTER_SET, 1618 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ, 1619 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ, 1620 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ, 1621 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER, 1622 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV, 1623 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI, 1624 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC, 1625 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE, 1626 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA, 1627 VM_GLA2GPA_NOFAULT, 1628 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SUSPEND_CPU, VM_RESUME_CPU, 1629 VM_SET_INTINFO, VM_GET_INTINFO, 1630 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME, 1631 VM_RESTART_INSTRUCTION, VM_SET_TOPOLOGY, VM_GET_TOPOLOGY }; 1632 1633 if (len == NULL) { 1634 cmds = malloc(sizeof(vm_ioctl_cmds)); 1635 if (cmds == NULL) 1636 return (NULL); 1637 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds)); 1638 return (cmds); 1639 } 1640 1641 *len = nitems(vm_ioctl_cmds); 1642 return (NULL); 1643 } 1644