1[ 2 { 3 "BriefDescription": "Total pipeline cost of branch related instructions (used for program control-flow including function calls)", 4 "MetricExpr": "100 * (( BR_INST_RETIRED.COND + 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) ) / TOPDOWN.SLOTS)", 5 "MetricGroup": "Ret", 6 "MetricName": "Branching_Overhead" 7 }, 8 { 9 "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)", 10 "MetricExpr": "100 * (( 5 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) + (ICACHE_16B.IFDATA_STALL / CPU_CLK_UNHALTED.THREAD) + (10 * BACLEARS.ANY / CPU_CLK_UNHALTED.THREAD) ) / #(( 5 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS)", 11 "MetricGroup": "BigFoot;Fed;Frontend;IcMiss;MemoryTLB", 12 "MetricName": "Big_Code" 13 }, 14 { 15 "BriefDescription": "Instructions Per Cycle (per Logical Processor)", 16 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD", 17 "MetricGroup": "Ret;Summary", 18 "MetricName": "IPC" 19 }, 20 { 21 "BriefDescription": "Cycles Per Instruction (per Logical Processor)", 22 "MetricExpr": "1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)", 23 "MetricGroup": "Pipeline;Mem", 24 "MetricName": "CPI" 25 }, 26 { 27 "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 28 "MetricExpr": "CPU_CLK_UNHALTED.THREAD", 29 "MetricGroup": "Pipeline", 30 "MetricName": "CLKS" 31 }, 32 { 33 "BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor ICL onward)", 34 "MetricExpr": "TOPDOWN.SLOTS", 35 "MetricGroup": "TmaL1", 36 "MetricName": "SLOTS" 37 }, 38 { 39 "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor", 40 "MetricExpr": "TOPDOWN.SLOTS / ( TOPDOWN.SLOTS / 2 ) if #SMT_on else 1", 41 "MetricGroup": "SMT", 42 "MetricName": "Slots_Utilization" 43 }, 44 { 45 "BriefDescription": "The ratio of Executed- by Issued-Uops", 46 "MetricExpr": "UOPS_EXECUTED.THREAD / UOPS_ISSUED.ANY", 47 "MetricGroup": "Cor;Pipeline", 48 "MetricName": "Execute_per_Issue", 49 "PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. Ratio < 1 suggest high rate of \"execute\" at rename stage." 50 }, 51 { 52 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)", 53 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED", 54 "MetricGroup": "Ret;SMT;TmaL1", 55 "MetricName": "CoreIPC" 56 }, 57 { 58 "BriefDescription": "Floating Point Operations Per Cycle", 59 "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED", 60 "MetricGroup": "Ret;Flops", 61 "MetricName": "FLOPc" 62 }, 63 { 64 "BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of the vector width)", 65 "MetricExpr": "( (FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE) + (FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE) ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )", 66 "MetricGroup": "Cor;Flops;HPC", 67 "MetricName": "FP_Arith_Utilization", 68 "PublicDescription": "Actual per-core usage of the Floating Point execution units (regardless of the vector width). Values > 1 are possible due to Fused-Multiply Add (FMA) counting." 69 }, 70 { 71 "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is at least 1 uop executed)", 72 "MetricExpr": "UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)", 73 "MetricGroup": "Backend;Cor;Pipeline;PortsUtil", 74 "MetricName": "ILP" 75 }, 76 { 77 "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)", 78 "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES", 79 "MetricGroup": "Bad;BadSpec;BrMispredicts", 80 "MetricName": "IpMispredict" 81 }, 82 { 83 "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core", 84 "MetricExpr": "CPU_CLK_UNHALTED.DISTRIBUTED", 85 "MetricGroup": "SMT", 86 "MetricName": "CORE_CLKS" 87 }, 88 { 89 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)", 90 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS", 91 "MetricGroup": "InsType", 92 "MetricName": "IpLoad" 93 }, 94 { 95 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)", 96 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES", 97 "MetricGroup": "InsType", 98 "MetricName": "IpStore" 99 }, 100 { 101 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)", 102 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES", 103 "MetricGroup": "Branches;Fed;InsType", 104 "MetricName": "IpBranch" 105 }, 106 { 107 "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)", 108 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL", 109 "MetricGroup": "Branches;Fed;PGO", 110 "MetricName": "IpCall" 111 }, 112 { 113 "BriefDescription": "Instruction per taken branch", 114 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN", 115 "MetricGroup": "Branches;Fed;FetchBW;Frontend;PGO", 116 "MetricName": "IpTB" 117 }, 118 { 119 "BriefDescription": "Branch instructions per taken branch. ", 120 "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN", 121 "MetricGroup": "Branches;Fed;PGO", 122 "MetricName": "BpTkBranch" 123 }, 124 { 125 "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)", 126 "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )", 127 "MetricGroup": "Flops;InsType", 128 "MetricName": "IpFLOP" 129 }, 130 { 131 "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)", 132 "MetricExpr": "INST_RETIRED.ANY / ( (FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE) + (FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE) )", 133 "MetricGroup": "Flops;InsType", 134 "MetricName": "IpArith", 135 "PublicDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate). May undercount due to FMA double counting. Approximated prior to BDW." 136 }, 137 { 138 "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)", 139 "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_SINGLE", 140 "MetricGroup": "Flops;FpScalar;InsType", 141 "MetricName": "IpArith_Scalar_SP", 142 "PublicDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 143 }, 144 { 145 "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)", 146 "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_DOUBLE", 147 "MetricGroup": "Flops;FpScalar;InsType", 148 "MetricName": "IpArith_Scalar_DP", 149 "PublicDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 150 }, 151 { 152 "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)", 153 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE )", 154 "MetricGroup": "Flops;FpVector;InsType", 155 "MetricName": "IpArith_AVX128", 156 "PublicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 157 }, 158 { 159 "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)", 160 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )", 161 "MetricGroup": "Flops;FpVector;InsType", 162 "MetricName": "IpArith_AVX256", 163 "PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 164 }, 165 { 166 "BriefDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate)", 167 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )", 168 "MetricGroup": "Flops;FpVector;InsType", 169 "MetricName": "IpArith_AVX512", 170 "PublicDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 171 }, 172 { 173 "BriefDescription": "Total number of retired Instructions, Sample with: INST_RETIRED.PREC_DIST", 174 "MetricExpr": "INST_RETIRED.ANY", 175 "MetricGroup": "Summary;TmaL1", 176 "MetricName": "Instructions" 177 }, 178 { 179 "BriefDescription": "Average number of Uops issued by front-end when it issued something", 180 "MetricExpr": "UOPS_ISSUED.ANY / cpu@UOPS_ISSUED.ANY\\,cmask\\=1@", 181 "MetricGroup": "Fed;FetchBW", 182 "MetricName": "Fetch_UpC" 183 }, 184 { 185 "BriefDescription": "Fraction of Uops delivered by the LSD (Loop Stream Detector; aka Loop Cache)", 186 "MetricExpr": "LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)", 187 "MetricGroup": "Fed;LSD", 188 "MetricName": "LSD_Coverage" 189 }, 190 { 191 "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)", 192 "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)", 193 "MetricGroup": "DSB;Fed;FetchBW", 194 "MetricName": "DSB_Coverage" 195 }, 196 { 197 "BriefDescription": "Number of Instructions per non-speculative DSB miss", 198 "MetricExpr": "INST_RETIRED.ANY / FRONTEND_RETIRED.ANY_DSB_MISS", 199 "MetricGroup": "DSBmiss;Fed", 200 "MetricName": "IpDSB_Miss_Ret" 201 }, 202 { 203 "BriefDescription": "Fraction of branches that are non-taken conditionals", 204 "MetricExpr": "BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES", 205 "MetricGroup": "Bad;Branches;CodeGen;PGO", 206 "MetricName": "Cond_NT" 207 }, 208 { 209 "BriefDescription": "Fraction of branches that are taken conditionals", 210 "MetricExpr": "BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES", 211 "MetricGroup": "Bad;Branches;CodeGen;PGO", 212 "MetricName": "Cond_TK" 213 }, 214 { 215 "BriefDescription": "Fraction of branches that are CALL or RET", 216 "MetricExpr": "( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES", 217 "MetricGroup": "Bad;Branches", 218 "MetricName": "CallRet" 219 }, 220 { 221 "BriefDescription": "Fraction of branches that are unconditional (direct or indirect) jumps", 222 "MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES", 223 "MetricGroup": "Bad;Branches", 224 "MetricName": "Jump" 225 }, 226 { 227 "BriefDescription": "Fraction of branches of other types (not individually covered by other metrics in Info.Branches group)", 228 "MetricExpr": "1 - ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES) + ((BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES) )", 229 "MetricGroup": "Bad;Branches", 230 "MetricName": "Other_Branches" 231 }, 232 { 233 "BriefDescription": "Actual Average Latency for L1 data-cache miss demand load instructions (in core cycles)", 234 "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )", 235 "MetricGroup": "Mem;MemoryBound;MemoryLat", 236 "MetricName": "Load_Miss_Real_Latency", 237 "PublicDescription": "Actual Average Latency for L1 data-cache miss demand load instructions (in core cycles). Latency may be overestimated for multi-load instructions - e.g. repeat strings." 238 }, 239 { 240 "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)", 241 "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES", 242 "MetricGroup": "Mem;MemoryBound;MemoryBW", 243 "MetricName": "MLP" 244 }, 245 { 246 "BriefDescription": "Average data fill bandwidth to the L1 data cache [GB / sec]", 247 "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time", 248 "MetricGroup": "Mem;MemoryBW", 249 "MetricName": "L1D_Cache_Fill_BW" 250 }, 251 { 252 "BriefDescription": "Average data fill bandwidth to the L2 cache [GB / sec]", 253 "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time", 254 "MetricGroup": "Mem;MemoryBW", 255 "MetricName": "L2_Cache_Fill_BW" 256 }, 257 { 258 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]", 259 "MetricExpr": "64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time", 260 "MetricGroup": "Mem;MemoryBW", 261 "MetricName": "L3_Cache_Fill_BW" 262 }, 263 { 264 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]", 265 "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time", 266 "MetricGroup": "Mem;MemoryBW;Offcore", 267 "MetricName": "L3_Cache_Access_BW" 268 }, 269 { 270 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads", 271 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY", 272 "MetricGroup": "Mem;CacheMisses", 273 "MetricName": "L1MPKI" 274 }, 275 { 276 "BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including speculative)", 277 "MetricExpr": "1000 * L2_RQSTS.ALL_DEMAND_DATA_RD / INST_RETIRED.ANY", 278 "MetricGroup": "Mem;CacheMisses", 279 "MetricName": "L1MPKI_Load" 280 }, 281 { 282 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads", 283 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY", 284 "MetricGroup": "Mem;Backend;CacheMisses", 285 "MetricName": "L2MPKI" 286 }, 287 { 288 "BriefDescription": "L2 cache misses per kilo instruction for all request types (including speculative)", 289 "MetricExpr": "1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY", 290 "MetricGroup": "Mem;CacheMisses;Offcore", 291 "MetricName": "L2MPKI_All" 292 }, 293 { 294 "BriefDescription": "L2 cache misses per kilo instruction for all demand loads (including speculative)", 295 "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_MISS / INST_RETIRED.ANY", 296 "MetricGroup": "Mem;CacheMisses", 297 "MetricName": "L2MPKI_Load" 298 }, 299 { 300 "BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculative)", 301 "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_HIT / INST_RETIRED.ANY", 302 "MetricGroup": "Mem;CacheMisses", 303 "MetricName": "L2HPKI_Load" 304 }, 305 { 306 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads", 307 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY", 308 "MetricGroup": "Mem;CacheMisses", 309 "MetricName": "L3MPKI" 310 }, 311 { 312 "BriefDescription": "Fill Buffer (FB) true hits per kilo instructions for retired demand loads", 313 "MetricExpr": "1000 * MEM_LOAD_RETIRED.FB_HIT / INST_RETIRED.ANY", 314 "MetricGroup": "Mem;CacheMisses", 315 "MetricName": "FB_HPKI" 316 }, 317 { 318 "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses", 319 "MetricConstraint": "NO_NMI_WATCHDOG", 320 "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )", 321 "MetricGroup": "Mem;MemoryTLB", 322 "MetricName": "Page_Walks_Utilization" 323 }, 324 { 325 "BriefDescription": "Average CPU Utilization", 326 "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@", 327 "MetricGroup": "HPC;Summary", 328 "MetricName": "CPU_Utilization" 329 }, 330 { 331 "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]", 332 "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time", 333 "MetricGroup": "Summary;Power", 334 "MetricName": "Average_Frequency" 335 }, 336 { 337 "BriefDescription": "Giga Floating Point Operations Per Second", 338 "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time", 339 "MetricGroup": "Cor;Flops;HPC", 340 "MetricName": "GFLOPs" 341 }, 342 { 343 "BriefDescription": "Average Frequency Utilization relative nominal frequency", 344 "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC", 345 "MetricGroup": "Power", 346 "MetricName": "Turbo_Utilization" 347 }, 348 { 349 "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for baseline license level 0", 350 "MetricExpr": "CORE_POWER.LVL0_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED", 351 "MetricGroup": "Power", 352 "MetricName": "Power_License0_Utilization", 353 "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes." 354 }, 355 { 356 "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 1", 357 "MetricExpr": "CORE_POWER.LVL1_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED", 358 "MetricGroup": "Power", 359 "MetricName": "Power_License1_Utilization", 360 "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions." 361 }, 362 { 363 "BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 2 (introduced in SKX)", 364 "MetricExpr": "CORE_POWER.LVL2_TURBO_LICENSE / CPU_CLK_UNHALTED.DISTRIBUTED", 365 "MetricGroup": "Power", 366 "MetricName": "Power_License2_Utilization", 367 "PublicDescription": "Fraction of Core cycles where the core was running with power-delivery for license level 2 (introduced in SKX). This includes high current AVX 512-bit instructions." 368 }, 369 { 370 "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active", 371 "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_on else 0", 372 "MetricGroup": "SMT", 373 "MetricName": "SMT_2T_Utilization" 374 }, 375 { 376 "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode", 377 "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD", 378 "MetricGroup": "OS", 379 "MetricName": "Kernel_Utilization" 380 }, 381 { 382 "BriefDescription": "Cycles Per Instruction for the Operating System (OS) Kernel mode", 383 "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / INST_RETIRED.ANY_P:k", 384 "MetricGroup": "OS", 385 "MetricName": "Kernel_CPI" 386 }, 387 { 388 "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]", 389 "MetricExpr": "64 * ( arb@event\\=0x81\\,umask\\=0x1@ + arb@event\\=0x84\\,umask\\=0x1@ ) / 1000000 / duration_time / 1000", 390 "MetricGroup": "HPC;Mem;MemoryBW;SoC", 391 "MetricName": "DRAM_BW_Use" 392 }, 393 { 394 "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]", 395 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u", 396 "MetricGroup": "Branches;OS", 397 "MetricName": "IpFarBranch" 398 }, 399 { 400 "BriefDescription": "C6 residency percent per core", 401 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100", 402 "MetricGroup": "Power", 403 "MetricName": "C6_Core_Residency" 404 }, 405 { 406 "BriefDescription": "C7 residency percent per core", 407 "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100", 408 "MetricGroup": "Power", 409 "MetricName": "C7_Core_Residency" 410 }, 411 { 412 "BriefDescription": "C2 residency percent per package", 413 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100", 414 "MetricGroup": "Power", 415 "MetricName": "C2_Pkg_Residency" 416 }, 417 { 418 "BriefDescription": "C3 residency percent per package", 419 "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100", 420 "MetricGroup": "Power", 421 "MetricName": "C3_Pkg_Residency" 422 }, 423 { 424 "BriefDescription": "C6 residency percent per package", 425 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100", 426 "MetricGroup": "Power", 427 "MetricName": "C6_Pkg_Residency" 428 }, 429 { 430 "BriefDescription": "C7 residency percent per package", 431 "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100", 432 "MetricGroup": "Power", 433 "MetricName": "C7_Pkg_Residency" 434 }, 435 { 436 "BriefDescription": "C8 residency percent per package", 437 "MetricExpr": "(cstate_pkg@c8\\-residency@ / msr@tsc@) * 100", 438 "MetricGroup": "Power", 439 "MetricName": "C8_Pkg_Residency" 440 }, 441 { 442 "BriefDescription": "C9 residency percent per package", 443 "MetricExpr": "(cstate_pkg@c9\\-residency@ / msr@tsc@) * 100", 444 "MetricGroup": "Power", 445 "MetricName": "C9_Pkg_Residency" 446 }, 447 { 448 "BriefDescription": "C10 residency percent per package", 449 "MetricExpr": "(cstate_pkg@c10\\-residency@ / msr@tsc@) * 100", 450 "MetricGroup": "Power", 451 "MetricName": "C10_Pkg_Residency" 452 } 453] 454