1[ 2 { 3 "CollectPEBSRecord": "2", 4 "PublicDescription": "Counts all microcode Floating Point assists.", 5 "EventCode": "0xC1", 6 "Counter": "0,1,2,3,4,5,6,7", 7 "UMask": "0x2", 8 "PEBScounters": "0,1,2,3,4,5,6,7", 9 "EventName": "ASSISTS.FP", 10 "SampleAfterValue": "100003", 11 "BriefDescription": "Counts all microcode FP assists.", 12 "CounterMask": "1" 13 }, 14 { 15 "CollectPEBSRecord": "2", 16 "PublicDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 17 "EventCode": "0xc7", 18 "Counter": "0,1,2,3,4,5,6,7", 19 "UMask": "0x1", 20 "PEBScounters": "0,1,2,3,4,5,6,7", 21 "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE", 22 "SampleAfterValue": "2000003", 23 "BriefDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 24 }, 25 { 26 "CollectPEBSRecord": "2", 27 "PublicDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 28 "EventCode": "0xc7", 29 "Counter": "0,1,2,3,4,5,6,7", 30 "UMask": "0x2", 31 "PEBScounters": "0,1,2,3,4,5,6,7", 32 "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE", 33 "SampleAfterValue": "2000003", 34 "BriefDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 35 }, 36 { 37 "CollectPEBSRecord": "2", 38 "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 39 "EventCode": "0xc7", 40 "Counter": "0,1,2,3,4,5,6,7", 41 "UMask": "0x4", 42 "PEBScounters": "0,1,2,3,4,5,6,7", 43 "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE", 44 "SampleAfterValue": "2000003", 45 "BriefDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 46 }, 47 { 48 "CollectPEBSRecord": "2", 49 "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 50 "EventCode": "0xc7", 51 "Counter": "0,1,2,3,4,5,6,7", 52 "UMask": "0x8", 53 "PEBScounters": "0,1,2,3,4,5,6,7", 54 "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE", 55 "SampleAfterValue": "2000003", 56 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 57 }, 58 { 59 "CollectPEBSRecord": "2", 60 "PublicDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 61 "EventCode": "0xc7", 62 "Counter": "0,1,2,3,4,5,6,7", 63 "UMask": "0x10", 64 "PEBScounters": "0,1,2,3,4,5,6,7", 65 "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE", 66 "SampleAfterValue": "2000003", 67 "BriefDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 68 }, 69 { 70 "CollectPEBSRecord": "2", 71 "PublicDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 72 "EventCode": "0xc7", 73 "Counter": "0,1,2,3,4,5,6,7", 74 "UMask": "0x20", 75 "PEBScounters": "0,1,2,3,4,5,6,7", 76 "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE", 77 "SampleAfterValue": "2000003", 78 "BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 79 }, 80 { 81 "CollectPEBSRecord": "2", 82 "PublicDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 83 "EventCode": "0xc7", 84 "Counter": "0,1,2,3,4,5,6,7", 85 "UMask": "0x40", 86 "PEBScounters": "0,1,2,3,4,5,6,7", 87 "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE", 88 "SampleAfterValue": "2000003", 89 "BriefDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 90 }, 91 { 92 "CollectPEBSRecord": "2", 93 "PublicDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 94 "EventCode": "0xc7", 95 "Counter": "0,1,2,3,4,5,6,7", 96 "UMask": "0x80", 97 "PEBScounters": "0,1,2,3,4,5,6,7", 98 "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE", 99 "SampleAfterValue": "2000003", 100 "BriefDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 101 } 102]