1[ 2 { 3 "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 4 "CollectPEBSRecord": "2", 5 "Counter": "0,1,2,3,4,5,6,7", 6 "EventCode": "0xc7", 7 "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE", 8 "PEBScounters": "0,1,2,3,4,5,6,7", 9 "SampleAfterValue": "100003", 10 "UMask": "0x40" 11 }, 12 { 13 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 14 "CollectPEBSRecord": "2", 15 "Counter": "0,1,2,3,4,5,6,7", 16 "EventCode": "0xc7", 17 "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE", 18 "PEBScounters": "0,1,2,3,4,5,6,7", 19 "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 20 "SampleAfterValue": "100003", 21 "UMask": "0x8" 22 }, 23 { 24 "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 25 "CollectPEBSRecord": "2", 26 "Counter": "0,1,2,3,4,5,6,7", 27 "EventCode": "0xc7", 28 "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE", 29 "PEBScounters": "0,1,2,3,4,5,6,7", 30 "SampleAfterValue": "100003", 31 "UMask": "0x80" 32 }, 33 { 34 "BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 35 "CollectPEBSRecord": "2", 36 "Counter": "0,1,2,3,4,5,6,7", 37 "EventCode": "0xc7", 38 "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE", 39 "PEBScounters": "0,1,2,3,4,5,6,7", 40 "SampleAfterValue": "100003", 41 "UMask": "0x1" 42 }, 43 { 44 "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 45 "CollectPEBSRecord": "2", 46 "Counter": "0,1,2,3,4,5,6,7", 47 "EventCode": "0xc7", 48 "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE", 49 "PEBScounters": "0,1,2,3,4,5,6,7", 50 "SampleAfterValue": "100003", 51 "UMask": "0x4" 52 }, 53 { 54 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 55 "CollectPEBSRecord": "2", 56 "Counter": "0,1,2,3,4,5,6,7", 57 "EventCode": "0xc7", 58 "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE", 59 "PEBScounters": "0,1,2,3,4,5,6,7", 60 "SampleAfterValue": "100003", 61 "UMask": "0x20" 62 }, 63 { 64 "BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 65 "CollectPEBSRecord": "2", 66 "Counter": "0,1,2,3,4,5,6,7", 67 "EventCode": "0xc7", 68 "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE", 69 "PEBScounters": "0,1,2,3,4,5,6,7", 70 "SampleAfterValue": "100003", 71 "UMask": "0x2" 72 }, 73 { 74 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 75 "CollectPEBSRecord": "2", 76 "Counter": "0,1,2,3,4,5,6,7", 77 "EventCode": "0xc7", 78 "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE", 79 "PEBScounters": "0,1,2,3,4,5,6,7", 80 "SampleAfterValue": "100003", 81 "UMask": "0x10" 82 }, 83 { 84 "BriefDescription": "Counts all microcode FP assists.", 85 "CollectPEBSRecord": "2", 86 "Counter": "0,1,2,3,4,5,6,7", 87 "EventCode": "0xc1", 88 "EventName": "ASSISTS.FP", 89 "PEBScounters": "0,1,2,3,4,5,6,7", 90 "PublicDescription": "Counts all microcode Floating Point assists.", 91 "SampleAfterValue": "100003", 92 "Speculative": "1", 93 "UMask": "0x2" 94 } 95]