1[ 2 { 3 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 4 "Counter": "0,1,2,3", 5 "CounterHTOff": "0,1,2,3", 6 "EventCode": "0xB7, 0xBB", 7 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8 "MSRIndex": "0x1a6,0x1a7", 9 "MSRValue": "0x06040007F7", 10 "Offcore": "1", 11 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 12 "SampleAfterValue": "100003", 13 "UMask": "0x1" 14 }, 15 { 16 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 17 "Counter": "0,1,2,3", 18 "CounterHTOff": "0,1,2,3", 19 "EventCode": "0xB7, 0xBB", 20 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 21 "MSRIndex": "0x1a6,0x1a7", 22 "MSRValue": "0x063B800491", 23 "Offcore": "1", 24 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 25 "SampleAfterValue": "100003", 26 "UMask": "0x1" 27 }, 28 { 29 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 30 "Counter": "0,1,2,3", 31 "CounterHTOff": "0,1,2,3", 32 "EventCode": "0xB7, 0xBB", 33 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 34 "MSRIndex": "0x1a6,0x1a7", 35 "MSRValue": "0x0104000100", 36 "Offcore": "1", 37 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 38 "SampleAfterValue": "100003", 39 "UMask": "0x1" 40 }, 41 { 42 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 43 "Counter": "0,1,2,3", 44 "CounterHTOff": "0,1,2,3", 45 "Deprecated": "1", 46 "EventCode": "0xB7, 0xBB", 47 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 48 "MSRIndex": "0x1a6,0x1a7", 49 "MSRValue": "0x023C000490", 50 "Offcore": "1", 51 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 52 "SampleAfterValue": "100003", 53 "UMask": "0x1" 54 }, 55 { 56 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 57 "Counter": "0,1,2,3", 58 "CounterHTOff": "0,1,2,3", 59 "Deprecated": "1", 60 "EventCode": "0xB7, 0xBB", 61 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 62 "MSRIndex": "0x1a6,0x1a7", 63 "MSRValue": "0x0210000020", 64 "Offcore": "1", 65 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 66 "SampleAfterValue": "100003", 67 "UMask": "0x1" 68 }, 69 { 70 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 71 "Counter": "0,1,2,3", 72 "CounterHTOff": "0,1,2,3", 73 "Deprecated": "1", 74 "EventCode": "0xB7, 0xBB", 75 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 76 "MSRIndex": "0x1a6,0x1a7", 77 "MSRValue": "0x013C000100", 78 "Offcore": "1", 79 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 80 "SampleAfterValue": "100003", 81 "UMask": "0x1" 82 }, 83 { 84 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 85 "Counter": "0,1,2,3", 86 "CounterHTOff": "0,1,2,3", 87 "EventCode": "0xB7, 0xBB", 88 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 89 "MSRIndex": "0x1a6,0x1a7", 90 "MSRValue": "0x3F90000400", 91 "Offcore": "1", 92 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 93 "SampleAfterValue": "100003", 94 "UMask": "0x1" 95 }, 96 { 97 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 98 "Counter": "0,1,2,3", 99 "CounterHTOff": "0,1,2,3", 100 "Deprecated": "1", 101 "EventCode": "0xB7, 0xBB", 102 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 103 "MSRIndex": "0x1a6,0x1a7", 104 "MSRValue": "0x0404000490", 105 "Offcore": "1", 106 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 107 "SampleAfterValue": "100003", 108 "UMask": "0x1" 109 }, 110 { 111 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 112 "Counter": "0,1,2,3", 113 "CounterHTOff": "0,1,2,3", 114 "Deprecated": "1", 115 "EventCode": "0xB7, 0xBB", 116 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 117 "MSRIndex": "0x1a6,0x1a7", 118 "MSRValue": "0x0604000010", 119 "Offcore": "1", 120 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 121 "SampleAfterValue": "100003", 122 "UMask": "0x1" 123 }, 124 { 125 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 126 "Counter": "0,1,2,3", 127 "CounterHTOff": "0,1,2,3", 128 "Deprecated": "1", 129 "EventCode": "0xB7, 0xBB", 130 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 131 "MSRIndex": "0x1a6,0x1a7", 132 "MSRValue": "0x103FC00490", 133 "Offcore": "1", 134 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 135 "SampleAfterValue": "100003", 136 "UMask": "0x1" 137 }, 138 { 139 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 140 "Counter": "0,1,2,3", 141 "CounterHTOff": "0,1,2,3", 142 "Deprecated": "1", 143 "EventCode": "0xB7, 0xBB", 144 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 145 "MSRIndex": "0x1a6,0x1a7", 146 "MSRValue": "0x0090000120", 147 "Offcore": "1", 148 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 149 "SampleAfterValue": "100003", 150 "UMask": "0x1" 151 }, 152 { 153 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 154 "Counter": "0,1,2,3", 155 "CounterHTOff": "0,1,2,3", 156 "EventCode": "0xB7, 0xBB", 157 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 158 "MSRIndex": "0x1a6,0x1a7", 159 "MSRValue": "0x0084000100", 160 "Offcore": "1", 161 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 162 "SampleAfterValue": "100003", 163 "UMask": "0x1" 164 }, 165 { 166 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 167 "Counter": "0,1,2,3", 168 "CounterHTOff": "0,1,2,3", 169 "Deprecated": "1", 170 "EventCode": "0xB7, 0xBB", 171 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 172 "MSRIndex": "0x1a6,0x1a7", 173 "MSRValue": "0x103C000100", 174 "Offcore": "1", 175 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 176 "SampleAfterValue": "100003", 177 "UMask": "0x1" 178 }, 179 { 180 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 181 "Counter": "0,1,2,3", 182 "CounterHTOff": "0,1,2,3", 183 "EventCode": "0xB7, 0xBB", 184 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 185 "MSRIndex": "0x1a6,0x1a7", 186 "MSRValue": "0x3F90000100", 187 "Offcore": "1", 188 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 189 "SampleAfterValue": "100003", 190 "UMask": "0x1" 191 }, 192 { 193 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 194 "Counter": "0,1,2,3", 195 "CounterHTOff": "0,1,2,3", 196 "Deprecated": "1", 197 "EventCode": "0xB7, 0xBB", 198 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 199 "MSRIndex": "0x1a6,0x1a7", 200 "MSRValue": "0x0804008000", 201 "Offcore": "1", 202 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 203 "SampleAfterValue": "100003", 204 "UMask": "0x1" 205 }, 206 { 207 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 208 "Counter": "0,1,2,3", 209 "CounterHTOff": "0,1,2,3", 210 "Deprecated": "1", 211 "EventCode": "0xB7, 0xBB", 212 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 213 "MSRIndex": "0x1a6,0x1a7", 214 "MSRValue": "0x06040007F7", 215 "Offcore": "1", 216 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 217 "SampleAfterValue": "100003", 218 "UMask": "0x1" 219 }, 220 { 221 "BriefDescription": "ALL_DATA_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 222 "Counter": "0,1,2,3", 223 "CounterHTOff": "0,1,2,3", 224 "EventCode": "0xB7, 0xBB", 225 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 226 "MSRIndex": "0x1a6,0x1a7", 227 "MSRValue": "0x043C000491", 228 "Offcore": "1", 229 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 230 "SampleAfterValue": "100003", 231 "UMask": "0x1" 232 }, 233 { 234 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 235 "Counter": "0,1,2,3", 236 "CounterHTOff": "0,1,2,3", 237 "Deprecated": "1", 238 "EventCode": "0xB7, 0xBB", 239 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 240 "MSRIndex": "0x1a6,0x1a7", 241 "MSRValue": "0x043C000010", 242 "Offcore": "1", 243 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 244 "SampleAfterValue": "100003", 245 "UMask": "0x1" 246 }, 247 { 248 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 249 "Counter": "0,1,2,3", 250 "CounterHTOff": "0,1,2,3", 251 "EventCode": "0xB7, 0xBB", 252 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 253 "MSRIndex": "0x1a6,0x1a7", 254 "MSRValue": "0x0404000080", 255 "Offcore": "1", 256 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 257 "SampleAfterValue": "100003", 258 "UMask": "0x1" 259 }, 260 { 261 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 262 "Counter": "0,1,2,3", 263 "CounterHTOff": "0,1,2,3", 264 "Deprecated": "1", 265 "EventCode": "0xB7, 0xBB", 266 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 267 "MSRIndex": "0x1a6,0x1a7", 268 "MSRValue": "0x0804000010", 269 "Offcore": "1", 270 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 271 "SampleAfterValue": "100003", 272 "UMask": "0x1" 273 }, 274 { 275 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 276 "Counter": "0,1,2,3", 277 "CounterHTOff": "0,1,2,3", 278 "Deprecated": "1", 279 "EventCode": "0xB7, 0xBB", 280 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 281 "MSRIndex": "0x1a6,0x1a7", 282 "MSRValue": "0x01040007F7", 283 "Offcore": "1", 284 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 285 "SampleAfterValue": "100003", 286 "UMask": "0x1" 287 }, 288 { 289 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 290 "Counter": "0,1,2,3", 291 "CounterHTOff": "0,1,2,3", 292 "EventCode": "0xB7, 0xBB", 293 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 294 "MSRIndex": "0x1a6,0x1a7", 295 "MSRValue": "0x0104000400", 296 "Offcore": "1", 297 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 298 "SampleAfterValue": "100003", 299 "UMask": "0x1" 300 }, 301 { 302 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 303 "Counter": "0,1,2,3", 304 "CounterHTOff": "0,1,2,3", 305 "Deprecated": "1", 306 "EventCode": "0xB7, 0xBB", 307 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 308 "MSRIndex": "0x1a6,0x1a7", 309 "MSRValue": "0x103C000004", 310 "Offcore": "1", 311 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 312 "SampleAfterValue": "100003", 313 "UMask": "0x1" 314 }, 315 { 316 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 317 "Counter": "0,1,2,3", 318 "CounterHTOff": "0,1,2,3", 319 "EventCode": "0xB7, 0xBB", 320 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 321 "MSRIndex": "0x1a6,0x1a7", 322 "MSRValue": "0x0110000010", 323 "Offcore": "1", 324 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 325 "SampleAfterValue": "100003", 326 "UMask": "0x1" 327 }, 328 { 329 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 330 "Counter": "0,1,2,3", 331 "CounterHTOff": "0,1,2,3", 332 "Deprecated": "1", 333 "EventCode": "0xB7, 0xBB", 334 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 335 "MSRIndex": "0x1a6,0x1a7", 336 "MSRValue": "0x3F84000491", 337 "Offcore": "1", 338 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 339 "SampleAfterValue": "100003", 340 "UMask": "0x1" 341 }, 342 { 343 "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)", 344 "Counter": "0,1,2,3", 345 "CounterHTOff": "0,1,2,3,4,5,6,7", 346 "EventCode": "0xC9", 347 "EventName": "RTM_RETIRED.ABORTED_MEM", 348 "PublicDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).", 349 "SampleAfterValue": "2000003", 350 "UMask": "0x8" 351 }, 352 { 353 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 354 "Counter": "0,1,2,3", 355 "CounterHTOff": "0,1,2,3", 356 "EventCode": "0xB7, 0xBB", 357 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 358 "MSRIndex": "0x1a6,0x1a7", 359 "MSRValue": "0x3F84000010", 360 "Offcore": "1", 361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 362 "SampleAfterValue": "100003", 363 "UMask": "0x1" 364 }, 365 { 366 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 367 "Counter": "0,1,2,3", 368 "CounterHTOff": "0,1,2,3", 369 "Deprecated": "1", 370 "EventCode": "0xB7, 0xBB", 371 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 372 "MSRIndex": "0x1a6,0x1a7", 373 "MSRValue": "0x10040007F7", 374 "Offcore": "1", 375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 376 "SampleAfterValue": "100003", 377 "UMask": "0x1" 378 }, 379 { 380 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 381 "Counter": "0,1,2,3", 382 "CounterHTOff": "0,1,2,3", 383 "Deprecated": "1", 384 "EventCode": "0xB7, 0xBB", 385 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 386 "MSRIndex": "0x1a6,0x1a7", 387 "MSRValue": "0x013C000002", 388 "Offcore": "1", 389 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 390 "SampleAfterValue": "100003", 391 "UMask": "0x1" 392 }, 393 { 394 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 395 "Counter": "0,1,2,3", 396 "CounterHTOff": "0,1,2,3", 397 "Deprecated": "1", 398 "EventCode": "0xB7, 0xBB", 399 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 400 "MSRIndex": "0x1a6,0x1a7", 401 "MSRValue": "0x0090000004", 402 "Offcore": "1", 403 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 404 "SampleAfterValue": "100003", 405 "UMask": "0x1" 406 }, 407 { 408 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & ANY_SNOOP", 409 "Counter": "0,1,2,3", 410 "CounterHTOff": "0,1,2,3", 411 "EventCode": "0xB7, 0xBB", 412 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 413 "MSRIndex": "0x1a6,0x1a7", 414 "MSRValue": "0x3FBC000400", 415 "Offcore": "1", 416 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 417 "SampleAfterValue": "100003", 418 "UMask": "0x1" 419 }, 420 { 421 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 422 "Counter": "0,1,2,3", 423 "CounterHTOff": "0,1,2,3", 424 "Deprecated": "1", 425 "EventCode": "0xB7, 0xBB", 426 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 427 "MSRIndex": "0x1a6,0x1a7", 428 "MSRValue": "0x00BC000120", 429 "Offcore": "1", 430 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 431 "SampleAfterValue": "100003", 432 "UMask": "0x1" 433 }, 434 { 435 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 436 "Counter": "0,1,2,3", 437 "CounterHTOff": "0,1,2,3", 438 "EventCode": "0xB7, 0xBB", 439 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 440 "MSRIndex": "0x1a6,0x1a7", 441 "MSRValue": "0x08100007F7", 442 "Offcore": "1", 443 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 444 "SampleAfterValue": "100003", 445 "UMask": "0x1" 446 }, 447 { 448 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 449 "Counter": "0,1,2,3", 450 "CounterHTOff": "0,1,2,3", 451 "Deprecated": "1", 452 "EventCode": "0xB7, 0xBB", 453 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 454 "MSRIndex": "0x1a6,0x1a7", 455 "MSRValue": "0x3F84000100", 456 "Offcore": "1", 457 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 458 "SampleAfterValue": "100003", 459 "UMask": "0x1" 460 }, 461 { 462 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 463 "Counter": "0,1,2,3", 464 "CounterHTOff": "0,1,2,3", 465 "Deprecated": "1", 466 "EventCode": "0xB7, 0xBB", 467 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 468 "MSRIndex": "0x1a6,0x1a7", 469 "MSRValue": "0x3FBC000120", 470 "Offcore": "1", 471 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 472 "SampleAfterValue": "100003", 473 "UMask": "0x1" 474 }, 475 { 476 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 477 "Counter": "0,1,2,3", 478 "CounterHTOff": "0,1,2,3", 479 "EventCode": "0xB7, 0xBB", 480 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 481 "MSRIndex": "0x1a6,0x1a7", 482 "MSRValue": "0x0104000020", 483 "Offcore": "1", 484 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 485 "SampleAfterValue": "100003", 486 "UMask": "0x1" 487 }, 488 { 489 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 490 "Counter": "0,1,2,3", 491 "CounterHTOff": "0,1,2,3", 492 "Deprecated": "1", 493 "EventCode": "0xB7, 0xBB", 494 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 495 "MSRIndex": "0x1a6,0x1a7", 496 "MSRValue": "0x0404000020", 497 "Offcore": "1", 498 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 499 "SampleAfterValue": "100003", 500 "UMask": "0x1" 501 }, 502 { 503 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 504 "Counter": "0,1,2,3", 505 "CounterHTOff": "0,1,2,3", 506 "EventCode": "0xB7, 0xBB", 507 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 508 "MSRIndex": "0x1a6,0x1a7", 509 "MSRValue": "0x0204000400", 510 "Offcore": "1", 511 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 512 "SampleAfterValue": "100003", 513 "UMask": "0x1" 514 }, 515 { 516 "BriefDescription": "ALL_PF_RFO & L3_MISS & ANY_SNOOP", 517 "Counter": "0,1,2,3", 518 "CounterHTOff": "0,1,2,3", 519 "EventCode": "0xB7, 0xBB", 520 "EventName": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP", 521 "MSRIndex": "0x1a6,0x1a7", 522 "MSRValue": "0x3FBC000120", 523 "Offcore": "1", 524 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 525 "SampleAfterValue": "100003", 526 "UMask": "0x1" 527 }, 528 { 529 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 530 "Counter": "0,1,2,3", 531 "CounterHTOff": "0,1,2,3", 532 "Deprecated": "1", 533 "EventCode": "0xB7, 0xBB", 534 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 535 "MSRIndex": "0x1a6,0x1a7", 536 "MSRValue": "0x0404000002", 537 "Offcore": "1", 538 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 539 "SampleAfterValue": "100003", 540 "UMask": "0x1" 541 }, 542 { 543 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & HIT_OTHER_CORE_FWD", 544 "Counter": "0,1,2,3", 545 "CounterHTOff": "0,1,2,3", 546 "EventCode": "0xB7, 0xBB", 547 "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 548 "MSRIndex": "0x1a6,0x1a7", 549 "MSRValue": "0x083C000020", 550 "Offcore": "1", 551 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 552 "SampleAfterValue": "100003", 553 "UMask": "0x1" 554 }, 555 { 556 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 557 "Counter": "0,1,2,3", 558 "CounterHTOff": "0,1,2,3", 559 "Deprecated": "1", 560 "EventCode": "0xB7, 0xBB", 561 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 562 "MSRIndex": "0x1a6,0x1a7", 563 "MSRValue": "0x0410008000", 564 "Offcore": "1", 565 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 566 "SampleAfterValue": "100003", 567 "UMask": "0x1" 568 }, 569 { 570 "BriefDescription": "Counts all demand data writes (RFOs)", 571 "Counter": "0,1,2,3", 572 "CounterHTOff": "0,1,2,3", 573 "EventCode": "0xB7, 0xBB", 574 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 575 "MSRIndex": "0x1a6,0x1a7", 576 "MSRValue": "0x0210000002", 577 "Offcore": "1", 578 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 579 "SampleAfterValue": "100003", 580 "UMask": "0x1" 581 }, 582 { 583 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 584 "Counter": "0,1,2,3", 585 "CounterHTOff": "0,1,2,3", 586 "Deprecated": "1", 587 "EventCode": "0xB7, 0xBB", 588 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 589 "MSRIndex": "0x1a6,0x1a7", 590 "MSRValue": "0x063B800002", 591 "Offcore": "1", 592 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 593 "SampleAfterValue": "100003", 594 "UMask": "0x1" 595 }, 596 { 597 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 598 "Counter": "0,1,2,3", 599 "CounterHTOff": "0,1,2,3", 600 "Deprecated": "1", 601 "EventCode": "0xB7, 0xBB", 602 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 603 "MSRIndex": "0x1a6,0x1a7", 604 "MSRValue": "0x3F840007F7", 605 "Offcore": "1", 606 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 607 "SampleAfterValue": "100003", 608 "UMask": "0x1" 609 }, 610 { 611 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 612 "Counter": "0,1,2,3", 613 "CounterHTOff": "0,1,2,3", 614 "Deprecated": "1", 615 "EventCode": "0xB7, 0xBB", 616 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 617 "MSRIndex": "0x1a6,0x1a7", 618 "MSRValue": "0x0210000491", 619 "Offcore": "1", 620 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 621 "SampleAfterValue": "100003", 622 "UMask": "0x1" 623 }, 624 { 625 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 626 "Counter": "0,1,2,3", 627 "CounterHTOff": "0,1,2,3", 628 "Deprecated": "1", 629 "EventCode": "0xB7, 0xBB", 630 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 631 "MSRIndex": "0x1a6,0x1a7", 632 "MSRValue": "0x0210000400", 633 "Offcore": "1", 634 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 635 "SampleAfterValue": "100003", 636 "UMask": "0x1" 637 }, 638 { 639 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 640 "Counter": "0,1,2,3", 641 "CounterHTOff": "0,1,2,3", 642 "Deprecated": "1", 643 "EventCode": "0xB7, 0xBB", 644 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 645 "MSRIndex": "0x1a6,0x1a7", 646 "MSRValue": "0x023C000004", 647 "Offcore": "1", 648 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 649 "SampleAfterValue": "100003", 650 "UMask": "0x1" 651 }, 652 { 653 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 654 "Counter": "0,1,2,3", 655 "CounterHTOff": "0,1,2,3", 656 "Deprecated": "1", 657 "EventCode": "0xB7, 0xBB", 658 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 659 "MSRIndex": "0x1a6,0x1a7", 660 "MSRValue": "0x0104000100", 661 "Offcore": "1", 662 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 663 "SampleAfterValue": "100003", 664 "UMask": "0x1" 665 }, 666 { 667 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 668 "Counter": "0,1,2,3", 669 "CounterHTOff": "0,1,2,3", 670 "Deprecated": "1", 671 "EventCode": "0xB7, 0xBB", 672 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 673 "MSRIndex": "0x1a6,0x1a7", 674 "MSRValue": "0x1004000490", 675 "Offcore": "1", 676 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 677 "SampleAfterValue": "100003", 678 "UMask": "0x1" 679 }, 680 { 681 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 682 "Counter": "0,1,2,3", 683 "CounterHTOff": "0,1,2,3", 684 "EventCode": "0xB7, 0xBB", 685 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 686 "MSRIndex": "0x1a6,0x1a7", 687 "MSRValue": "0x1010000004", 688 "Offcore": "1", 689 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 690 "SampleAfterValue": "100003", 691 "UMask": "0x1" 692 }, 693 { 694 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 695 "Counter": "0,1,2,3", 696 "CounterHTOff": "0,1,2,3", 697 "Deprecated": "1", 698 "EventCode": "0xB7, 0xBB", 699 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 700 "MSRIndex": "0x1a6,0x1a7", 701 "MSRValue": "0x023C000010", 702 "Offcore": "1", 703 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 704 "SampleAfterValue": "100003", 705 "UMask": "0x1" 706 }, 707 { 708 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 709 "Counter": "0,1,2,3", 710 "CounterHTOff": "0,1,2,3", 711 "EventCode": "0xB7, 0xBB", 712 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 713 "MSRIndex": "0x1a6,0x1a7", 714 "MSRValue": "0x3F84000100", 715 "Offcore": "1", 716 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 717 "SampleAfterValue": "100003", 718 "UMask": "0x1" 719 }, 720 { 721 "BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer", 722 "Counter": "0,1,2,3", 723 "CounterHTOff": "0,1,2,3,4,5,6,7", 724 "EventCode": "0x54", 725 "EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", 726 "PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.", 727 "SampleAfterValue": "2000003", 728 "UMask": "0x4" 729 }, 730 { 731 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 732 "Counter": "0,1,2,3", 733 "CounterHTOff": "0,1,2,3", 734 "Deprecated": "1", 735 "EventCode": "0xB7, 0xBB", 736 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 737 "MSRIndex": "0x1a6,0x1a7", 738 "MSRValue": "0x0604000004", 739 "Offcore": "1", 740 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 741 "SampleAfterValue": "100003", 742 "UMask": "0x1" 743 }, 744 { 745 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 746 "Counter": "0,1,2,3", 747 "CounterHTOff": "0,1,2,3", 748 "Deprecated": "1", 749 "EventCode": "0xB7, 0xBB", 750 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_MISS", 751 "MSRIndex": "0x1a6,0x1a7", 752 "MSRValue": "0x023C000020", 753 "Offcore": "1", 754 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 755 "SampleAfterValue": "100003", 756 "UMask": "0x1" 757 }, 758 { 759 "BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address", 760 "Counter": "0,1,2,3", 761 "CounterHTOff": "0,1,2,3,4,5,6,7", 762 "EventCode": "0x54", 763 "EventName": "TX_MEM.ABORT_CONFLICT", 764 "PublicDescription": "Number of times a TSX line had a cache conflict.", 765 "SampleAfterValue": "2000003", 766 "UMask": "0x1" 767 }, 768 { 769 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 770 "Counter": "0,1,2,3", 771 "CounterHTOff": "0,1,2,3", 772 "EventCode": "0xB7, 0xBB", 773 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 774 "MSRIndex": "0x1a6,0x1a7", 775 "MSRValue": "0x0210000400", 776 "Offcore": "1", 777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 778 "SampleAfterValue": "100003", 779 "UMask": "0x1" 780 }, 781 { 782 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 783 "Counter": "0,1,2,3", 784 "CounterHTOff": "0,1,2,3", 785 "EventCode": "0xB7, 0xBB", 786 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 787 "MSRIndex": "0x1a6,0x1a7", 788 "MSRValue": "0x0804000120", 789 "Offcore": "1", 790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 791 "SampleAfterValue": "100003", 792 "UMask": "0x1" 793 }, 794 { 795 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 796 "Counter": "0,1,2,3", 797 "CounterHTOff": "0,1,2,3", 798 "EventCode": "0xB7, 0xBB", 799 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 800 "MSRIndex": "0x1a6,0x1a7", 801 "MSRValue": "0x0410000002", 802 "Offcore": "1", 803 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 804 "SampleAfterValue": "100003", 805 "UMask": "0x1" 806 }, 807 { 808 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 809 "Counter": "0,1,2,3", 810 "CounterHTOff": "0,1,2,3", 811 "Deprecated": "1", 812 "EventCode": "0xB7, 0xBB", 813 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 814 "MSRIndex": "0x1a6,0x1a7", 815 "MSRValue": "0x0104000004", 816 "Offcore": "1", 817 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 818 "SampleAfterValue": "100003", 819 "UMask": "0x1" 820 }, 821 { 822 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 823 "Counter": "0,1,2,3", 824 "CounterHTOff": "0,1,2,3", 825 "Deprecated": "1", 826 "EventCode": "0xB7, 0xBB", 827 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 828 "MSRIndex": "0x1a6,0x1a7", 829 "MSRValue": "0x063B800100", 830 "Offcore": "1", 831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 832 "SampleAfterValue": "100003", 833 "UMask": "0x1" 834 }, 835 { 836 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 837 "Counter": "0,1,2,3", 838 "CounterHTOff": "0,1,2,3", 839 "Deprecated": "1", 840 "EventCode": "0xB7, 0xBB", 841 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 842 "MSRIndex": "0x1a6,0x1a7", 843 "MSRValue": "0x0804000120", 844 "Offcore": "1", 845 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 846 "SampleAfterValue": "100003", 847 "UMask": "0x1" 848 }, 849 { 850 "BriefDescription": "ALL_RFO & L3_MISS & HIT_OTHER_CORE_FWD", 851 "Counter": "0,1,2,3", 852 "CounterHTOff": "0,1,2,3", 853 "EventCode": "0xB7, 0xBB", 854 "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 855 "MSRIndex": "0x1a6,0x1a7", 856 "MSRValue": "0x083C000122", 857 "Offcore": "1", 858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 859 "SampleAfterValue": "100003", 860 "UMask": "0x1" 861 }, 862 { 863 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 864 "Counter": "0,1,2,3", 865 "CounterHTOff": "0,1,2,3", 866 "Deprecated": "1", 867 "EventCode": "0xB7, 0xBB", 868 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 869 "MSRIndex": "0x1a6,0x1a7", 870 "MSRValue": "0x0810000122", 871 "Offcore": "1", 872 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 873 "SampleAfterValue": "100003", 874 "UMask": "0x1" 875 }, 876 { 877 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 878 "Counter": "0,1,2,3", 879 "CounterHTOff": "0,1,2,3", 880 "EventCode": "0xB7, 0xBB", 881 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 882 "MSRIndex": "0x1a6,0x1a7", 883 "MSRValue": "0x0104008000", 884 "Offcore": "1", 885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 886 "SampleAfterValue": "100003", 887 "UMask": "0x1" 888 }, 889 { 890 "BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region", 891 "Counter": "0,1,2,3", 892 "CounterHTOff": "0,1,2,3,4,5,6,7", 893 "EventCode": "0x5d", 894 "EventName": "TX_EXEC.MISC5", 895 "PublicDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.", 896 "SampleAfterValue": "2000003", 897 "UMask": "0x10" 898 }, 899 { 900 "BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.", 901 "Counter": "0,1,2,3", 902 "CounterHTOff": "0,1,2,3,4,5,6,7", 903 "EventCode": "0x5d", 904 "EventName": "TX_EXEC.MISC4", 905 "PublicDescription": "RTM region detected inside HLE.", 906 "SampleAfterValue": "2000003", 907 "UMask": "0x8" 908 }, 909 { 910 "BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded", 911 "Counter": "0,1,2,3", 912 "CounterHTOff": "0,1,2,3,4,5,6,7", 913 "EventCode": "0x5d", 914 "EventName": "TX_EXEC.MISC3", 915 "PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.", 916 "SampleAfterValue": "2000003", 917 "UMask": "0x4" 918 }, 919 { 920 "BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region", 921 "Counter": "0,1,2,3", 922 "CounterHTOff": "0,1,2,3,4,5,6,7", 923 "EventCode": "0x5d", 924 "EventName": "TX_EXEC.MISC2", 925 "PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.", 926 "SampleAfterValue": "2000003", 927 "UMask": "0x2" 928 }, 929 { 930 "BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.", 931 "Counter": "0,1,2,3", 932 "CounterHTOff": "0,1,2,3,4,5,6,7", 933 "EventCode": "0x5d", 934 "EventName": "TX_EXEC.MISC1", 935 "SampleAfterValue": "2000003", 936 "UMask": "0x1" 937 }, 938 { 939 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 940 "Counter": "0,1,2,3", 941 "CounterHTOff": "0,1,2,3", 942 "Deprecated": "1", 943 "EventCode": "0xB7, 0xBB", 944 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 945 "MSRIndex": "0x1a6,0x1a7", 946 "MSRValue": "0x0104000122", 947 "Offcore": "1", 948 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 949 "SampleAfterValue": "100003", 950 "UMask": "0x1" 951 }, 952 { 953 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 954 "Counter": "0,1,2,3", 955 "CounterHTOff": "0,1,2,3", 956 "EventCode": "0xB7, 0xBB", 957 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 958 "MSRIndex": "0x1a6,0x1a7", 959 "MSRValue": "0x1010000002", 960 "Offcore": "1", 961 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 962 "SampleAfterValue": "100003", 963 "UMask": "0x1" 964 }, 965 { 966 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 967 "Counter": "0,1,2,3", 968 "CounterHTOff": "0,1,2,3", 969 "Deprecated": "1", 970 "EventCode": "0xB7, 0xBB", 971 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 972 "MSRIndex": "0x1a6,0x1a7", 973 "MSRValue": "0x083FC00490", 974 "Offcore": "1", 975 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 976 "SampleAfterValue": "100003", 977 "UMask": "0x1" 978 }, 979 { 980 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 981 "Counter": "0,1,2,3", 982 "CounterHTOff": "0,1,2,3", 983 "EventCode": "0xB7, 0xBB", 984 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 985 "MSRIndex": "0x1a6,0x1a7", 986 "MSRValue": "0x063B800010", 987 "Offcore": "1", 988 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 989 "SampleAfterValue": "100003", 990 "UMask": "0x1" 991 }, 992 { 993 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 994 "Counter": "0,1,2,3", 995 "CounterHTOff": "0,1,2,3", 996 "Deprecated": "1", 997 "EventCode": "0xB7, 0xBB", 998 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 999 "MSRIndex": "0x1a6,0x1a7", 1000 "MSRValue": "0x0090000400", 1001 "Offcore": "1", 1002 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1003 "SampleAfterValue": "100003", 1004 "UMask": "0x1" 1005 }, 1006 { 1007 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1008 "Counter": "0,1,2,3", 1009 "CounterHTOff": "0,1,2,3", 1010 "Deprecated": "1", 1011 "EventCode": "0xB7, 0xBB", 1012 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1013 "MSRIndex": "0x1a6,0x1a7", 1014 "MSRValue": "0x043C000400", 1015 "Offcore": "1", 1016 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1017 "SampleAfterValue": "100003", 1018 "UMask": "0x1" 1019 }, 1020 { 1021 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1022 "Counter": "0,1,2,3", 1023 "CounterHTOff": "0,1,2,3", 1024 "Deprecated": "1", 1025 "EventCode": "0xB7, 0xBB", 1026 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1027 "MSRIndex": "0x1a6,0x1a7", 1028 "MSRValue": "0x0204000001", 1029 "Offcore": "1", 1030 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1031 "SampleAfterValue": "100003", 1032 "UMask": "0x1" 1033 }, 1034 { 1035 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 1036 "Counter": "0,1,2,3", 1037 "CounterHTOff": "0,1,2,3", 1038 "EventCode": "0xB7, 0xBB", 1039 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1040 "MSRIndex": "0x1a6,0x1a7", 1041 "MSRValue": "0x0084000010", 1042 "Offcore": "1", 1043 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1044 "SampleAfterValue": "100003", 1045 "UMask": "0x1" 1046 }, 1047 { 1048 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & REMOTE_HIT_FORWARD", 1049 "Counter": "0,1,2,3", 1050 "CounterHTOff": "0,1,2,3", 1051 "EventCode": "0xB7, 0xBB", 1052 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 1053 "MSRIndex": "0x1a6,0x1a7", 1054 "MSRValue": "0x083FC00490", 1055 "Offcore": "1", 1056 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1057 "SampleAfterValue": "100003", 1058 "UMask": "0x1" 1059 }, 1060 { 1061 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 1062 "Counter": "0,1,2,3", 1063 "CounterHTOff": "0,1,2,3", 1064 "EventCode": "0xB7, 0xBB", 1065 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1066 "MSRIndex": "0x1a6,0x1a7", 1067 "MSRValue": "0x063B800122", 1068 "Offcore": "1", 1069 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1070 "SampleAfterValue": "100003", 1071 "UMask": "0x1" 1072 }, 1073 { 1074 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 1075 "Counter": "0,1,2,3", 1076 "CounterHTOff": "0,1,2,3", 1077 "EventCode": "0xB7, 0xBB", 1078 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1079 "MSRIndex": "0x1a6,0x1a7", 1080 "MSRValue": "0x0404000400", 1081 "Offcore": "1", 1082 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1083 "SampleAfterValue": "100003", 1084 "UMask": "0x1" 1085 }, 1086 { 1087 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & HIT_OTHER_CORE_NO_FWD", 1088 "Counter": "0,1,2,3", 1089 "CounterHTOff": "0,1,2,3", 1090 "EventCode": "0xB7, 0xBB", 1091 "EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1092 "MSRIndex": "0x1a6,0x1a7", 1093 "MSRValue": "0x043C000020", 1094 "Offcore": "1", 1095 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1096 "SampleAfterValue": "100003", 1097 "UMask": "0x1" 1098 }, 1099 { 1100 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & SNOOP_MISS", 1101 "Counter": "0,1,2,3", 1102 "CounterHTOff": "0,1,2,3", 1103 "EventCode": "0xB7, 0xBB", 1104 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 1105 "MSRIndex": "0x1a6,0x1a7", 1106 "MSRValue": "0x023C000400", 1107 "Offcore": "1", 1108 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1109 "SampleAfterValue": "100003", 1110 "UMask": "0x1" 1111 }, 1112 { 1113 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1114 "Counter": "0,1,2,3", 1115 "CounterHTOff": "0,1,2,3", 1116 "Deprecated": "1", 1117 "EventCode": "0xB7, 0xBB", 1118 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1119 "MSRIndex": "0x1a6,0x1a7", 1120 "MSRValue": "0x063B8007F7", 1121 "Offcore": "1", 1122 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1123 "SampleAfterValue": "100003", 1124 "UMask": "0x1" 1125 }, 1126 { 1127 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 1128 "Counter": "0,1,2,3", 1129 "CounterHTOff": "0,1,2,3", 1130 "Deprecated": "1", 1131 "EventCode": "0xB7, 0xBB", 1132 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 1133 "MSRIndex": "0x1a6,0x1a7", 1134 "MSRValue": "0x013C000491", 1135 "Offcore": "1", 1136 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1137 "SampleAfterValue": "100003", 1138 "UMask": "0x1" 1139 }, 1140 { 1141 "BriefDescription": "Counts demand data reads", 1142 "Counter": "0,1,2,3", 1143 "CounterHTOff": "0,1,2,3", 1144 "EventCode": "0xB7, 0xBB", 1145 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1146 "MSRIndex": "0x1a6,0x1a7", 1147 "MSRValue": "0x0084000001", 1148 "Offcore": "1", 1149 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1150 "SampleAfterValue": "100003", 1151 "UMask": "0x1" 1152 }, 1153 { 1154 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1155 "Counter": "0,1,2,3", 1156 "CounterHTOff": "0,1,2,3", 1157 "Deprecated": "1", 1158 "EventCode": "0xB7, 0xBB", 1159 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1160 "MSRIndex": "0x1a6,0x1a7", 1161 "MSRValue": "0x1010000002", 1162 "Offcore": "1", 1163 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1164 "SampleAfterValue": "100003", 1165 "UMask": "0x1" 1166 }, 1167 { 1168 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1169 "Counter": "0,1,2,3", 1170 "CounterHTOff": "0,1,2,3", 1171 "Deprecated": "1", 1172 "EventCode": "0xB7, 0xBB", 1173 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1174 "MSRIndex": "0x1a6,0x1a7", 1175 "MSRValue": "0x00840007F7", 1176 "Offcore": "1", 1177 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1178 "SampleAfterValue": "100003", 1179 "UMask": "0x1" 1180 }, 1181 { 1182 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1183 "Counter": "0,1,2,3", 1184 "CounterHTOff": "0,1,2,3", 1185 "Deprecated": "1", 1186 "EventCode": "0xB7, 0xBB", 1187 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1188 "MSRIndex": "0x1a6,0x1a7", 1189 "MSRValue": "0x0090000490", 1190 "Offcore": "1", 1191 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1192 "SampleAfterValue": "100003", 1193 "UMask": "0x1" 1194 }, 1195 { 1196 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1197 "Counter": "0,1,2,3", 1198 "CounterHTOff": "0,1,2,3", 1199 "Deprecated": "1", 1200 "EventCode": "0xB7, 0xBB", 1201 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1202 "MSRIndex": "0x1a6,0x1a7", 1203 "MSRValue": "0x0110000100", 1204 "Offcore": "1", 1205 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1206 "SampleAfterValue": "100003", 1207 "UMask": "0x1" 1208 }, 1209 { 1210 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1211 "Counter": "0,1,2,3", 1212 "CounterHTOff": "0,1,2,3", 1213 "Deprecated": "1", 1214 "EventCode": "0xB7, 0xBB", 1215 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1216 "MSRIndex": "0x1a6,0x1a7", 1217 "MSRValue": "0x10100007F7", 1218 "Offcore": "1", 1219 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1220 "SampleAfterValue": "100003", 1221 "UMask": "0x1" 1222 }, 1223 { 1224 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1225 "Counter": "0,1,2,3", 1226 "CounterHTOff": "0,1,2,3", 1227 "Deprecated": "1", 1228 "EventCode": "0xB7, 0xBB", 1229 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 1230 "MSRIndex": "0x1a6,0x1a7", 1231 "MSRValue": "0x013C000004", 1232 "Offcore": "1", 1233 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1234 "SampleAfterValue": "100003", 1235 "UMask": "0x1" 1236 }, 1237 { 1238 "BriefDescription": "Number of times an RTM execution aborted due to uncommon conditions.", 1239 "Counter": "0,1,2,3", 1240 "CounterHTOff": "0,1,2,3,4,5,6,7", 1241 "EventCode": "0xC9", 1242 "EventName": "RTM_RETIRED.ABORTED_TIMER", 1243 "SampleAfterValue": "2000003", 1244 "UMask": "0x10" 1245 }, 1246 { 1247 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1248 "Counter": "0,1,2,3", 1249 "CounterHTOff": "0,1,2,3", 1250 "Deprecated": "1", 1251 "EventCode": "0xB7, 0xBB", 1252 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1253 "MSRIndex": "0x1a6,0x1a7", 1254 "MSRValue": "0x0604000002", 1255 "Offcore": "1", 1256 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1257 "SampleAfterValue": "100003", 1258 "UMask": "0x1" 1259 }, 1260 { 1261 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & REMOTE_HIT_FORWARD", 1262 "Counter": "0,1,2,3", 1263 "CounterHTOff": "0,1,2,3", 1264 "EventCode": "0xB7, 0xBB", 1265 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 1266 "MSRIndex": "0x1a6,0x1a7", 1267 "MSRValue": "0x083FC00004", 1268 "Offcore": "1", 1269 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1270 "SampleAfterValue": "100003", 1271 "UMask": "0x1" 1272 }, 1273 { 1274 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1275 "Counter": "0,1,2,3", 1276 "CounterHTOff": "0,1,2,3", 1277 "Deprecated": "1", 1278 "EventCode": "0xB7, 0xBB", 1279 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 1280 "MSRIndex": "0x1a6,0x1a7", 1281 "MSRValue": "0x083C000002", 1282 "Offcore": "1", 1283 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1284 "SampleAfterValue": "100003", 1285 "UMask": "0x1" 1286 }, 1287 { 1288 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 1289 "Counter": "0,1,2,3", 1290 "CounterHTOff": "0,1,2,3", 1291 "EventCode": "0xB7, 0xBB", 1292 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 1293 "MSRIndex": "0x1a6,0x1a7", 1294 "MSRValue": "0x3F900007F7", 1295 "Offcore": "1", 1296 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1297 "SampleAfterValue": "100003", 1298 "UMask": "0x1" 1299 }, 1300 { 1301 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 1302 "Counter": "0,1,2,3", 1303 "CounterHTOff": "0,1,2,3", 1304 "EventCode": "0xB7, 0xBB", 1305 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1306 "MSRIndex": "0x1a6,0x1a7", 1307 "MSRValue": "0x0804000100", 1308 "Offcore": "1", 1309 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1310 "SampleAfterValue": "100003", 1311 "UMask": "0x1" 1312 }, 1313 { 1314 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1315 "Counter": "0,1,2,3", 1316 "CounterHTOff": "0,1,2,3", 1317 "Deprecated": "1", 1318 "EventCode": "0xB7, 0xBB", 1319 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1320 "MSRIndex": "0x1a6,0x1a7", 1321 "MSRValue": "0x0104000010", 1322 "Offcore": "1", 1323 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1324 "SampleAfterValue": "100003", 1325 "UMask": "0x1" 1326 }, 1327 { 1328 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1329 "Counter": "0,1,2,3", 1330 "CounterHTOff": "0,1,2,3", 1331 "Deprecated": "1", 1332 "EventCode": "0xB7, 0xBB", 1333 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1334 "MSRIndex": "0x1a6,0x1a7", 1335 "MSRValue": "0x3F84000001", 1336 "Offcore": "1", 1337 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1338 "SampleAfterValue": "100003", 1339 "UMask": "0x1" 1340 }, 1341 { 1342 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 1343 "Counter": "0,1,2,3", 1344 "CounterHTOff": "0,1,2,3", 1345 "EventCode": "0xB7, 0xBB", 1346 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1347 "MSRIndex": "0x1a6,0x1a7", 1348 "MSRValue": "0x04040007F7", 1349 "Offcore": "1", 1350 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1351 "SampleAfterValue": "100003", 1352 "UMask": "0x1" 1353 }, 1354 { 1355 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1356 "Counter": "0,1,2,3", 1357 "CounterHTOff": "0,1,2,3", 1358 "Deprecated": "1", 1359 "EventCode": "0xB7, 0xBB", 1360 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1361 "MSRIndex": "0x1a6,0x1a7", 1362 "MSRValue": "0x0410000010", 1363 "Offcore": "1", 1364 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1365 "SampleAfterValue": "100003", 1366 "UMask": "0x1" 1367 }, 1368 { 1369 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1370 "Counter": "0,1,2,3", 1371 "CounterHTOff": "0,1,2,3", 1372 "Deprecated": "1", 1373 "EventCode": "0xB7, 0xBB", 1374 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1375 "MSRIndex": "0x1a6,0x1a7", 1376 "MSRValue": "0x0204000004", 1377 "Offcore": "1", 1378 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1379 "SampleAfterValue": "100003", 1380 "UMask": "0x1" 1381 }, 1382 { 1383 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & HIT_OTHER_CORE_FWD", 1384 "Counter": "0,1,2,3", 1385 "CounterHTOff": "0,1,2,3", 1386 "EventCode": "0xB7, 0xBB", 1387 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 1388 "MSRIndex": "0x1a6,0x1a7", 1389 "MSRValue": "0x083C000010", 1390 "Offcore": "1", 1391 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1392 "SampleAfterValue": "100003", 1393 "UMask": "0x1" 1394 }, 1395 { 1396 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & SNOOP_MISS", 1397 "Counter": "0,1,2,3", 1398 "CounterHTOff": "0,1,2,3", 1399 "EventCode": "0xB7, 0xBB", 1400 "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 1401 "MSRIndex": "0x1a6,0x1a7", 1402 "MSRValue": "0x023C000002", 1403 "Offcore": "1", 1404 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1405 "SampleAfterValue": "100003", 1406 "UMask": "0x1" 1407 }, 1408 { 1409 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 1410 "Counter": "0,1,2,3", 1411 "CounterHTOff": "0,1,2,3", 1412 "EventCode": "0xB7, 0xBB", 1413 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 1414 "MSRIndex": "0x1a6,0x1a7", 1415 "MSRValue": "0x0104000080", 1416 "Offcore": "1", 1417 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1418 "SampleAfterValue": "100003", 1419 "UMask": "0x1" 1420 }, 1421 { 1422 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & REMOTE_HITM", 1423 "Counter": "0,1,2,3", 1424 "CounterHTOff": "0,1,2,3", 1425 "EventCode": "0xB7, 0xBB", 1426 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM", 1427 "MSRIndex": "0x1a6,0x1a7", 1428 "MSRValue": "0x103FC00490", 1429 "Offcore": "1", 1430 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1431 "SampleAfterValue": "100003", 1432 "UMask": "0x1" 1433 }, 1434 { 1435 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 1436 "Counter": "0,1,2,3", 1437 "CounterHTOff": "0,1,2,3", 1438 "EventCode": "0xB7, 0xBB", 1439 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1440 "MSRIndex": "0x1a6,0x1a7", 1441 "MSRValue": "0x0810000004", 1442 "Offcore": "1", 1443 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1444 "SampleAfterValue": "100003", 1445 "UMask": "0x1" 1446 }, 1447 { 1448 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & SNOOP_MISS", 1449 "Counter": "0,1,2,3", 1450 "CounterHTOff": "0,1,2,3", 1451 "EventCode": "0xB7, 0xBB", 1452 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS", 1453 "MSRIndex": "0x1a6,0x1a7", 1454 "MSRValue": "0x023C000004", 1455 "Offcore": "1", 1456 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1457 "SampleAfterValue": "100003", 1458 "UMask": "0x1" 1459 }, 1460 { 1461 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 1462 "Counter": "0,1,2,3", 1463 "CounterHTOff": "0,1,2,3", 1464 "Deprecated": "1", 1465 "EventCode": "0xB7, 0xBB", 1466 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 1467 "MSRIndex": "0x1a6,0x1a7", 1468 "MSRValue": "0x023C000080", 1469 "Offcore": "1", 1470 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1471 "SampleAfterValue": "100003", 1472 "UMask": "0x1" 1473 }, 1474 { 1475 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1476 "Counter": "0,1,2,3", 1477 "CounterHTOff": "0,1,2,3", 1478 "Deprecated": "1", 1479 "EventCode": "0xB7, 0xBB", 1480 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1481 "MSRIndex": "0x1a6,0x1a7", 1482 "MSRValue": "0x0604000400", 1483 "Offcore": "1", 1484 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1485 "SampleAfterValue": "100003", 1486 "UMask": "0x1" 1487 }, 1488 { 1489 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1490 "Counter": "0,1,2,3", 1491 "CounterHTOff": "0,1,2,3", 1492 "Deprecated": "1", 1493 "EventCode": "0xB7, 0xBB", 1494 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1495 "MSRIndex": "0x1a6,0x1a7", 1496 "MSRValue": "0x0404000080", 1497 "Offcore": "1", 1498 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1499 "SampleAfterValue": "100003", 1500 "UMask": "0x1" 1501 }, 1502 { 1503 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 1504 "Counter": "0,1,2,3", 1505 "CounterHTOff": "0,1,2,3", 1506 "EventCode": "0xB7, 0xBB", 1507 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1508 "MSRIndex": "0x1a6,0x1a7", 1509 "MSRValue": "0x0210000010", 1510 "Offcore": "1", 1511 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1512 "SampleAfterValue": "100003", 1513 "UMask": "0x1" 1514 }, 1515 { 1516 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & NO_SNOOP_NEEDED", 1517 "Counter": "0,1,2,3", 1518 "CounterHTOff": "0,1,2,3", 1519 "EventCode": "0xB7, 0xBB", 1520 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 1521 "MSRIndex": "0x1a6,0x1a7", 1522 "MSRValue": "0x013C000400", 1523 "Offcore": "1", 1524 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1525 "SampleAfterValue": "100003", 1526 "UMask": "0x1" 1527 }, 1528 { 1529 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1530 "Counter": "0,1,2,3", 1531 "CounterHTOff": "0,1,2,3", 1532 "Deprecated": "1", 1533 "EventCode": "0xB7, 0xBB", 1534 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 1535 "MSRIndex": "0x1a6,0x1a7", 1536 "MSRValue": "0x00BC000004", 1537 "Offcore": "1", 1538 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1539 "SampleAfterValue": "100003", 1540 "UMask": "0x1" 1541 }, 1542 { 1543 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & REMOTE_HIT_FORWARD", 1544 "Counter": "0,1,2,3", 1545 "CounterHTOff": "0,1,2,3", 1546 "EventCode": "0xB7, 0xBB", 1547 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 1548 "MSRIndex": "0x1a6,0x1a7", 1549 "MSRValue": "0x083FC00400", 1550 "Offcore": "1", 1551 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1552 "SampleAfterValue": "100003", 1553 "UMask": "0x1" 1554 }, 1555 { 1556 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1557 "Counter": "0,1,2,3", 1558 "CounterHTOff": "0,1,2,3", 1559 "Deprecated": "1", 1560 "EventCode": "0xB7, 0xBB", 1561 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1562 "MSRIndex": "0x1a6,0x1a7", 1563 "MSRValue": "0x0204000100", 1564 "Offcore": "1", 1565 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1566 "SampleAfterValue": "100003", 1567 "UMask": "0x1" 1568 }, 1569 { 1570 "BriefDescription": "Number of times an HLE execution successfully committed", 1571 "Counter": "0,1,2,3", 1572 "CounterHTOff": "0,1,2,3,4,5,6,7", 1573 "EventCode": "0xC8", 1574 "EventName": "HLE_RETIRED.COMMIT", 1575 "PublicDescription": "Number of times HLE commit succeeded.", 1576 "SampleAfterValue": "2000003", 1577 "UMask": "0x2" 1578 }, 1579 { 1580 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1581 "Counter": "0,1,2,3", 1582 "CounterHTOff": "0,1,2,3", 1583 "Deprecated": "1", 1584 "EventCode": "0xB7, 0xBB", 1585 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1586 "MSRIndex": "0x1a6,0x1a7", 1587 "MSRValue": "0x0404000122", 1588 "Offcore": "1", 1589 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1590 "SampleAfterValue": "100003", 1591 "UMask": "0x1" 1592 }, 1593 { 1594 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1595 "Counter": "0,1,2,3", 1596 "CounterHTOff": "0,1,2,3", 1597 "Deprecated": "1", 1598 "EventCode": "0xB7, 0xBB", 1599 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1600 "MSRIndex": "0x1a6,0x1a7", 1601 "MSRValue": "0x3F84000002", 1602 "Offcore": "1", 1603 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1604 "SampleAfterValue": "100003", 1605 "UMask": "0x1" 1606 }, 1607 { 1608 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1609 "Counter": "0,1,2,3", 1610 "CounterHTOff": "0,1,2,3", 1611 "Deprecated": "1", 1612 "EventCode": "0xB7, 0xBB", 1613 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1614 "MSRIndex": "0x1a6,0x1a7", 1615 "MSRValue": "0x0410000002", 1616 "Offcore": "1", 1617 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1618 "SampleAfterValue": "100003", 1619 "UMask": "0x1" 1620 }, 1621 { 1622 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 1623 "Counter": "0,1,2,3", 1624 "CounterHTOff": "0,1,2,3", 1625 "EventCode": "0xB7, 0xBB", 1626 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 1627 "MSRIndex": "0x1a6,0x1a7", 1628 "MSRValue": "0x0810000491", 1629 "Offcore": "1", 1630 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1631 "SampleAfterValue": "100003", 1632 "UMask": "0x1" 1633 }, 1634 { 1635 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 1636 "Counter": "0,1,2,3", 1637 "CounterHTOff": "0,1,2,3", 1638 "EventCode": "0xB7, 0xBB", 1639 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1640 "MSRIndex": "0x1a6,0x1a7", 1641 "MSRValue": "0x1010000010", 1642 "Offcore": "1", 1643 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1644 "SampleAfterValue": "100003", 1645 "UMask": "0x1" 1646 }, 1647 { 1648 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS", 1649 "Counter": "0,1,2,3", 1650 "CounterHTOff": "0,1,2,3", 1651 "EventCode": "0xB7, 0xBB", 1652 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1653 "MSRIndex": "0x1a6,0x1a7", 1654 "MSRValue": "0x0204000491", 1655 "Offcore": "1", 1656 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1657 "SampleAfterValue": "100003", 1658 "UMask": "0x1" 1659 }, 1660 { 1661 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1662 "Counter": "0,1,2,3", 1663 "CounterHTOff": "0,1,2,3", 1664 "Deprecated": "1", 1665 "EventCode": "0xB7, 0xBB", 1666 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 1667 "MSRIndex": "0x1a6,0x1a7", 1668 "MSRValue": "0x0210000001", 1669 "Offcore": "1", 1670 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1671 "SampleAfterValue": "100003", 1672 "UMask": "0x1" 1673 }, 1674 { 1675 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & HITM_OTHER_CORE", 1676 "Counter": "0,1,2,3", 1677 "CounterHTOff": "0,1,2,3", 1678 "EventCode": "0xB7, 0xBB", 1679 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1680 "MSRIndex": "0x1a6,0x1a7", 1681 "MSRValue": "0x103C000010", 1682 "Offcore": "1", 1683 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1684 "SampleAfterValue": "100003", 1685 "UMask": "0x1" 1686 }, 1687 { 1688 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 1689 "Counter": "0,1,2,3", 1690 "CounterHTOff": "0,1,2,3", 1691 "Deprecated": "1", 1692 "EventCode": "0xB7, 0xBB", 1693 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HITM", 1694 "MSRIndex": "0x1a6,0x1a7", 1695 "MSRValue": "0x103FC00100", 1696 "Offcore": "1", 1697 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1698 "SampleAfterValue": "100003", 1699 "UMask": "0x1" 1700 }, 1701 { 1702 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & HITM_OTHER_CORE", 1703 "Counter": "0,1,2,3", 1704 "CounterHTOff": "0,1,2,3", 1705 "EventCode": "0xB7, 0xBB", 1706 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 1707 "MSRIndex": "0x1a6,0x1a7", 1708 "MSRValue": "0x103C000490", 1709 "Offcore": "1", 1710 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1711 "SampleAfterValue": "100003", 1712 "UMask": "0x1" 1713 }, 1714 { 1715 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS", 1716 "Counter": "0,1,2,3", 1717 "CounterHTOff": "0,1,2,3", 1718 "EventCode": "0xB7, 0xBB", 1719 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 1720 "MSRIndex": "0x1a6,0x1a7", 1721 "MSRValue": "0x0204000122", 1722 "Offcore": "1", 1723 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1724 "SampleAfterValue": "100003", 1725 "UMask": "0x1" 1726 }, 1727 { 1728 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & NO_SNOOP_NEEDED", 1729 "Counter": "0,1,2,3", 1730 "CounterHTOff": "0,1,2,3", 1731 "EventCode": "0xB7, 0xBB", 1732 "EventName": "OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED", 1733 "MSRIndex": "0x1a6,0x1a7", 1734 "MSRValue": "0x013C000002", 1735 "Offcore": "1", 1736 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1737 "SampleAfterValue": "100003", 1738 "UMask": "0x1" 1739 }, 1740 { 1741 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & SNOOP_NONE", 1742 "Counter": "0,1,2,3", 1743 "CounterHTOff": "0,1,2,3", 1744 "EventCode": "0xB7, 0xBB", 1745 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 1746 "MSRIndex": "0x1a6,0x1a7", 1747 "MSRValue": "0x00BC000080", 1748 "Offcore": "1", 1749 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1750 "SampleAfterValue": "100003", 1751 "UMask": "0x1" 1752 }, 1753 { 1754 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 1755 "Counter": "0,1,2,3", 1756 "CounterHTOff": "0,1,2,3", 1757 "Deprecated": "1", 1758 "EventCode": "0xB7, 0xBB", 1759 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NONE", 1760 "MSRIndex": "0x1a6,0x1a7", 1761 "MSRValue": "0x00BC000100", 1762 "Offcore": "1", 1763 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1764 "SampleAfterValue": "100003", 1765 "UMask": "0x1" 1766 }, 1767 { 1768 "BriefDescription": "ALL_READS & L3_MISS & SNOOP_MISS", 1769 "Counter": "0,1,2,3", 1770 "CounterHTOff": "0,1,2,3", 1771 "EventCode": "0xB7, 0xBB", 1772 "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_MISS", 1773 "MSRIndex": "0x1a6,0x1a7", 1774 "MSRValue": "0x023C0007F7", 1775 "Offcore": "1", 1776 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1777 "SampleAfterValue": "100003", 1778 "UMask": "0x1" 1779 }, 1780 { 1781 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1782 "Counter": "0,1,2,3", 1783 "CounterHTOff": "0,1,2,3", 1784 "Deprecated": "1", 1785 "EventCode": "0xB7, 0xBB", 1786 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 1787 "MSRIndex": "0x1a6,0x1a7", 1788 "MSRValue": "0x0404000004", 1789 "Offcore": "1", 1790 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1791 "SampleAfterValue": "100003", 1792 "UMask": "0x1" 1793 }, 1794 { 1795 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 1796 "Counter": "0,1,2,3", 1797 "CounterHTOff": "0,1,2,3", 1798 "Deprecated": "1", 1799 "EventCode": "0xB7, 0xBB", 1800 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HITM", 1801 "MSRIndex": "0x1a6,0x1a7", 1802 "MSRValue": "0x103FC00122", 1803 "Offcore": "1", 1804 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1805 "SampleAfterValue": "100003", 1806 "UMask": "0x1" 1807 }, 1808 { 1809 "BriefDescription": "ALL_READS & L3_MISS & HIT_OTHER_CORE_NO_FWD", 1810 "Counter": "0,1,2,3", 1811 "CounterHTOff": "0,1,2,3", 1812 "EventCode": "0xB7, 0xBB", 1813 "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 1814 "MSRIndex": "0x1a6,0x1a7", 1815 "MSRValue": "0x043C0007F7", 1816 "Offcore": "1", 1817 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1818 "SampleAfterValue": "100003", 1819 "UMask": "0x1" 1820 }, 1821 { 1822 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1823 "Counter": "0,1,2,3", 1824 "CounterHTOff": "0,1,2,3", 1825 "Deprecated": "1", 1826 "EventCode": "0xB7, 0xBB", 1827 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 1828 "MSRIndex": "0x1a6,0x1a7", 1829 "MSRValue": "0x0084000120", 1830 "Offcore": "1", 1831 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1832 "SampleAfterValue": "100003", 1833 "UMask": "0x1" 1834 }, 1835 { 1836 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & REMOTE_HIT_FORWARD", 1837 "Counter": "0,1,2,3", 1838 "CounterHTOff": "0,1,2,3", 1839 "EventCode": "0xB7, 0xBB", 1840 "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 1841 "MSRIndex": "0x1a6,0x1a7", 1842 "MSRValue": "0x083FC00020", 1843 "Offcore": "1", 1844 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1845 "SampleAfterValue": "100003", 1846 "UMask": "0x1" 1847 }, 1848 { 1849 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1850 "Counter": "0,1,2,3", 1851 "CounterHTOff": "0,1,2,3", 1852 "Deprecated": "1", 1853 "EventCode": "0xB7, 0xBB", 1854 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 1855 "MSRIndex": "0x1a6,0x1a7", 1856 "MSRValue": "0x3F84008000", 1857 "Offcore": "1", 1858 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1859 "SampleAfterValue": "100003", 1860 "UMask": "0x1" 1861 }, 1862 { 1863 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1864 "Counter": "0,1,2,3", 1865 "CounterHTOff": "0,1,2,3", 1866 "Deprecated": "1", 1867 "EventCode": "0xB7, 0xBB", 1868 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 1869 "MSRIndex": "0x1a6,0x1a7", 1870 "MSRValue": "0x0090000002", 1871 "Offcore": "1", 1872 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1873 "SampleAfterValue": "100003", 1874 "UMask": "0x1" 1875 }, 1876 { 1877 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 1878 "Counter": "0,1,2,3", 1879 "CounterHTOff": "0,1,2,3", 1880 "EventCode": "0xB7, 0xBB", 1881 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 1882 "MSRIndex": "0x1a6,0x1a7", 1883 "MSRValue": "0x0804000004", 1884 "Offcore": "1", 1885 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1886 "SampleAfterValue": "100003", 1887 "UMask": "0x1" 1888 }, 1889 { 1890 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 1891 "Counter": "0,1,2,3", 1892 "CounterHTOff": "0,1,2,3", 1893 "EventCode": "0xB7, 0xBB", 1894 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1895 "MSRIndex": "0x1a6,0x1a7", 1896 "MSRValue": "0x0410000120", 1897 "Offcore": "1", 1898 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1899 "SampleAfterValue": "100003", 1900 "UMask": "0x1" 1901 }, 1902 { 1903 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1904 "Counter": "0,1,2,3", 1905 "CounterHTOff": "0,1,2,3", 1906 "Deprecated": "1", 1907 "EventCode": "0xB7, 0xBB", 1908 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 1909 "MSRIndex": "0x1a6,0x1a7", 1910 "MSRValue": "0x0604000122", 1911 "Offcore": "1", 1912 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1913 "SampleAfterValue": "100003", 1914 "UMask": "0x1" 1915 }, 1916 { 1917 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1918 "Counter": "0,1,2,3", 1919 "CounterHTOff": "0,1,2,3", 1920 "Deprecated": "1", 1921 "EventCode": "0xB7, 0xBB", 1922 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 1923 "MSRIndex": "0x1a6,0x1a7", 1924 "MSRValue": "0x1004000080", 1925 "Offcore": "1", 1926 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1927 "SampleAfterValue": "100003", 1928 "UMask": "0x1" 1929 }, 1930 { 1931 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1932 "Counter": "0,1,2,3", 1933 "CounterHTOff": "0,1,2,3", 1934 "Deprecated": "1", 1935 "EventCode": "0xB7, 0xBB", 1936 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 1937 "MSRIndex": "0x1a6,0x1a7", 1938 "MSRValue": "0x1010000004", 1939 "Offcore": "1", 1940 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1941 "SampleAfterValue": "100003", 1942 "UMask": "0x1" 1943 }, 1944 { 1945 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 1946 "Counter": "0,1,2,3", 1947 "CounterHTOff": "0,1,2,3", 1948 "EventCode": "0xB7, 0xBB", 1949 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 1950 "MSRIndex": "0x1a6,0x1a7", 1951 "MSRValue": "0x0410000010", 1952 "Offcore": "1", 1953 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1954 "SampleAfterValue": "100003", 1955 "UMask": "0x1" 1956 }, 1957 { 1958 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1959 "Counter": "0,1,2,3", 1960 "CounterHTOff": "0,1,2,3", 1961 "Deprecated": "1", 1962 "EventCode": "0xB7, 0xBB", 1963 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 1964 "MSRIndex": "0x1a6,0x1a7", 1965 "MSRValue": "0x063B800490", 1966 "Offcore": "1", 1967 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1968 "SampleAfterValue": "100003", 1969 "UMask": "0x1" 1970 }, 1971 { 1972 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 1973 "Counter": "0,1,2,3", 1974 "CounterHTOff": "0,1,2,3", 1975 "EventCode": "0xB7, 0xBB", 1976 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1977 "MSRIndex": "0x1a6,0x1a7", 1978 "MSRValue": "0x0110000490", 1979 "Offcore": "1", 1980 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1981 "SampleAfterValue": "100003", 1982 "UMask": "0x1" 1983 }, 1984 { 1985 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 1986 "Counter": "0,1,2,3", 1987 "CounterHTOff": "0,1,2,3", 1988 "EventCode": "0xB7, 0xBB", 1989 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 1990 "MSRIndex": "0x1a6,0x1a7", 1991 "MSRValue": "0x0110008000", 1992 "Offcore": "1", 1993 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 1994 "SampleAfterValue": "100003", 1995 "UMask": "0x1" 1996 }, 1997 { 1998 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 1999 "Counter": "0,1,2,3", 2000 "CounterHTOff": "0,1,2,3", 2001 "EventCode": "0xB7, 0xBB", 2002 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2003 "MSRIndex": "0x1a6,0x1a7", 2004 "MSRValue": "0x063B800100", 2005 "Offcore": "1", 2006 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2007 "SampleAfterValue": "100003", 2008 "UMask": "0x1" 2009 }, 2010 { 2011 "BriefDescription": "Counts any other requests OTHER & L3_MISS & SNOOP_NONE", 2012 "Counter": "0,1,2,3", 2013 "CounterHTOff": "0,1,2,3", 2014 "EventCode": "0xB7, 0xBB", 2015 "EventName": "OCR.OTHER.L3_MISS.SNOOP_NONE", 2016 "MSRIndex": "0x1a6,0x1a7", 2017 "MSRValue": "0x00BC008000", 2018 "Offcore": "1", 2019 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2020 "SampleAfterValue": "100003", 2021 "UMask": "0x1" 2022 }, 2023 { 2024 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 2025 "Counter": "0,1,2,3", 2026 "CounterHTOff": "0,1,2,3", 2027 "EventCode": "0xB7, 0xBB", 2028 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2029 "MSRIndex": "0x1a6,0x1a7", 2030 "MSRValue": "0x1004000122", 2031 "Offcore": "1", 2032 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2033 "SampleAfterValue": "100003", 2034 "UMask": "0x1" 2035 }, 2036 { 2037 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2038 "Counter": "0,1,2,3", 2039 "CounterHTOff": "0,1,2,3", 2040 "Deprecated": "1", 2041 "EventCode": "0xB7, 0xBB", 2042 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2043 "MSRIndex": "0x1a6,0x1a7", 2044 "MSRValue": "0x083FC00080", 2045 "Offcore": "1", 2046 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2047 "SampleAfterValue": "100003", 2048 "UMask": "0x1" 2049 }, 2050 { 2051 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & REMOTE_HITM", 2052 "Counter": "0,1,2,3", 2053 "CounterHTOff": "0,1,2,3", 2054 "EventCode": "0xB7, 0xBB", 2055 "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 2056 "MSRIndex": "0x1a6,0x1a7", 2057 "MSRValue": "0x103FC00002", 2058 "Offcore": "1", 2059 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2060 "SampleAfterValue": "100003", 2061 "UMask": "0x1" 2062 }, 2063 { 2064 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2065 "Counter": "0,1,2,3", 2066 "CounterHTOff": "0,1,2,3", 2067 "Deprecated": "1", 2068 "EventCode": "0xB7, 0xBB", 2069 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2070 "MSRIndex": "0x1a6,0x1a7", 2071 "MSRValue": "0x0604000020", 2072 "Offcore": "1", 2073 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2074 "SampleAfterValue": "100003", 2075 "UMask": "0x1" 2076 }, 2077 { 2078 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2079 "Counter": "0,1,2,3", 2080 "CounterHTOff": "0,1,2,3", 2081 "Deprecated": "1", 2082 "EventCode": "0xB7, 0xBB", 2083 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2084 "MSRIndex": "0x1a6,0x1a7", 2085 "MSRValue": "0x1004000120", 2086 "Offcore": "1", 2087 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2088 "SampleAfterValue": "100003", 2089 "UMask": "0x1" 2090 }, 2091 { 2092 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 2093 "Counter": "0,1,2,3", 2094 "CounterHTOff": "0,1,2,3", 2095 "EventCode": "0xB7, 0xBB", 2096 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2097 "MSRIndex": "0x1a6,0x1a7", 2098 "MSRValue": "0x3F840007F7", 2099 "Offcore": "1", 2100 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2101 "SampleAfterValue": "100003", 2102 "UMask": "0x1" 2103 }, 2104 { 2105 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2106 "Counter": "0,1,2,3", 2107 "CounterHTOff": "0,1,2,3", 2108 "Deprecated": "1", 2109 "EventCode": "0xB7, 0xBB", 2110 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2111 "MSRIndex": "0x1a6,0x1a7", 2112 "MSRValue": "0x3F90000004", 2113 "Offcore": "1", 2114 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2115 "SampleAfterValue": "100003", 2116 "UMask": "0x1" 2117 }, 2118 { 2119 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_MISS", 2120 "Counter": "0,1,2,3", 2121 "CounterHTOff": "0,1,2,3", 2122 "Deprecated": "1", 2123 "EventCode": "0xB7, 0xBB", 2124 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_MISS", 2125 "MSRIndex": "0x1a6,0x1a7", 2126 "MSRValue": "0x023C0007F7", 2127 "Offcore": "1", 2128 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2129 "SampleAfterValue": "100003", 2130 "UMask": "0x1" 2131 }, 2132 { 2133 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2134 "Counter": "0,1,2,3", 2135 "CounterHTOff": "0,1,2,3", 2136 "Deprecated": "1", 2137 "EventCode": "0xB7, 0xBB", 2138 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 2139 "MSRIndex": "0x1a6,0x1a7", 2140 "MSRValue": "0x0110000122", 2141 "Offcore": "1", 2142 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2143 "SampleAfterValue": "100003", 2144 "UMask": "0x1" 2145 }, 2146 { 2147 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & ANY_SNOOP", 2148 "Counter": "0,1,2,3", 2149 "CounterHTOff": "0,1,2,3", 2150 "EventCode": "0xB7, 0xBB", 2151 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2152 "MSRIndex": "0x1a6,0x1a7", 2153 "MSRValue": "0x3FBC000490", 2154 "Offcore": "1", 2155 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2156 "SampleAfterValue": "100003", 2157 "UMask": "0x1" 2158 }, 2159 { 2160 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2161 "Counter": "0,1,2,3", 2162 "CounterHTOff": "0,1,2,3", 2163 "Deprecated": "1", 2164 "EventCode": "0xB7, 0xBB", 2165 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2166 "MSRIndex": "0x1a6,0x1a7", 2167 "MSRValue": "0x3FBC000001", 2168 "Offcore": "1", 2169 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2170 "SampleAfterValue": "100003", 2171 "UMask": "0x1" 2172 }, 2173 { 2174 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2175 "Counter": "0,1,2,3", 2176 "CounterHTOff": "0,1,2,3", 2177 "Deprecated": "1", 2178 "EventCode": "0xB7, 0xBB", 2179 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2180 "MSRIndex": "0x1a6,0x1a7", 2181 "MSRValue": "0x083FC00491", 2182 "Offcore": "1", 2183 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2184 "SampleAfterValue": "100003", 2185 "UMask": "0x1" 2186 }, 2187 { 2188 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 2189 "Counter": "0,1,2,3", 2190 "CounterHTOff": "0,1,2,3", 2191 "EventCode": "0xB7, 0xBB", 2192 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2193 "MSRIndex": "0x1a6,0x1a7", 2194 "MSRValue": "0x10040007F7", 2195 "Offcore": "1", 2196 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2197 "SampleAfterValue": "100003", 2198 "UMask": "0x1" 2199 }, 2200 { 2201 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 2202 "Counter": "0,1,2,3", 2203 "CounterHTOff": "0,1,2,3", 2204 "Deprecated": "1", 2205 "EventCode": "0xB7, 0xBB", 2206 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 2207 "MSRIndex": "0x1a6,0x1a7", 2208 "MSRValue": "0x013C0007F7", 2209 "Offcore": "1", 2210 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2211 "SampleAfterValue": "100003", 2212 "UMask": "0x1" 2213 }, 2214 { 2215 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 2216 "Counter": "0,1,2,3", 2217 "CounterHTOff": "0,1,2,3", 2218 "EventCode": "0xB7, 0xBB", 2219 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2220 "MSRIndex": "0x1a6,0x1a7", 2221 "MSRValue": "0x3F90000002", 2222 "Offcore": "1", 2223 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2224 "SampleAfterValue": "100003", 2225 "UMask": "0x1" 2226 }, 2227 { 2228 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 2229 "Counter": "0,1,2,3", 2230 "CounterHTOff": "0,1,2,3", 2231 "EventCode": "0xB7, 0xBB", 2232 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2233 "MSRIndex": "0x1a6,0x1a7", 2234 "MSRValue": "0x1004008000", 2235 "Offcore": "1", 2236 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2237 "SampleAfterValue": "100003", 2238 "UMask": "0x1" 2239 }, 2240 { 2241 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 2242 "Counter": "0,1,2,3", 2243 "CounterHTOff": "0,1,2,3", 2244 "EventCode": "0xCD", 2245 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", 2246 "MSRIndex": "0x3F6", 2247 "MSRValue": "0x80", 2248 "PEBS": "2", 2249 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", 2250 "SampleAfterValue": "1009", 2251 "TakenAlone": "1", 2252 "UMask": "0x1" 2253 }, 2254 { 2255 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 2256 "Counter": "0,1,2,3", 2257 "CounterHTOff": "0,1,2,3", 2258 "Deprecated": "1", 2259 "EventCode": "0xB7, 0xBB", 2260 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 2261 "MSRIndex": "0x1a6,0x1a7", 2262 "MSRValue": "0x083C0007F7", 2263 "Offcore": "1", 2264 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2265 "SampleAfterValue": "100003", 2266 "UMask": "0x1" 2267 }, 2268 { 2269 "BriefDescription": "Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero.", 2270 "Counter": "0,1,2,3", 2271 "CounterHTOff": "0,1,2,3,4,5,6,7", 2272 "EventCode": "0x54", 2273 "EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL", 2274 "PublicDescription": "Number of times we could not allocate Lock Buffer.", 2275 "SampleAfterValue": "2000003", 2276 "UMask": "0x40" 2277 }, 2278 { 2279 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2280 "Counter": "0,1,2,3", 2281 "CounterHTOff": "0,1,2,3", 2282 "Deprecated": "1", 2283 "EventCode": "0xB7, 0xBB", 2284 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2285 "MSRIndex": "0x1a6,0x1a7", 2286 "MSRValue": "0x0204008000", 2287 "Offcore": "1", 2288 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2289 "SampleAfterValue": "100003", 2290 "UMask": "0x1" 2291 }, 2292 { 2293 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & SNOOP_MISS", 2294 "Counter": "0,1,2,3", 2295 "CounterHTOff": "0,1,2,3", 2296 "EventCode": "0xB7, 0xBB", 2297 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS", 2298 "MSRIndex": "0x1a6,0x1a7", 2299 "MSRValue": "0x023C000010", 2300 "Offcore": "1", 2301 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2302 "SampleAfterValue": "100003", 2303 "UMask": "0x1" 2304 }, 2305 { 2306 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2307 "Counter": "0,1,2,3", 2308 "CounterHTOff": "0,1,2,3", 2309 "Deprecated": "1", 2310 "EventCode": "0xB7, 0xBB", 2311 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2312 "MSRIndex": "0x1a6,0x1a7", 2313 "MSRValue": "0x043C000491", 2314 "Offcore": "1", 2315 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2316 "SampleAfterValue": "100003", 2317 "UMask": "0x1" 2318 }, 2319 { 2320 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2321 "Counter": "0,1,2,3", 2322 "CounterHTOff": "0,1,2,3", 2323 "Deprecated": "1", 2324 "EventCode": "0xB7, 0xBB", 2325 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2326 "MSRIndex": "0x1a6,0x1a7", 2327 "MSRValue": "0x1010000020", 2328 "Offcore": "1", 2329 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2330 "SampleAfterValue": "100003", 2331 "UMask": "0x1" 2332 }, 2333 { 2334 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 2335 "Counter": "0,1,2,3", 2336 "CounterHTOff": "0,1,2,3", 2337 "Deprecated": "1", 2338 "EventCode": "0xB7, 0xBB", 2339 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 2340 "MSRIndex": "0x1a6,0x1a7", 2341 "MSRValue": "0x103C000122", 2342 "Offcore": "1", 2343 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2344 "SampleAfterValue": "100003", 2345 "UMask": "0x1" 2346 }, 2347 { 2348 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 2349 "Counter": "0,1,2,3", 2350 "CounterHTOff": "0,1,2,3", 2351 "EventCode": "0xB7, 0xBB", 2352 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2353 "MSRIndex": "0x1a6,0x1a7", 2354 "MSRValue": "0x0410000400", 2355 "Offcore": "1", 2356 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2357 "SampleAfterValue": "100003", 2358 "UMask": "0x1" 2359 }, 2360 { 2361 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2362 "Counter": "0,1,2,3", 2363 "CounterHTOff": "0,1,2,3", 2364 "Deprecated": "1", 2365 "EventCode": "0xB7, 0xBB", 2366 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2367 "MSRIndex": "0x1a6,0x1a7", 2368 "MSRValue": "0x0084000122", 2369 "Offcore": "1", 2370 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2371 "SampleAfterValue": "100003", 2372 "UMask": "0x1" 2373 }, 2374 { 2375 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2376 "Counter": "0,1,2,3", 2377 "CounterHTOff": "0,1,2,3", 2378 "Deprecated": "1", 2379 "EventCode": "0xB7, 0xBB", 2380 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 2381 "MSRIndex": "0x1a6,0x1a7", 2382 "MSRValue": "0x083C000491", 2383 "Offcore": "1", 2384 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2385 "SampleAfterValue": "100003", 2386 "UMask": "0x1" 2387 }, 2388 { 2389 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 2390 "Counter": "0,1,2,3", 2391 "CounterHTOff": "0,1,2,3", 2392 "EventCode": "0xB7, 0xBB", 2393 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2394 "MSRIndex": "0x1a6,0x1a7", 2395 "MSRValue": "0x3F84000120", 2396 "Offcore": "1", 2397 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2398 "SampleAfterValue": "100003", 2399 "UMask": "0x1" 2400 }, 2401 { 2402 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & NO_SNOOP_NEEDED", 2403 "Counter": "0,1,2,3", 2404 "CounterHTOff": "0,1,2,3", 2405 "EventCode": "0xB7, 0xBB", 2406 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2407 "MSRIndex": "0x1a6,0x1a7", 2408 "MSRValue": "0x013C000490", 2409 "Offcore": "1", 2410 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2411 "SampleAfterValue": "100003", 2412 "UMask": "0x1" 2413 }, 2414 { 2415 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2416 "Counter": "0,1,2,3", 2417 "CounterHTOff": "0,1,2,3", 2418 "Deprecated": "1", 2419 "EventCode": "0xB7, 0xBB", 2420 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP", 2421 "MSRIndex": "0x1a6,0x1a7", 2422 "MSRValue": "0x3FBC000490", 2423 "Offcore": "1", 2424 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2425 "SampleAfterValue": "100003", 2426 "UMask": "0x1" 2427 }, 2428 { 2429 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 2430 "Counter": "0,1,2,3", 2431 "CounterHTOff": "0,1,2,3", 2432 "EventCode": "0xB7, 0xBB", 2433 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2434 "MSRIndex": "0x1a6,0x1a7", 2435 "MSRValue": "0x0804000490", 2436 "Offcore": "1", 2437 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2438 "SampleAfterValue": "100003", 2439 "UMask": "0x1" 2440 }, 2441 { 2442 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & HIT_OTHER_CORE_FWD", 2443 "Counter": "0,1,2,3", 2444 "CounterHTOff": "0,1,2,3", 2445 "EventCode": "0xB7, 0xBB", 2446 "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 2447 "MSRIndex": "0x1a6,0x1a7", 2448 "MSRValue": "0x083C000002", 2449 "Offcore": "1", 2450 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2451 "SampleAfterValue": "100003", 2452 "UMask": "0x1" 2453 }, 2454 { 2455 "BriefDescription": "ALL_DATA_RD & L3_MISS & ANY_SNOOP", 2456 "Counter": "0,1,2,3", 2457 "CounterHTOff": "0,1,2,3", 2458 "EventCode": "0xB7, 0xBB", 2459 "EventName": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 2460 "MSRIndex": "0x1a6,0x1a7", 2461 "MSRValue": "0x3FBC000491", 2462 "Offcore": "1", 2463 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2464 "SampleAfterValue": "100003", 2465 "UMask": "0x1" 2466 }, 2467 { 2468 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2469 "Counter": "0,1,2,3", 2470 "CounterHTOff": "0,1,2,3", 2471 "Deprecated": "1", 2472 "EventCode": "0xB7, 0xBB", 2473 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2474 "MSRIndex": "0x1a6,0x1a7", 2475 "MSRValue": "0x103C000080", 2476 "Offcore": "1", 2477 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2478 "SampleAfterValue": "100003", 2479 "UMask": "0x1" 2480 }, 2481 { 2482 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 2483 "Counter": "0,1,2,3", 2484 "CounterHTOff": "0,1,2,3", 2485 "Deprecated": "1", 2486 "EventCode": "0xB7, 0xBB", 2487 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 2488 "MSRIndex": "0x1a6,0x1a7", 2489 "MSRValue": "0x023C000491", 2490 "Offcore": "1", 2491 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2492 "SampleAfterValue": "100003", 2493 "UMask": "0x1" 2494 }, 2495 { 2496 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 2497 "Counter": "0,1,2,3", 2498 "CounterHTOff": "0,1,2,3", 2499 "EventCode": "0xB7, 0xBB", 2500 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 2501 "MSRIndex": "0x1a6,0x1a7", 2502 "MSRValue": "0x0404000100", 2503 "Offcore": "1", 2504 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2505 "SampleAfterValue": "100003", 2506 "UMask": "0x1" 2507 }, 2508 { 2509 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2510 "Counter": "0,1,2,3", 2511 "CounterHTOff": "0,1,2,3", 2512 "Deprecated": "1", 2513 "EventCode": "0xB7, 0xBB", 2514 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2515 "MSRIndex": "0x1a6,0x1a7", 2516 "MSRValue": "0x3F90000120", 2517 "Offcore": "1", 2518 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2519 "SampleAfterValue": "100003", 2520 "UMask": "0x1" 2521 }, 2522 { 2523 "BriefDescription": "ALL_PF_RFO & L3_MISS & HIT_OTHER_CORE_NO_FWD", 2524 "Counter": "0,1,2,3", 2525 "CounterHTOff": "0,1,2,3", 2526 "EventCode": "0xB7, 0xBB", 2527 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2528 "MSRIndex": "0x1a6,0x1a7", 2529 "MSRValue": "0x043C000120", 2530 "Offcore": "1", 2531 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2532 "SampleAfterValue": "100003", 2533 "UMask": "0x1" 2534 }, 2535 { 2536 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.ANY_SNOOP", 2537 "Counter": "0,1,2,3", 2538 "CounterHTOff": "0,1,2,3", 2539 "Deprecated": "1", 2540 "EventCode": "0xB7, 0xBB", 2541 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.ANY_SNOOP", 2542 "MSRIndex": "0x1a6,0x1a7", 2543 "MSRValue": "0x3FBC008000", 2544 "Offcore": "1", 2545 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2546 "SampleAfterValue": "100003", 2547 "UMask": "0x1" 2548 }, 2549 { 2550 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & SNOOP_MISS", 2551 "Counter": "0,1,2,3", 2552 "CounterHTOff": "0,1,2,3", 2553 "EventCode": "0xB7, 0xBB", 2554 "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 2555 "MSRIndex": "0x1a6,0x1a7", 2556 "MSRValue": "0x023C000100", 2557 "Offcore": "1", 2558 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2559 "SampleAfterValue": "100003", 2560 "UMask": "0x1" 2561 }, 2562 { 2563 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 2564 "Counter": "0,1,2,3", 2565 "CounterHTOff": "0,1,2,3", 2566 "EventCode": "0xB7, 0xBB", 2567 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2568 "MSRIndex": "0x1a6,0x1a7", 2569 "MSRValue": "0x0604000002", 2570 "Offcore": "1", 2571 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2572 "SampleAfterValue": "100003", 2573 "UMask": "0x1" 2574 }, 2575 { 2576 "BriefDescription": "Counts any other requests", 2577 "Counter": "0,1,2,3", 2578 "CounterHTOff": "0,1,2,3", 2579 "EventCode": "0xB7, 0xBB", 2580 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2581 "MSRIndex": "0x1a6,0x1a7", 2582 "MSRValue": "0x0090008000", 2583 "Offcore": "1", 2584 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2585 "SampleAfterValue": "100003", 2586 "UMask": "0x1" 2587 }, 2588 { 2589 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 2590 "Counter": "0,1,2,3", 2591 "CounterHTOff": "0,1,2,3", 2592 "EventCode": "0xB7, 0xBB", 2593 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2594 "MSRIndex": "0x1a6,0x1a7", 2595 "MSRValue": "0x0104000122", 2596 "Offcore": "1", 2597 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2598 "SampleAfterValue": "100003", 2599 "UMask": "0x1" 2600 }, 2601 { 2602 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & SNOOP_MISS", 2603 "Counter": "0,1,2,3", 2604 "CounterHTOff": "0,1,2,3", 2605 "EventCode": "0xB7, 0xBB", 2606 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS", 2607 "MSRIndex": "0x1a6,0x1a7", 2608 "MSRValue": "0x023C000490", 2609 "Offcore": "1", 2610 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2611 "SampleAfterValue": "100003", 2612 "UMask": "0x1" 2613 }, 2614 { 2615 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 2616 "Counter": "0,1,2,3", 2617 "CounterHTOff": "0,1,2,3", 2618 "EventCode": "0xB7, 0xBB", 2619 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2620 "MSRIndex": "0x1a6,0x1a7", 2621 "MSRValue": "0x3F90000122", 2622 "Offcore": "1", 2623 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2624 "SampleAfterValue": "100003", 2625 "UMask": "0x1" 2626 }, 2627 { 2628 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2629 "Counter": "0,1,2,3", 2630 "CounterHTOff": "0,1,2,3", 2631 "Deprecated": "1", 2632 "EventCode": "0xB7, 0xBB", 2633 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2634 "MSRIndex": "0x1a6,0x1a7", 2635 "MSRValue": "0x1010000080", 2636 "Offcore": "1", 2637 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2638 "SampleAfterValue": "100003", 2639 "UMask": "0x1" 2640 }, 2641 { 2642 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2643 "Counter": "0,1,2,3", 2644 "CounterHTOff": "0,1,2,3", 2645 "Deprecated": "1", 2646 "EventCode": "0xB7, 0xBB", 2647 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 2648 "MSRIndex": "0x1a6,0x1a7", 2649 "MSRValue": "0x043C000490", 2650 "Offcore": "1", 2651 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2652 "SampleAfterValue": "100003", 2653 "UMask": "0x1" 2654 }, 2655 { 2656 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 2657 "Counter": "0,1,2,3", 2658 "CounterHTOff": "0,1,2,3", 2659 "EventCode": "0xB7, 0xBB", 2660 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2661 "MSRIndex": "0x1a6,0x1a7", 2662 "MSRValue": "0x0810000120", 2663 "Offcore": "1", 2664 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2665 "SampleAfterValue": "100003", 2666 "UMask": "0x1" 2667 }, 2668 { 2669 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2670 "Counter": "0,1,2,3", 2671 "CounterHTOff": "0,1,2,3", 2672 "Deprecated": "1", 2673 "EventCode": "0xB7, 0xBB", 2674 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 2675 "MSRIndex": "0x1a6,0x1a7", 2676 "MSRValue": "0x0604000490", 2677 "Offcore": "1", 2678 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2679 "SampleAfterValue": "100003", 2680 "UMask": "0x1" 2681 }, 2682 { 2683 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2684 "Counter": "0,1,2,3", 2685 "CounterHTOff": "0,1,2,3", 2686 "Deprecated": "1", 2687 "EventCode": "0xB7, 0xBB", 2688 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2689 "MSRIndex": "0x1a6,0x1a7", 2690 "MSRValue": "0x0090000001", 2691 "Offcore": "1", 2692 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2693 "SampleAfterValue": "100003", 2694 "UMask": "0x1" 2695 }, 2696 { 2697 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS", 2698 "Counter": "0,1,2,3", 2699 "CounterHTOff": "0,1,2,3", 2700 "EventCode": "0xB7, 0xBB", 2701 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2702 "MSRIndex": "0x1a6,0x1a7", 2703 "MSRValue": "0x0204000120", 2704 "Offcore": "1", 2705 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2706 "SampleAfterValue": "100003", 2707 "UMask": "0x1" 2708 }, 2709 { 2710 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & ANY_SNOOP", 2711 "Counter": "0,1,2,3", 2712 "CounterHTOff": "0,1,2,3", 2713 "EventCode": "0xB7, 0xBB", 2714 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP", 2715 "MSRIndex": "0x1a6,0x1a7", 2716 "MSRValue": "0x3FBC000001", 2717 "Offcore": "1", 2718 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2719 "SampleAfterValue": "100003", 2720 "UMask": "0x1" 2721 }, 2722 { 2723 "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type", 2724 "Counter": "0,1,2,3", 2725 "CounterHTOff": "0,1,2,3,4,5,6,7", 2726 "EventCode": "0xC9", 2727 "EventName": "RTM_RETIRED.ABORTED_MEMTYPE", 2728 "PublicDescription": "Number of times an RTM execution aborted due to incompatible memory type.", 2729 "SampleAfterValue": "2000003", 2730 "UMask": "0x40" 2731 }, 2732 { 2733 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 2734 "Counter": "0,1,2,3", 2735 "CounterHTOff": "0,1,2,3", 2736 "EventCode": "0xB7, 0xBB", 2737 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 2738 "MSRIndex": "0x1a6,0x1a7", 2739 "MSRValue": "0x1010000120", 2740 "Offcore": "1", 2741 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2742 "SampleAfterValue": "100003", 2743 "UMask": "0x1" 2744 }, 2745 { 2746 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 2747 "Counter": "0,1,2,3", 2748 "CounterHTOff": "0,1,2,3", 2749 "EventCode": "0xB7, 0xBB", 2750 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2751 "MSRIndex": "0x1a6,0x1a7", 2752 "MSRValue": "0x3F84000490", 2753 "Offcore": "1", 2754 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2755 "SampleAfterValue": "100003", 2756 "UMask": "0x1" 2757 }, 2758 { 2759 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & REMOTE_HIT_FORWARD", 2760 "Counter": "0,1,2,3", 2761 "CounterHTOff": "0,1,2,3", 2762 "EventCode": "0xB7, 0xBB", 2763 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 2764 "MSRIndex": "0x1a6,0x1a7", 2765 "MSRValue": "0x083FC00010", 2766 "Offcore": "1", 2767 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2768 "SampleAfterValue": "100003", 2769 "UMask": "0x1" 2770 }, 2771 { 2772 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE", 2773 "Counter": "0,1,2,3", 2774 "CounterHTOff": "0,1,2,3", 2775 "EventCode": "0xB7, 0xBB", 2776 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 2777 "MSRIndex": "0x1a6,0x1a7", 2778 "MSRValue": "0x0084000122", 2779 "Offcore": "1", 2780 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2781 "SampleAfterValue": "100003", 2782 "UMask": "0x1" 2783 }, 2784 { 2785 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_NONE", 2786 "Counter": "0,1,2,3", 2787 "CounterHTOff": "0,1,2,3", 2788 "EventCode": "0xB7, 0xBB", 2789 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 2790 "MSRIndex": "0x1a6,0x1a7", 2791 "MSRValue": "0x00900007F7", 2792 "Offcore": "1", 2793 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2794 "SampleAfterValue": "100003", 2795 "UMask": "0x1" 2796 }, 2797 { 2798 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2799 "Counter": "0,1,2,3", 2800 "CounterHTOff": "0,1,2,3", 2801 "Deprecated": "1", 2802 "EventCode": "0xB7, 0xBB", 2803 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE", 2804 "MSRIndex": "0x1a6,0x1a7", 2805 "MSRValue": "0x103C000010", 2806 "Offcore": "1", 2807 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2808 "SampleAfterValue": "100003", 2809 "UMask": "0x1" 2810 }, 2811 { 2812 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 2813 "Counter": "0,1,2,3", 2814 "CounterHTOff": "0,1,2,3", 2815 "EventCode": "0xB7, 0xBB", 2816 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 2817 "MSRIndex": "0x1a6,0x1a7", 2818 "MSRValue": "0x3F84000400", 2819 "Offcore": "1", 2820 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2821 "SampleAfterValue": "100003", 2822 "UMask": "0x1" 2823 }, 2824 { 2825 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & SNOOP_MISS", 2826 "Counter": "0,1,2,3", 2827 "CounterHTOff": "0,1,2,3", 2828 "EventCode": "0xB7, 0xBB", 2829 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 2830 "MSRIndex": "0x1a6,0x1a7", 2831 "MSRValue": "0x02040007F7", 2832 "Offcore": "1", 2833 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2834 "SampleAfterValue": "100003", 2835 "UMask": "0x1" 2836 }, 2837 { 2838 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 2839 "Counter": "0,1,2,3", 2840 "CounterHTOff": "0,1,2,3", 2841 "EventCode": "0xB7, 0xBB", 2842 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2843 "MSRIndex": "0x1a6,0x1a7", 2844 "MSRValue": "0x0410000122", 2845 "Offcore": "1", 2846 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2847 "SampleAfterValue": "100003", 2848 "UMask": "0x1" 2849 }, 2850 { 2851 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 2852 "Counter": "0,1,2,3", 2853 "CounterHTOff": "0,1,2,3", 2854 "EventCode": "0xB7, 0xBB", 2855 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2856 "MSRIndex": "0x1a6,0x1a7", 2857 "MSRValue": "0x1004000001", 2858 "Offcore": "1", 2859 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2860 "SampleAfterValue": "100003", 2861 "UMask": "0x1" 2862 }, 2863 { 2864 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2865 "Counter": "0,1,2,3", 2866 "CounterHTOff": "0,1,2,3", 2867 "Deprecated": "1", 2868 "EventCode": "0xB7, 0xBB", 2869 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 2870 "MSRIndex": "0x1a6,0x1a7", 2871 "MSRValue": "0x3F90000080", 2872 "Offcore": "1", 2873 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2874 "SampleAfterValue": "100003", 2875 "UMask": "0x1" 2876 }, 2877 { 2878 "BriefDescription": "ALL_RFO & L3_MISS & REMOTE_HIT_FORWARD", 2879 "Counter": "0,1,2,3", 2880 "CounterHTOff": "0,1,2,3", 2881 "EventCode": "0xB7, 0xBB", 2882 "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 2883 "MSRIndex": "0x1a6,0x1a7", 2884 "MSRValue": "0x083FC00122", 2885 "Offcore": "1", 2886 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2887 "SampleAfterValue": "100003", 2888 "UMask": "0x1" 2889 }, 2890 { 2891 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2892 "Counter": "0,1,2,3", 2893 "CounterHTOff": "0,1,2,3", 2894 "Deprecated": "1", 2895 "EventCode": "0xB7, 0xBB", 2896 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2897 "MSRIndex": "0x1a6,0x1a7", 2898 "MSRValue": "0x0810000010", 2899 "Offcore": "1", 2900 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2901 "SampleAfterValue": "100003", 2902 "UMask": "0x1" 2903 }, 2904 { 2905 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 2906 "Counter": "0,1,2,3", 2907 "CounterHTOff": "0,1,2,3", 2908 "EventCode": "0xB7, 0xBB", 2909 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2910 "MSRIndex": "0x1a6,0x1a7", 2911 "MSRValue": "0x063B8007F7", 2912 "Offcore": "1", 2913 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2914 "SampleAfterValue": "100003", 2915 "UMask": "0x1" 2916 }, 2917 { 2918 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 2919 "Counter": "0,1,2,3", 2920 "CounterHTOff": "0,1,2,3", 2921 "EventCode": "0xB7, 0xBB", 2922 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 2923 "MSRIndex": "0x1a6,0x1a7", 2924 "MSRValue": "0x0810000122", 2925 "Offcore": "1", 2926 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2927 "SampleAfterValue": "100003", 2928 "UMask": "0x1" 2929 }, 2930 { 2931 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & NO_SNOOP_NEEDED", 2932 "Counter": "0,1,2,3", 2933 "CounterHTOff": "0,1,2,3", 2934 "EventCode": "0xB7, 0xBB", 2935 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 2936 "MSRIndex": "0x1a6,0x1a7", 2937 "MSRValue": "0x013C000010", 2938 "Offcore": "1", 2939 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2940 "SampleAfterValue": "100003", 2941 "UMask": "0x1" 2942 }, 2943 { 2944 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 2945 "Counter": "0,1,2,3", 2946 "CounterHTOff": "0,1,2,3", 2947 "EventCode": "0xB7, 0xBB", 2948 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 2949 "MSRIndex": "0x1a6,0x1a7", 2950 "MSRValue": "0x0410000020", 2951 "Offcore": "1", 2952 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2953 "SampleAfterValue": "100003", 2954 "UMask": "0x1" 2955 }, 2956 { 2957 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 2958 "Counter": "0,1,2,3", 2959 "CounterHTOff": "0,1,2,3", 2960 "EventCode": "0xB7, 0xBB", 2961 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 2962 "MSRIndex": "0x1a6,0x1a7", 2963 "MSRValue": "0x0804000002", 2964 "Offcore": "1", 2965 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2966 "SampleAfterValue": "100003", 2967 "UMask": "0x1" 2968 }, 2969 { 2970 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2971 "Counter": "0,1,2,3", 2972 "CounterHTOff": "0,1,2,3", 2973 "Deprecated": "1", 2974 "EventCode": "0xB7, 0xBB", 2975 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 2976 "MSRIndex": "0x1a6,0x1a7", 2977 "MSRValue": "0x1004000004", 2978 "Offcore": "1", 2979 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2980 "SampleAfterValue": "100003", 2981 "UMask": "0x1" 2982 }, 2983 { 2984 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 2985 "Counter": "0,1,2,3", 2986 "CounterHTOff": "0,1,2,3", 2987 "EventCode": "0xB7, 0xBB", 2988 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 2989 "MSRIndex": "0x1a6,0x1a7", 2990 "MSRValue": "0x0104000490", 2991 "Offcore": "1", 2992 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 2993 "SampleAfterValue": "100003", 2994 "UMask": "0x1" 2995 }, 2996 { 2997 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 2998 "Counter": "0,1,2,3", 2999 "CounterHTOff": "0,1,2,3", 3000 "Deprecated": "1", 3001 "EventCode": "0xB7, 0xBB", 3002 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3003 "MSRIndex": "0x1a6,0x1a7", 3004 "MSRValue": "0x063B800080", 3005 "Offcore": "1", 3006 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3007 "SampleAfterValue": "100003", 3008 "UMask": "0x1" 3009 }, 3010 { 3011 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 3012 "Counter": "0,1,2,3", 3013 "CounterHTOff": "0,1,2,3", 3014 "Deprecated": "1", 3015 "EventCode": "0xB7, 0xBB", 3016 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.ANY_SNOOP", 3017 "MSRIndex": "0x1a6,0x1a7", 3018 "MSRValue": "0x3FBC000122", 3019 "Offcore": "1", 3020 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3021 "SampleAfterValue": "100003", 3022 "UMask": "0x1" 3023 }, 3024 { 3025 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3026 "Counter": "0,1,2,3", 3027 "CounterHTOff": "0,1,2,3", 3028 "Deprecated": "1", 3029 "EventCode": "0xB7, 0xBB", 3030 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3031 "MSRIndex": "0x1a6,0x1a7", 3032 "MSRValue": "0x0604000100", 3033 "Offcore": "1", 3034 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3035 "SampleAfterValue": "100003", 3036 "UMask": "0x1" 3037 }, 3038 { 3039 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3040 "Counter": "0,1,2,3", 3041 "CounterHTOff": "0,1,2,3", 3042 "Deprecated": "1", 3043 "EventCode": "0xB7, 0xBB", 3044 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3045 "MSRIndex": "0x1a6,0x1a7", 3046 "MSRValue": "0x0404008000", 3047 "Offcore": "1", 3048 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3049 "SampleAfterValue": "100003", 3050 "UMask": "0x1" 3051 }, 3052 { 3053 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 3054 "Counter": "0,1,2,3", 3055 "CounterHTOff": "0,1,2,3", 3056 "EventCode": "0xB7, 0xBB", 3057 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 3058 "MSRIndex": "0x1a6,0x1a7", 3059 "MSRValue": "0x0810000100", 3060 "Offcore": "1", 3061 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3062 "SampleAfterValue": "100003", 3063 "UMask": "0x1" 3064 }, 3065 { 3066 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3067 "Counter": "0,1,2,3", 3068 "CounterHTOff": "0,1,2,3", 3069 "Deprecated": "1", 3070 "EventCode": "0xB7, 0xBB", 3071 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 3072 "MSRIndex": "0x1a6,0x1a7", 3073 "MSRValue": "0x013C000490", 3074 "Offcore": "1", 3075 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3076 "SampleAfterValue": "100003", 3077 "UMask": "0x1" 3078 }, 3079 { 3080 "BriefDescription": "Counts demand data reads", 3081 "Counter": "0,1,2,3", 3082 "CounterHTOff": "0,1,2,3", 3083 "EventCode": "0xB7, 0xBB", 3084 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3085 "MSRIndex": "0x1a6,0x1a7", 3086 "MSRValue": "0x0204000001", 3087 "Offcore": "1", 3088 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3089 "SampleAfterValue": "100003", 3090 "UMask": "0x1" 3091 }, 3092 { 3093 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3094 "Counter": "0,1,2,3", 3095 "CounterHTOff": "0,1,2,3", 3096 "Deprecated": "1", 3097 "EventCode": "0xB7, 0xBB", 3098 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP", 3099 "MSRIndex": "0x1a6,0x1a7", 3100 "MSRValue": "0x3FBC000400", 3101 "Offcore": "1", 3102 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3103 "SampleAfterValue": "100003", 3104 "UMask": "0x1" 3105 }, 3106 { 3107 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & HITM_OTHER_CORE", 3108 "Counter": "0,1,2,3", 3109 "CounterHTOff": "0,1,2,3", 3110 "EventCode": "0xB7, 0xBB", 3111 "EventName": "OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE", 3112 "MSRIndex": "0x1a6,0x1a7", 3113 "MSRValue": "0x103C000100", 3114 "Offcore": "1", 3115 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3116 "SampleAfterValue": "100003", 3117 "UMask": "0x1" 3118 }, 3119 { 3120 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 3121 "Counter": "0,1,2,3", 3122 "CounterHTOff": "0,1,2,3", 3123 "EventCode": "0xB7, 0xBB", 3124 "EventName": "OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3125 "MSRIndex": "0x1a6,0x1a7", 3126 "MSRValue": "0x063B808000", 3127 "Offcore": "1", 3128 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3129 "SampleAfterValue": "100003", 3130 "UMask": "0x1" 3131 }, 3132 { 3133 "BriefDescription": "Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero.", 3134 "Counter": "0,1,2,3", 3135 "CounterHTOff": "0,1,2,3,4,5,6,7", 3136 "EventCode": "0x54", 3137 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", 3138 "PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.", 3139 "SampleAfterValue": "2000003", 3140 "UMask": "0x8" 3141 }, 3142 { 3143 "BriefDescription": "Counts any other requests", 3144 "Counter": "0,1,2,3", 3145 "CounterHTOff": "0,1,2,3", 3146 "EventCode": "0xB7, 0xBB", 3147 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3148 "MSRIndex": "0x1a6,0x1a7", 3149 "MSRValue": "0x0084008000", 3150 "Offcore": "1", 3151 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3152 "SampleAfterValue": "100003", 3153 "UMask": "0x1" 3154 }, 3155 { 3156 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3157 "Counter": "0,1,2,3", 3158 "CounterHTOff": "0,1,2,3", 3159 "Deprecated": "1", 3160 "EventCode": "0xB7, 0xBB", 3161 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3162 "MSRIndex": "0x1a6,0x1a7", 3163 "MSRValue": "0x1004000001", 3164 "Offcore": "1", 3165 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3166 "SampleAfterValue": "100003", 3167 "UMask": "0x1" 3168 }, 3169 { 3170 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3171 "Counter": "0,1,2,3", 3172 "CounterHTOff": "0,1,2,3", 3173 "Deprecated": "1", 3174 "EventCode": "0xB7, 0xBB", 3175 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3176 "MSRIndex": "0x1a6,0x1a7", 3177 "MSRValue": "0x1004000100", 3178 "Offcore": "1", 3179 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3180 "SampleAfterValue": "100003", 3181 "UMask": "0x1" 3182 }, 3183 { 3184 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 3185 "Counter": "0,1,2,3", 3186 "CounterHTOff": "0,1,2,3", 3187 "Deprecated": "1", 3188 "EventCode": "0xB7, 0xBB", 3189 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 3190 "MSRIndex": "0x1a6,0x1a7", 3191 "MSRValue": "0x103C000002", 3192 "Offcore": "1", 3193 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3194 "SampleAfterValue": "100003", 3195 "UMask": "0x1" 3196 }, 3197 { 3198 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 3199 "Counter": "0,1,2,3", 3200 "CounterHTOff": "0,1,2,3", 3201 "EventCode": "0xB7, 0xBB", 3202 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3203 "MSRIndex": "0x1a6,0x1a7", 3204 "MSRValue": "0x0604000491", 3205 "Offcore": "1", 3206 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3207 "SampleAfterValue": "100003", 3208 "UMask": "0x1" 3209 }, 3210 { 3211 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3212 "Counter": "0,1,2,3", 3213 "CounterHTOff": "0,1,2,3", 3214 "Deprecated": "1", 3215 "EventCode": "0xB7, 0xBB", 3216 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3217 "MSRIndex": "0x1a6,0x1a7", 3218 "MSRValue": "0x0210000120", 3219 "Offcore": "1", 3220 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3221 "SampleAfterValue": "100003", 3222 "UMask": "0x1" 3223 }, 3224 { 3225 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & HIT_OTHER_CORE_FWD", 3226 "Counter": "0,1,2,3", 3227 "CounterHTOff": "0,1,2,3", 3228 "EventCode": "0xB7, 0xBB", 3229 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 3230 "MSRIndex": "0x1a6,0x1a7", 3231 "MSRValue": "0x083C000490", 3232 "Offcore": "1", 3233 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3234 "SampleAfterValue": "100003", 3235 "UMask": "0x1" 3236 }, 3237 { 3238 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 3239 "Counter": "0,1,2,3", 3240 "CounterHTOff": "0,1,2,3", 3241 "EventCode": "0xB7, 0xBB", 3242 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3243 "MSRIndex": "0x1a6,0x1a7", 3244 "MSRValue": "0x3F90000001", 3245 "Offcore": "1", 3246 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3247 "SampleAfterValue": "100003", 3248 "UMask": "0x1" 3249 }, 3250 { 3251 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3252 "Counter": "0,1,2,3", 3253 "CounterHTOff": "0,1,2,3", 3254 "Deprecated": "1", 3255 "EventCode": "0xB7, 0xBB", 3256 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3257 "MSRIndex": "0x1a6,0x1a7", 3258 "MSRValue": "0x043C000004", 3259 "Offcore": "1", 3260 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3261 "SampleAfterValue": "100003", 3262 "UMask": "0x1" 3263 }, 3264 { 3265 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3266 "Counter": "0,1,2,3", 3267 "CounterHTOff": "0,1,2,3", 3268 "Deprecated": "1", 3269 "EventCode": "0xB7, 0xBB", 3270 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3271 "MSRIndex": "0x1a6,0x1a7", 3272 "MSRValue": "0x1004000491", 3273 "Offcore": "1", 3274 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3275 "SampleAfterValue": "100003", 3276 "UMask": "0x1" 3277 }, 3278 { 3279 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3280 "Counter": "0,1,2,3", 3281 "CounterHTOff": "0,1,2,3", 3282 "Deprecated": "1", 3283 "EventCode": "0xB7, 0xBB", 3284 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3285 "MSRIndex": "0x1a6,0x1a7", 3286 "MSRValue": "0x0084000490", 3287 "Offcore": "1", 3288 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3289 "SampleAfterValue": "100003", 3290 "UMask": "0x1" 3291 }, 3292 { 3293 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 3294 "Counter": "0,1,2,3", 3295 "CounterHTOff": "0,1,2,3", 3296 "EventCode": "0xB7, 0xBB", 3297 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3298 "MSRIndex": "0x1a6,0x1a7", 3299 "MSRValue": "0x3F90000010", 3300 "Offcore": "1", 3301 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3302 "SampleAfterValue": "100003", 3303 "UMask": "0x1" 3304 }, 3305 { 3306 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 3307 "Counter": "0,1,2,3", 3308 "CounterHTOff": "0,1,2,3", 3309 "Deprecated": "1", 3310 "EventCode": "0xB7, 0xBB", 3311 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 3312 "MSRIndex": "0x1a6,0x1a7", 3313 "MSRValue": "0x083FC007F7", 3314 "Offcore": "1", 3315 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3316 "SampleAfterValue": "100003", 3317 "UMask": "0x1" 3318 }, 3319 { 3320 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3321 "Counter": "0,1,2,3", 3322 "CounterHTOff": "0,1,2,3", 3323 "Deprecated": "1", 3324 "EventCode": "0xB7, 0xBB", 3325 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 3326 "MSRIndex": "0x1a6,0x1a7", 3327 "MSRValue": "0x0604008000", 3328 "Offcore": "1", 3329 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3330 "SampleAfterValue": "100003", 3331 "UMask": "0x1" 3332 }, 3333 { 3334 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3335 "Counter": "0,1,2,3", 3336 "CounterHTOff": "0,1,2,3", 3337 "Deprecated": "1", 3338 "EventCode": "0xB7, 0xBB", 3339 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3340 "MSRIndex": "0x1a6,0x1a7", 3341 "MSRValue": "0x0084000010", 3342 "Offcore": "1", 3343 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3344 "SampleAfterValue": "100003", 3345 "UMask": "0x1" 3346 }, 3347 { 3348 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3349 "Counter": "0,1,2,3", 3350 "CounterHTOff": "0,1,2,3", 3351 "Deprecated": "1", 3352 "EventCode": "0xB7, 0xBB", 3353 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3354 "MSRIndex": "0x1a6,0x1a7", 3355 "MSRValue": "0x0204000002", 3356 "Offcore": "1", 3357 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3358 "SampleAfterValue": "100003", 3359 "UMask": "0x1" 3360 }, 3361 { 3362 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HITM", 3363 "Counter": "0,1,2,3", 3364 "CounterHTOff": "0,1,2,3", 3365 "Deprecated": "1", 3366 "EventCode": "0xB7, 0xBB", 3367 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HITM", 3368 "MSRIndex": "0x1a6,0x1a7", 3369 "MSRValue": "0x103FC007F7", 3370 "Offcore": "1", 3371 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3372 "SampleAfterValue": "100003", 3373 "UMask": "0x1" 3374 }, 3375 { 3376 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & SNOOP_NONE", 3377 "Counter": "0,1,2,3", 3378 "CounterHTOff": "0,1,2,3", 3379 "EventCode": "0xB7, 0xBB", 3380 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 3381 "MSRIndex": "0x1a6,0x1a7", 3382 "MSRValue": "0x00BC000001", 3383 "Offcore": "1", 3384 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3385 "SampleAfterValue": "100003", 3386 "UMask": "0x1" 3387 }, 3388 { 3389 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 3390 "Counter": "0,1,2,3", 3391 "CounterHTOff": "0,1,2,3", 3392 "Deprecated": "1", 3393 "EventCode": "0xB7, 0xBB", 3394 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_MISS", 3395 "MSRIndex": "0x1a6,0x1a7", 3396 "MSRValue": "0x023C000122", 3397 "Offcore": "1", 3398 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3399 "SampleAfterValue": "100003", 3400 "UMask": "0x1" 3401 }, 3402 { 3403 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 3404 "Counter": "0,1,2,3", 3405 "CounterHTOff": "0,1,2,3", 3406 "EventCode": "0xB7, 0xBB", 3407 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3408 "MSRIndex": "0x1a6,0x1a7", 3409 "MSRValue": "0x0210000080", 3410 "Offcore": "1", 3411 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3412 "SampleAfterValue": "100003", 3413 "UMask": "0x1" 3414 }, 3415 { 3416 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 3417 "Counter": "0,1,2,3", 3418 "CounterHTOff": "0,1,2,3", 3419 "EventCode": "0xB7, 0xBB", 3420 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3421 "MSRIndex": "0x1a6,0x1a7", 3422 "MSRValue": "0x0410000100", 3423 "Offcore": "1", 3424 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3425 "SampleAfterValue": "100003", 3426 "UMask": "0x1" 3427 }, 3428 { 3429 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 3430 "Counter": "0,1,2,3", 3431 "CounterHTOff": "0,1,2,3", 3432 "EventCode": "0xB7, 0xBB", 3433 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3434 "MSRIndex": "0x1a6,0x1a7", 3435 "MSRValue": "0x0404000004", 3436 "Offcore": "1", 3437 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3438 "SampleAfterValue": "100003", 3439 "UMask": "0x1" 3440 }, 3441 { 3442 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3443 "Counter": "0,1,2,3", 3444 "CounterHTOff": "0,1,2,3", 3445 "Deprecated": "1", 3446 "EventCode": "0xB7, 0xBB", 3447 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3448 "MSRIndex": "0x1a6,0x1a7", 3449 "MSRValue": "0x0084000491", 3450 "Offcore": "1", 3451 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3452 "SampleAfterValue": "100003", 3453 "UMask": "0x1" 3454 }, 3455 { 3456 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 3457 "Counter": "0,1,2,3", 3458 "CounterHTOff": "0,1,2,3", 3459 "Deprecated": "1", 3460 "EventCode": "0xB7, 0xBB", 3461 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE", 3462 "MSRIndex": "0x1a6,0x1a7", 3463 "MSRValue": "0x00BC000002", 3464 "Offcore": "1", 3465 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3466 "SampleAfterValue": "100003", 3467 "UMask": "0x1" 3468 }, 3469 { 3470 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3471 "Counter": "0,1,2,3", 3472 "CounterHTOff": "0,1,2,3", 3473 "Deprecated": "1", 3474 "EventCode": "0xB7, 0xBB", 3475 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3476 "MSRIndex": "0x1a6,0x1a7", 3477 "MSRValue": "0x063B808000", 3478 "Offcore": "1", 3479 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3480 "SampleAfterValue": "100003", 3481 "UMask": "0x1" 3482 }, 3483 { 3484 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & HIT_OTHER_CORE_NO_FWD", 3485 "Counter": "0,1,2,3", 3486 "CounterHTOff": "0,1,2,3", 3487 "EventCode": "0xB7, 0xBB", 3488 "EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3489 "MSRIndex": "0x1a6,0x1a7", 3490 "MSRValue": "0x043C000002", 3491 "Offcore": "1", 3492 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3493 "SampleAfterValue": "100003", 3494 "UMask": "0x1" 3495 }, 3496 { 3497 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3498 "Counter": "0,1,2,3", 3499 "CounterHTOff": "0,1,2,3", 3500 "Deprecated": "1", 3501 "EventCode": "0xB7, 0xBB", 3502 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3503 "MSRIndex": "0x1a6,0x1a7", 3504 "MSRValue": "0x0804000002", 3505 "Offcore": "1", 3506 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3507 "SampleAfterValue": "100003", 3508 "UMask": "0x1" 3509 }, 3510 { 3511 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3512 "Counter": "0,1,2,3", 3513 "CounterHTOff": "0,1,2,3", 3514 "Deprecated": "1", 3515 "EventCode": "0xB7, 0xBB", 3516 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3517 "MSRIndex": "0x1a6,0x1a7", 3518 "MSRValue": "0x3F84000010", 3519 "Offcore": "1", 3520 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3521 "SampleAfterValue": "100003", 3522 "UMask": "0x1" 3523 }, 3524 { 3525 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 3526 "Counter": "0,1,2,3", 3527 "CounterHTOff": "0,1,2,3", 3528 "EventCode": "0xB7, 0xBB", 3529 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3530 "MSRIndex": "0x1a6,0x1a7", 3531 "MSRValue": "0x1004000490", 3532 "Offcore": "1", 3533 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3534 "SampleAfterValue": "100003", 3535 "UMask": "0x1" 3536 }, 3537 { 3538 "BriefDescription": "Counts any other requests OTHER & L3_MISS & REMOTE_HIT_FORWARD", 3539 "Counter": "0,1,2,3", 3540 "CounterHTOff": "0,1,2,3", 3541 "EventCode": "0xB7, 0xBB", 3542 "EventName": "OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 3543 "MSRIndex": "0x1a6,0x1a7", 3544 "MSRValue": "0x083FC08000", 3545 "Offcore": "1", 3546 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3547 "SampleAfterValue": "100003", 3548 "UMask": "0x1" 3549 }, 3550 { 3551 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 3552 "Counter": "0,1,2,3", 3553 "CounterHTOff": "0,1,2,3", 3554 "EventCode": "0xB7, 0xBB", 3555 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 3556 "MSRIndex": "0x1a6,0x1a7", 3557 "MSRValue": "0x063B800002", 3558 "Offcore": "1", 3559 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3560 "SampleAfterValue": "100003", 3561 "UMask": "0x1" 3562 }, 3563 { 3564 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 3565 "Counter": "0,1,2,3", 3566 "CounterHTOff": "0,1,2,3", 3567 "EventCode": "0xB7, 0xBB", 3568 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3569 "MSRIndex": "0x1a6,0x1a7", 3570 "MSRValue": "0x1004000020", 3571 "Offcore": "1", 3572 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3573 "SampleAfterValue": "100003", 3574 "UMask": "0x1" 3575 }, 3576 { 3577 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3578 "Counter": "0,1,2,3", 3579 "CounterHTOff": "0,1,2,3", 3580 "Deprecated": "1", 3581 "EventCode": "0xB7, 0xBB", 3582 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3583 "MSRIndex": "0x1a6,0x1a7", 3584 "MSRValue": "0x0084000001", 3585 "Offcore": "1", 3586 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3587 "SampleAfterValue": "100003", 3588 "UMask": "0x1" 3589 }, 3590 { 3591 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 3592 "Counter": "0,1,2,3", 3593 "CounterHTOff": "0,1,2,3", 3594 "EventCode": "0xB7, 0xBB", 3595 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 3596 "MSRIndex": "0x1a6,0x1a7", 3597 "MSRValue": "0x0404000002", 3598 "Offcore": "1", 3599 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3600 "SampleAfterValue": "100003", 3601 "UMask": "0x1" 3602 }, 3603 { 3604 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 3605 "Counter": "0,1,2,3", 3606 "CounterHTOff": "0,1,2,3", 3607 "EventCode": "0xB7, 0xBB", 3608 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3609 "MSRIndex": "0x1a6,0x1a7", 3610 "MSRValue": "0x3F90000120", 3611 "Offcore": "1", 3612 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3613 "SampleAfterValue": "100003", 3614 "UMask": "0x1" 3615 }, 3616 { 3617 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 3618 "Counter": "0,1,2,3", 3619 "CounterHTOff": "0,1,2,3", 3620 "EventCode": "0xB7, 0xBB", 3621 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 3622 "MSRIndex": "0x1a6,0x1a7", 3623 "MSRValue": "0x10100007F7", 3624 "Offcore": "1", 3625 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3626 "SampleAfterValue": "100003", 3627 "UMask": "0x1" 3628 }, 3629 { 3630 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3631 "Counter": "0,1,2,3", 3632 "CounterHTOff": "0,1,2,3", 3633 "EventCode": "0xB7, 0xBB", 3634 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 3635 "MSRIndex": "0x1a6,0x1a7", 3636 "MSRValue": "0x0084000400", 3637 "Offcore": "1", 3638 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3639 "SampleAfterValue": "100003", 3640 "UMask": "0x1" 3641 }, 3642 { 3643 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3644 "Counter": "0,1,2,3", 3645 "CounterHTOff": "0,1,2,3", 3646 "Deprecated": "1", 3647 "EventCode": "0xB7, 0xBB", 3648 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3649 "MSRIndex": "0x1a6,0x1a7", 3650 "MSRValue": "0x3F90000100", 3651 "Offcore": "1", 3652 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3653 "SampleAfterValue": "100003", 3654 "UMask": "0x1" 3655 }, 3656 { 3657 "BriefDescription": "Counts all demand data writes (RFOs)", 3658 "Counter": "0,1,2,3", 3659 "CounterHTOff": "0,1,2,3", 3660 "EventCode": "0xB7, 0xBB", 3661 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 3662 "MSRIndex": "0x1a6,0x1a7", 3663 "MSRValue": "0x0204000002", 3664 "Offcore": "1", 3665 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3666 "SampleAfterValue": "100003", 3667 "UMask": "0x1" 3668 }, 3669 { 3670 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 3671 "Counter": "0,1,2,3", 3672 "CounterHTOff": "0,1,2,3", 3673 "Deprecated": "1", 3674 "EventCode": "0xB7, 0xBB", 3675 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.ANY_SNOOP", 3676 "MSRIndex": "0x1a6,0x1a7", 3677 "MSRValue": "0x3FBC000002", 3678 "Offcore": "1", 3679 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3680 "SampleAfterValue": "100003", 3681 "UMask": "0x1" 3682 }, 3683 { 3684 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 3685 "Counter": "0,1,2,3", 3686 "CounterHTOff": "0,1,2,3", 3687 "Deprecated": "1", 3688 "EventCode": "0xB7, 0xBB", 3689 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 3690 "MSRIndex": "0x1a6,0x1a7", 3691 "MSRValue": "0x103FC00080", 3692 "Offcore": "1", 3693 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3694 "SampleAfterValue": "100003", 3695 "UMask": "0x1" 3696 }, 3697 { 3698 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3699 "Counter": "0,1,2,3", 3700 "CounterHTOff": "0,1,2,3", 3701 "Deprecated": "1", 3702 "EventCode": "0xB7, 0xBB", 3703 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3704 "MSRIndex": "0x1a6,0x1a7", 3705 "MSRValue": "0x08040007F7", 3706 "Offcore": "1", 3707 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3708 "SampleAfterValue": "100003", 3709 "UMask": "0x1" 3710 }, 3711 { 3712 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3713 "Counter": "0,1,2,3", 3714 "CounterHTOff": "0,1,2,3", 3715 "Deprecated": "1", 3716 "EventCode": "0xB7, 0xBB", 3717 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3718 "MSRIndex": "0x1a6,0x1a7", 3719 "MSRValue": "0x0090000100", 3720 "Offcore": "1", 3721 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3722 "SampleAfterValue": "100003", 3723 "UMask": "0x1" 3724 }, 3725 { 3726 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests", 3727 "Counter": "0,1,2,3", 3728 "CounterHTOff": "0,1,2,3", 3729 "EventCode": "0xB7, 0xBB", 3730 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3731 "MSRIndex": "0x1a6,0x1a7", 3732 "MSRValue": "0x0090000400", 3733 "Offcore": "1", 3734 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3735 "SampleAfterValue": "100003", 3736 "UMask": "0x1" 3737 }, 3738 { 3739 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3740 "Counter": "0,1,2,3", 3741 "CounterHTOff": "0,1,2,3", 3742 "Deprecated": "1", 3743 "EventCode": "0xB7, 0xBB", 3744 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 3745 "MSRIndex": "0x1a6,0x1a7", 3746 "MSRValue": "0x0090000020", 3747 "Offcore": "1", 3748 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3749 "SampleAfterValue": "100003", 3750 "UMask": "0x1" 3751 }, 3752 { 3753 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3754 "Counter": "0,1,2,3", 3755 "CounterHTOff": "0,1,2,3", 3756 "Deprecated": "1", 3757 "EventCode": "0xB7, 0xBB", 3758 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3759 "MSRIndex": "0x1a6,0x1a7", 3760 "MSRValue": "0x3F90008000", 3761 "Offcore": "1", 3762 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3763 "SampleAfterValue": "100003", 3764 "UMask": "0x1" 3765 }, 3766 { 3767 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 3768 "Counter": "0,1,2,3", 3769 "CounterHTOff": "0,1,2,3", 3770 "Deprecated": "1", 3771 "EventCode": "0xB7, 0xBB", 3772 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 3773 "MSRIndex": "0x1a6,0x1a7", 3774 "MSRValue": "0x103FC00491", 3775 "Offcore": "1", 3776 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3777 "SampleAfterValue": "100003", 3778 "UMask": "0x1" 3779 }, 3780 { 3781 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 3782 "Counter": "0,1,2,3", 3783 "CounterHTOff": "0,1,2,3", 3784 "EventCode": "0xB7, 0xBB", 3785 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3786 "MSRIndex": "0x1a6,0x1a7", 3787 "MSRValue": "0x3F84000004", 3788 "Offcore": "1", 3789 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3790 "SampleAfterValue": "100003", 3791 "UMask": "0x1" 3792 }, 3793 { 3794 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 3795 "Counter": "0,1,2,3", 3796 "CounterHTOff": "0,1,2,3", 3797 "EventCode": "0xB7, 0xBB", 3798 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 3799 "MSRIndex": "0x1a6,0x1a7", 3800 "MSRValue": "0x0410008000", 3801 "Offcore": "1", 3802 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3803 "SampleAfterValue": "100003", 3804 "UMask": "0x1" 3805 }, 3806 { 3807 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 3808 "Counter": "0,1,2,3", 3809 "CounterHTOff": "0,1,2,3", 3810 "EventCode": "0xB7, 0xBB", 3811 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3812 "MSRIndex": "0x1a6,0x1a7", 3813 "MSRValue": "0x1004000004", 3814 "Offcore": "1", 3815 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3816 "SampleAfterValue": "100003", 3817 "UMask": "0x1" 3818 }, 3819 { 3820 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3821 "Counter": "0,1,2,3", 3822 "CounterHTOff": "0,1,2,3", 3823 "Deprecated": "1", 3824 "EventCode": "0xB7, 0xBB", 3825 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 3826 "MSRIndex": "0x1a6,0x1a7", 3827 "MSRValue": "0x043C000120", 3828 "Offcore": "1", 3829 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3830 "SampleAfterValue": "100003", 3831 "UMask": "0x1" 3832 }, 3833 { 3834 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3835 "Counter": "0,1,2,3", 3836 "CounterHTOff": "0,1,2,3", 3837 "Deprecated": "1", 3838 "EventCode": "0xB7, 0xBB", 3839 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 3840 "MSRIndex": "0x1a6,0x1a7", 3841 "MSRValue": "0x103C000001", 3842 "Offcore": "1", 3843 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3844 "SampleAfterValue": "100003", 3845 "UMask": "0x1" 3846 }, 3847 { 3848 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3849 "Counter": "0,1,2,3", 3850 "CounterHTOff": "0,1,2,3", 3851 "Deprecated": "1", 3852 "EventCode": "0xB7, 0xBB", 3853 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3854 "MSRIndex": "0x1a6,0x1a7", 3855 "MSRValue": "0x01100007F7", 3856 "Offcore": "1", 3857 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3858 "SampleAfterValue": "100003", 3859 "UMask": "0x1" 3860 }, 3861 { 3862 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 3863 "Counter": "0,1,2,3", 3864 "CounterHTOff": "0,1,2,3", 3865 "EventCode": "0xB7, 0xBB", 3866 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 3867 "MSRIndex": "0x1a6,0x1a7", 3868 "MSRValue": "0x3F84000001", 3869 "Offcore": "1", 3870 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3871 "SampleAfterValue": "100003", 3872 "UMask": "0x1" 3873 }, 3874 { 3875 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3876 "Counter": "0,1,2,3", 3877 "CounterHTOff": "0,1,2,3", 3878 "Deprecated": "1", 3879 "EventCode": "0xB7, 0xBB", 3880 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 3881 "MSRIndex": "0x1a6,0x1a7", 3882 "MSRValue": "0x1004000010", 3883 "Offcore": "1", 3884 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3885 "SampleAfterValue": "100003", 3886 "UMask": "0x1" 3887 }, 3888 { 3889 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 3890 "Counter": "0,1,2,3", 3891 "CounterHTOff": "0,1,2,3", 3892 "EventCode": "0xB7, 0xBB", 3893 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 3894 "MSRIndex": "0x1a6,0x1a7", 3895 "MSRValue": "0x3F90000080", 3896 "Offcore": "1", 3897 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3898 "SampleAfterValue": "100003", 3899 "UMask": "0x1" 3900 }, 3901 { 3902 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 3903 "Counter": "0,1,2,3", 3904 "CounterHTOff": "0,1,2,3", 3905 "EventCode": "0xB7, 0xBB", 3906 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3907 "MSRIndex": "0x1a6,0x1a7", 3908 "MSRValue": "0x0804008000", 3909 "Offcore": "1", 3910 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3911 "SampleAfterValue": "100003", 3912 "UMask": "0x1" 3913 }, 3914 { 3915 "BriefDescription": "Counts demand data reads", 3916 "Counter": "0,1,2,3", 3917 "CounterHTOff": "0,1,2,3", 3918 "EventCode": "0xB7, 0xBB", 3919 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 3920 "MSRIndex": "0x1a6,0x1a7", 3921 "MSRValue": "0x0210000001", 3922 "Offcore": "1", 3923 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3924 "SampleAfterValue": "100003", 3925 "UMask": "0x1" 3926 }, 3927 { 3928 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & NO_SNOOP_NEEDED", 3929 "Counter": "0,1,2,3", 3930 "CounterHTOff": "0,1,2,3", 3931 "EventCode": "0xB7, 0xBB", 3932 "EventName": "OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 3933 "MSRIndex": "0x1a6,0x1a7", 3934 "MSRValue": "0x013C000020", 3935 "Offcore": "1", 3936 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3937 "SampleAfterValue": "100003", 3938 "UMask": "0x1" 3939 }, 3940 { 3941 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 3942 "Counter": "0,1,2,3", 3943 "CounterHTOff": "0,1,2,3", 3944 "EventCode": "0xB7, 0xBB", 3945 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 3946 "MSRIndex": "0x1a6,0x1a7", 3947 "MSRValue": "0x0110000080", 3948 "Offcore": "1", 3949 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3950 "SampleAfterValue": "100003", 3951 "UMask": "0x1" 3952 }, 3953 { 3954 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3955 "Counter": "0,1,2,3", 3956 "CounterHTOff": "0,1,2,3", 3957 "Deprecated": "1", 3958 "EventCode": "0xB7, 0xBB", 3959 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 3960 "MSRIndex": "0x1a6,0x1a7", 3961 "MSRValue": "0x0804000490", 3962 "Offcore": "1", 3963 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3964 "SampleAfterValue": "100003", 3965 "UMask": "0x1" 3966 }, 3967 { 3968 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3969 "Counter": "0,1,2,3", 3970 "CounterHTOff": "0,1,2,3", 3971 "Deprecated": "1", 3972 "EventCode": "0xB7, 0xBB", 3973 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 3974 "MSRIndex": "0x1a6,0x1a7", 3975 "MSRValue": "0x083C000020", 3976 "Offcore": "1", 3977 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3978 "SampleAfterValue": "100003", 3979 "UMask": "0x1" 3980 }, 3981 { 3982 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & NO_SNOOP_NEEDED", 3983 "Counter": "0,1,2,3", 3984 "CounterHTOff": "0,1,2,3", 3985 "EventCode": "0xB7, 0xBB", 3986 "EventName": "OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED", 3987 "MSRIndex": "0x1a6,0x1a7", 3988 "MSRValue": "0x013C000100", 3989 "Offcore": "1", 3990 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 3991 "SampleAfterValue": "100003", 3992 "UMask": "0x1" 3993 }, 3994 { 3995 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 3996 "Counter": "0,1,2,3", 3997 "CounterHTOff": "0,1,2,3", 3998 "Deprecated": "1", 3999 "EventCode": "0xB7, 0xBB", 4000 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE", 4001 "MSRIndex": "0x1a6,0x1a7", 4002 "MSRValue": "0x00BC000001", 4003 "Offcore": "1", 4004 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4005 "SampleAfterValue": "100003", 4006 "UMask": "0x1" 4007 }, 4008 { 4009 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4010 "Counter": "0,1,2,3", 4011 "CounterHTOff": "0,1,2,3", 4012 "Deprecated": "1", 4013 "EventCode": "0xB7, 0xBB", 4014 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4015 "MSRIndex": "0x1a6,0x1a7", 4016 "MSRValue": "0x1010000100", 4017 "Offcore": "1", 4018 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4019 "SampleAfterValue": "100003", 4020 "UMask": "0x1" 4021 }, 4022 { 4023 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4024 "Counter": "0,1,2,3", 4025 "CounterHTOff": "0,1,2,3", 4026 "Deprecated": "1", 4027 "EventCode": "0xB7, 0xBB", 4028 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.ANY_SNOOP", 4029 "MSRIndex": "0x1a6,0x1a7", 4030 "MSRValue": "0x3FBC000100", 4031 "Offcore": "1", 4032 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4033 "SampleAfterValue": "100003", 4034 "UMask": "0x1" 4035 }, 4036 { 4037 "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions", 4038 "Counter": "0,1,2,3", 4039 "CounterHTOff": "0,1,2,3,4,5,6,7", 4040 "EventCode": "0xC9", 4041 "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY", 4042 "PublicDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions.", 4043 "SampleAfterValue": "2000003", 4044 "UMask": "0x20" 4045 }, 4046 { 4047 "BriefDescription": "ALL_PF_RFO & L3_MISS & SNOOP_MISS", 4048 "Counter": "0,1,2,3", 4049 "CounterHTOff": "0,1,2,3", 4050 "EventCode": "0xB7, 0xBB", 4051 "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 4052 "MSRIndex": "0x1a6,0x1a7", 4053 "MSRValue": "0x023C000120", 4054 "Offcore": "1", 4055 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4056 "SampleAfterValue": "100003", 4057 "UMask": "0x1" 4058 }, 4059 { 4060 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4061 "Counter": "0,1,2,3", 4062 "CounterHTOff": "0,1,2,3", 4063 "Deprecated": "1", 4064 "EventCode": "0xB7, 0xBB", 4065 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4066 "MSRIndex": "0x1a6,0x1a7", 4067 "MSRValue": "0x3F90000020", 4068 "Offcore": "1", 4069 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4070 "SampleAfterValue": "100003", 4071 "UMask": "0x1" 4072 }, 4073 { 4074 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & HITM_OTHER_CORE", 4075 "Counter": "0,1,2,3", 4076 "CounterHTOff": "0,1,2,3", 4077 "EventCode": "0xB7, 0xBB", 4078 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4079 "MSRIndex": "0x1a6,0x1a7", 4080 "MSRValue": "0x103C000080", 4081 "Offcore": "1", 4082 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4083 "SampleAfterValue": "100003", 4084 "UMask": "0x1" 4085 }, 4086 { 4087 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 4088 "Counter": "0,1,2,3", 4089 "CounterHTOff": "0,1,2,3", 4090 "EventCode": "0xB7, 0xBB", 4091 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4092 "MSRIndex": "0x1a6,0x1a7", 4093 "MSRValue": "0x0090000080", 4094 "Offcore": "1", 4095 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4096 "SampleAfterValue": "100003", 4097 "UMask": "0x1" 4098 }, 4099 { 4100 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4101 "Counter": "0,1,2,3", 4102 "CounterHTOff": "0,1,2,3", 4103 "Deprecated": "1", 4104 "EventCode": "0xB7, 0xBB", 4105 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4106 "MSRIndex": "0x1a6,0x1a7", 4107 "MSRValue": "0x0210000002", 4108 "Offcore": "1", 4109 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4110 "SampleAfterValue": "100003", 4111 "UMask": "0x1" 4112 }, 4113 { 4114 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 4115 "Counter": "0,1,2,3", 4116 "CounterHTOff": "0,1,2,3", 4117 "EventCode": "0xB7, 0xBB", 4118 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 4119 "MSRIndex": "0x1a6,0x1a7", 4120 "MSRValue": "0x3F84000080", 4121 "Offcore": "1", 4122 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4123 "SampleAfterValue": "100003", 4124 "UMask": "0x1" 4125 }, 4126 { 4127 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4128 "Counter": "0,1,2,3", 4129 "CounterHTOff": "0,1,2,3", 4130 "Deprecated": "1", 4131 "EventCode": "0xB7, 0xBB", 4132 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 4133 "MSRIndex": "0x1a6,0x1a7", 4134 "MSRValue": "0x0210000490", 4135 "Offcore": "1", 4136 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4137 "SampleAfterValue": "100003", 4138 "UMask": "0x1" 4139 }, 4140 { 4141 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 4142 "Counter": "0,1,2,3", 4143 "CounterHTOff": "0,1,2,3", 4144 "EventCode": "0xB7, 0xBB", 4145 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4146 "MSRIndex": "0x1a6,0x1a7", 4147 "MSRValue": "0x0104000120", 4148 "Offcore": "1", 4149 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4150 "SampleAfterValue": "100003", 4151 "UMask": "0x1" 4152 }, 4153 { 4154 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & ANY_SNOOP", 4155 "Counter": "0,1,2,3", 4156 "CounterHTOff": "0,1,2,3", 4157 "EventCode": "0xB7, 0xBB", 4158 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 4159 "MSRIndex": "0x1a6,0x1a7", 4160 "MSRValue": "0x3FBC000004", 4161 "Offcore": "1", 4162 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4163 "SampleAfterValue": "100003", 4164 "UMask": "0x1" 4165 }, 4166 { 4167 "BriefDescription": "ALL_READS & L3_MISS & ANY_SNOOP", 4168 "Counter": "0,1,2,3", 4169 "CounterHTOff": "0,1,2,3", 4170 "EventCode": "0xB7, 0xBB", 4171 "EventName": "OCR.ALL_READS.L3_MISS.ANY_SNOOP", 4172 "MSRIndex": "0x1a6,0x1a7", 4173 "MSRValue": "0x3FBC0007F7", 4174 "Offcore": "1", 4175 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4176 "SampleAfterValue": "100003", 4177 "UMask": "0x1" 4178 }, 4179 { 4180 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4181 "Counter": "0,1,2,3", 4182 "CounterHTOff": "0,1,2,3", 4183 "Deprecated": "1", 4184 "EventCode": "0xB7, 0xBB", 4185 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4186 "MSRIndex": "0x1a6,0x1a7", 4187 "MSRValue": "0x083C000490", 4188 "Offcore": "1", 4189 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4190 "SampleAfterValue": "100003", 4191 "UMask": "0x1" 4192 }, 4193 { 4194 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 4195 "Counter": "0,1,2,3", 4196 "CounterHTOff": "0,1,2,3", 4197 "Deprecated": "1", 4198 "EventCode": "0xB7, 0xBB", 4199 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD", 4200 "MSRIndex": "0x1a6,0x1a7", 4201 "MSRValue": "0x083FC00400", 4202 "Offcore": "1", 4203 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4204 "SampleAfterValue": "100003", 4205 "UMask": "0x1" 4206 }, 4207 { 4208 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & SNOOP_NONE", 4209 "Counter": "0,1,2,3", 4210 "CounterHTOff": "0,1,2,3", 4211 "EventCode": "0xB7, 0xBB", 4212 "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 4213 "MSRIndex": "0x1a6,0x1a7", 4214 "MSRValue": "0x00BC000020", 4215 "Offcore": "1", 4216 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4217 "SampleAfterValue": "100003", 4218 "UMask": "0x1" 4219 }, 4220 { 4221 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4222 "Counter": "0,1,2,3", 4223 "CounterHTOff": "0,1,2,3", 4224 "Deprecated": "1", 4225 "EventCode": "0xB7, 0xBB", 4226 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 4227 "MSRIndex": "0x1a6,0x1a7", 4228 "MSRValue": "0x3F90000002", 4229 "Offcore": "1", 4230 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4231 "SampleAfterValue": "100003", 4232 "UMask": "0x1" 4233 }, 4234 { 4235 "BriefDescription": "Number of times an RTM execution aborted due to any reasons (multiple categories may count as one).", 4236 "Counter": "0,1,2,3", 4237 "CounterHTOff": "0,1,2,3,4,5,6,7", 4238 "EventCode": "0xC9", 4239 "EventName": "RTM_RETIRED.ABORTED", 4240 "PEBS": "1", 4241 "PublicDescription": "Number of times RTM abort was triggered.", 4242 "SampleAfterValue": "2000003", 4243 "UMask": "0x4" 4244 }, 4245 { 4246 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 4247 "Counter": "0,1,2,3", 4248 "CounterHTOff": "0,1,2,3", 4249 "EventCode": "0xB7, 0xBB", 4250 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4251 "MSRIndex": "0x1a6,0x1a7", 4252 "MSRValue": "0x0604000020", 4253 "Offcore": "1", 4254 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4255 "SampleAfterValue": "100003", 4256 "UMask": "0x1" 4257 }, 4258 { 4259 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4260 "Counter": "0,1,2,3", 4261 "CounterHTOff": "0,1,2,3", 4262 "Deprecated": "1", 4263 "EventCode": "0xB7, 0xBB", 4264 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4265 "MSRIndex": "0x1a6,0x1a7", 4266 "MSRValue": "0x0104000490", 4267 "Offcore": "1", 4268 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4269 "SampleAfterValue": "100003", 4270 "UMask": "0x1" 4271 }, 4272 { 4273 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4274 "Counter": "0,1,2,3", 4275 "CounterHTOff": "0,1,2,3", 4276 "Deprecated": "1", 4277 "EventCode": "0xB7, 0xBB", 4278 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4279 "MSRIndex": "0x1a6,0x1a7", 4280 "MSRValue": "0x043C000020", 4281 "Offcore": "1", 4282 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4283 "SampleAfterValue": "100003", 4284 "UMask": "0x1" 4285 }, 4286 { 4287 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 4288 "Counter": "0,1,2,3", 4289 "CounterHTOff": "0,1,2,3", 4290 "EventCode": "0xB7, 0xBB", 4291 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 4292 "MSRIndex": "0x1a6,0x1a7", 4293 "MSRValue": "0x0404000020", 4294 "Offcore": "1", 4295 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4296 "SampleAfterValue": "100003", 4297 "UMask": "0x1" 4298 }, 4299 { 4300 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 4301 "Counter": "0,1,2,3", 4302 "CounterHTOff": "0,1,2,3", 4303 "EventCode": "0xB7, 0xBB", 4304 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4305 "MSRIndex": "0x1a6,0x1a7", 4306 "MSRValue": "0x0604000100", 4307 "Offcore": "1", 4308 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4309 "SampleAfterValue": "100003", 4310 "UMask": "0x1" 4311 }, 4312 { 4313 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 4314 "Counter": "0,1,2,3", 4315 "CounterHTOff": "0,1,2,3", 4316 "EventCode": "0xB7, 0xBB", 4317 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4318 "MSRIndex": "0x1a6,0x1a7", 4319 "MSRValue": "0x1010008000", 4320 "Offcore": "1", 4321 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4322 "SampleAfterValue": "100003", 4323 "UMask": "0x1" 4324 }, 4325 { 4326 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE", 4327 "Counter": "0,1,2,3", 4328 "CounterHTOff": "0,1,2,3", 4329 "EventCode": "0xB7, 0xBB", 4330 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 4331 "MSRIndex": "0x1a6,0x1a7", 4332 "MSRValue": "0x0084000491", 4333 "Offcore": "1", 4334 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4335 "SampleAfterValue": "100003", 4336 "UMask": "0x1" 4337 }, 4338 { 4339 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 4340 "Counter": "0,1,2,3", 4341 "CounterHTOff": "0,1,2,3", 4342 "EventCode": "0xB7, 0xBB", 4343 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4344 "MSRIndex": "0x1a6,0x1a7", 4345 "MSRValue": "0x063B800490", 4346 "Offcore": "1", 4347 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4348 "SampleAfterValue": "100003", 4349 "UMask": "0x1" 4350 }, 4351 { 4352 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4353 "Counter": "0,1,2,3", 4354 "CounterHTOff": "0,1,2,3", 4355 "Deprecated": "1", 4356 "EventCode": "0xB7, 0xBB", 4357 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 4358 "MSRIndex": "0x1a6,0x1a7", 4359 "MSRValue": "0x0804000100", 4360 "Offcore": "1", 4361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4362 "SampleAfterValue": "100003", 4363 "UMask": "0x1" 4364 }, 4365 { 4366 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & ANY_SNOOP", 4367 "Counter": "0,1,2,3", 4368 "CounterHTOff": "0,1,2,3", 4369 "EventCode": "0xB7, 0xBB", 4370 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 4371 "MSRIndex": "0x1a6,0x1a7", 4372 "MSRValue": "0x3FBC000080", 4373 "Offcore": "1", 4374 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4375 "SampleAfterValue": "100003", 4376 "UMask": "0x1" 4377 }, 4378 { 4379 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4380 "Counter": "0,1,2,3", 4381 "CounterHTOff": "0,1,2,3", 4382 "Deprecated": "1", 4383 "EventCode": "0xB7, 0xBB", 4384 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4385 "MSRIndex": "0x1a6,0x1a7", 4386 "MSRValue": "0x0410000020", 4387 "Offcore": "1", 4388 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4389 "SampleAfterValue": "100003", 4390 "UMask": "0x1" 4391 }, 4392 { 4393 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 4394 "Counter": "0,1,2,3", 4395 "CounterHTOff": "0,1,2,3", 4396 "EventCode": "0xB7, 0xBB", 4397 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4398 "MSRIndex": "0x1a6,0x1a7", 4399 "MSRValue": "0x0604000001", 4400 "Offcore": "1", 4401 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4402 "SampleAfterValue": "100003", 4403 "UMask": "0x1" 4404 }, 4405 { 4406 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4407 "Counter": "0,1,2,3", 4408 "CounterHTOff": "0,1,2,3", 4409 "Deprecated": "1", 4410 "EventCode": "0xB7, 0xBB", 4411 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4412 "MSRIndex": "0x1a6,0x1a7", 4413 "MSRValue": "0x0410000490", 4414 "Offcore": "1", 4415 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4416 "SampleAfterValue": "100003", 4417 "UMask": "0x1" 4418 }, 4419 { 4420 "BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.", 4421 "Counter": "0,1,2,3", 4422 "CounterHTOff": "0,1,2,3,4,5,6,7", 4423 "CounterMask": "1", 4424 "EventCode": "0x60", 4425 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD", 4426 "SampleAfterValue": "2000003", 4427 "UMask": "0x10" 4428 }, 4429 { 4430 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4431 "Counter": "0,1,2,3", 4432 "CounterHTOff": "0,1,2,3", 4433 "Deprecated": "1", 4434 "EventCode": "0xB7, 0xBB", 4435 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4436 "MSRIndex": "0x1a6,0x1a7", 4437 "MSRValue": "0x083C000010", 4438 "Offcore": "1", 4439 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4440 "SampleAfterValue": "100003", 4441 "UMask": "0x1" 4442 }, 4443 { 4444 "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 4445 "Counter": "0,1,2,3", 4446 "CounterHTOff": "0,1,2,3,4,5,6,7", 4447 "Errata": "SKL089", 4448 "EventCode": "0xC3", 4449 "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", 4450 "PublicDescription": "Counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:a. memory disambiguation,b. external snoop, orc. cross SMT-HW-thread snoop (stores) hitting load buffer.", 4451 "SampleAfterValue": "100003", 4452 "UMask": "0x2" 4453 }, 4454 { 4455 "BriefDescription": "Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer", 4456 "Counter": "0,1,2,3", 4457 "CounterHTOff": "0,1,2,3,4,5,6,7", 4458 "EventCode": "0x54", 4459 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", 4460 "PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.", 4461 "SampleAfterValue": "2000003", 4462 "UMask": "0x10" 4463 }, 4464 { 4465 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4466 "Counter": "0,1,2,3", 4467 "CounterHTOff": "0,1,2,3", 4468 "Deprecated": "1", 4469 "EventCode": "0xB7, 0xBB", 4470 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4471 "MSRIndex": "0x1a6,0x1a7", 4472 "MSRValue": "0x0110000010", 4473 "Offcore": "1", 4474 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4475 "SampleAfterValue": "100003", 4476 "UMask": "0x1" 4477 }, 4478 { 4479 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4480 "Counter": "0,1,2,3", 4481 "CounterHTOff": "0,1,2,3", 4482 "Deprecated": "1", 4483 "EventCode": "0xB7, 0xBB", 4484 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4485 "MSRIndex": "0x1a6,0x1a7", 4486 "MSRValue": "0x0204000020", 4487 "Offcore": "1", 4488 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4489 "SampleAfterValue": "100003", 4490 "UMask": "0x1" 4491 }, 4492 { 4493 "BriefDescription": "Counts all demand data writes (RFOs)", 4494 "Counter": "0,1,2,3", 4495 "CounterHTOff": "0,1,2,3", 4496 "EventCode": "0xB7, 0xBB", 4497 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4498 "MSRIndex": "0x1a6,0x1a7", 4499 "MSRValue": "0x0090000002", 4500 "Offcore": "1", 4501 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4502 "SampleAfterValue": "100003", 4503 "UMask": "0x1" 4504 }, 4505 { 4506 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 4507 "Counter": "0,1,2,3", 4508 "CounterHTOff": "0,1,2,3", 4509 "EventCode": "0xB7, 0xBB", 4510 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 4511 "MSRIndex": "0x1a6,0x1a7", 4512 "MSRValue": "0x1004000080", 4513 "Offcore": "1", 4514 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4515 "SampleAfterValue": "100003", 4516 "UMask": "0x1" 4517 }, 4518 { 4519 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 4520 "Counter": "0,1,2,3", 4521 "CounterHTOff": "0,1,2,3", 4522 "EventCode": "0xB7, 0xBB", 4523 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4524 "MSRIndex": "0x1a6,0x1a7", 4525 "MSRValue": "0x0090000010", 4526 "Offcore": "1", 4527 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4528 "SampleAfterValue": "100003", 4529 "UMask": "0x1" 4530 }, 4531 { 4532 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 4533 "Counter": "0,1,2,3", 4534 "CounterHTOff": "0,1,2,3", 4535 "EventCode": "0xB7, 0xBB", 4536 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4537 "MSRIndex": "0x1a6,0x1a7", 4538 "MSRValue": "0x1010000122", 4539 "Offcore": "1", 4540 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4541 "SampleAfterValue": "100003", 4542 "UMask": "0x1" 4543 }, 4544 { 4545 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4546 "Counter": "0,1,2,3", 4547 "CounterHTOff": "0,1,2,3", 4548 "Deprecated": "1", 4549 "EventCode": "0xB7, 0xBB", 4550 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 4551 "MSRIndex": "0x1a6,0x1a7", 4552 "MSRValue": "0x083C000122", 4553 "Offcore": "1", 4554 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4555 "SampleAfterValue": "100003", 4556 "UMask": "0x1" 4557 }, 4558 { 4559 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 4560 "Counter": "0,1,2,3", 4561 "CounterHTOff": "0,1,2,3", 4562 "EventCode": "0xB7, 0xBB", 4563 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4564 "MSRIndex": "0x1a6,0x1a7", 4565 "MSRValue": "0x0810000080", 4566 "Offcore": "1", 4567 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4568 "SampleAfterValue": "100003", 4569 "UMask": "0x1" 4570 }, 4571 { 4572 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & HIT_OTHER_CORE_FWD", 4573 "Counter": "0,1,2,3", 4574 "CounterHTOff": "0,1,2,3", 4575 "EventCode": "0xB7, 0xBB", 4576 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 4577 "MSRIndex": "0x1a6,0x1a7", 4578 "MSRValue": "0x083C000001", 4579 "Offcore": "1", 4580 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4581 "SampleAfterValue": "100003", 4582 "UMask": "0x1" 4583 }, 4584 { 4585 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 4586 "Counter": "0,1,2,3", 4587 "CounterHTOff": "0,1,2,3", 4588 "EventCode": "0xB7, 0xBB", 4589 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4590 "MSRIndex": "0x1a6,0x1a7", 4591 "MSRValue": "0x0810008000", 4592 "Offcore": "1", 4593 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4594 "SampleAfterValue": "100003", 4595 "UMask": "0x1" 4596 }, 4597 { 4598 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4599 "Counter": "0,1,2,3", 4600 "CounterHTOff": "0,1,2,3", 4601 "Deprecated": "1", 4602 "EventCode": "0xB7, 0xBB", 4603 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4604 "MSRIndex": "0x1a6,0x1a7", 4605 "MSRValue": "0x083FC00122", 4606 "Offcore": "1", 4607 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4608 "SampleAfterValue": "100003", 4609 "UMask": "0x1" 4610 }, 4611 { 4612 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4613 "Counter": "0,1,2,3", 4614 "CounterHTOff": "0,1,2,3", 4615 "Deprecated": "1", 4616 "EventCode": "0xB7, 0xBB", 4617 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4618 "MSRIndex": "0x1a6,0x1a7", 4619 "MSRValue": "0x0090000080", 4620 "Offcore": "1", 4621 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4622 "SampleAfterValue": "100003", 4623 "UMask": "0x1" 4624 }, 4625 { 4626 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & HITM_OTHER_CORE", 4627 "Counter": "0,1,2,3", 4628 "CounterHTOff": "0,1,2,3", 4629 "EventCode": "0xB7, 0xBB", 4630 "EventName": "OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 4631 "MSRIndex": "0x1a6,0x1a7", 4632 "MSRValue": "0x103C000020", 4633 "Offcore": "1", 4634 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4635 "SampleAfterValue": "100003", 4636 "UMask": "0x1" 4637 }, 4638 { 4639 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 4640 "Counter": "0,1,2,3", 4641 "CounterHTOff": "0,1,2,3", 4642 "EventCode": "0xB7, 0xBB", 4643 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 4644 "MSRIndex": "0x1a6,0x1a7", 4645 "MSRValue": "0x0104000002", 4646 "Offcore": "1", 4647 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4648 "SampleAfterValue": "100003", 4649 "UMask": "0x1" 4650 }, 4651 { 4652 "BriefDescription": "ALL_READS & L3_MISS & NO_SNOOP_NEEDED", 4653 "Counter": "0,1,2,3", 4654 "CounterHTOff": "0,1,2,3", 4655 "EventCode": "0xB7, 0xBB", 4656 "EventName": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED", 4657 "MSRIndex": "0x1a6,0x1a7", 4658 "MSRValue": "0x013C0007F7", 4659 "Offcore": "1", 4660 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4661 "SampleAfterValue": "100003", 4662 "UMask": "0x1" 4663 }, 4664 { 4665 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 4666 "Counter": "0,1,2,3", 4667 "CounterHTOff": "0,1,2,3", 4668 "EventCode": "0xB7, 0xBB", 4669 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4670 "MSRIndex": "0x1a6,0x1a7", 4671 "MSRValue": "0x0410000001", 4672 "Offcore": "1", 4673 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4674 "SampleAfterValue": "100003", 4675 "UMask": "0x1" 4676 }, 4677 { 4678 "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)", 4679 "Counter": "0,1,2,3", 4680 "CounterHTOff": "0,1,2,3,4,5,6,7", 4681 "EventCode": "0xC9", 4682 "EventName": "RTM_RETIRED.ABORTED_EVENTS", 4683 "PublicDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).", 4684 "SampleAfterValue": "2000003", 4685 "UMask": "0x80" 4686 }, 4687 { 4688 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 4689 "Counter": "0,1,2,3", 4690 "CounterHTOff": "0,1,2,3", 4691 "EventCode": "0xB7, 0xBB", 4692 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 4693 "MSRIndex": "0x1a6,0x1a7", 4694 "MSRValue": "0x04100007F7", 4695 "Offcore": "1", 4696 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4697 "SampleAfterValue": "100003", 4698 "UMask": "0x1" 4699 }, 4700 { 4701 "BriefDescription": "ALL_PF_RFO & L3_MISS & SNOOP_NONE", 4702 "Counter": "0,1,2,3", 4703 "CounterHTOff": "0,1,2,3", 4704 "EventCode": "0xB7, 0xBB", 4705 "EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE", 4706 "MSRIndex": "0x1a6,0x1a7", 4707 "MSRValue": "0x00BC000120", 4708 "Offcore": "1", 4709 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4710 "SampleAfterValue": "100003", 4711 "UMask": "0x1" 4712 }, 4713 { 4714 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 4715 "Counter": "0,1,2,3", 4716 "CounterHTOff": "0,1,2,3", 4717 "EventCode": "0xB7, 0xBB", 4718 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 4719 "MSRIndex": "0x1a6,0x1a7", 4720 "MSRValue": "0x043C000001", 4721 "Offcore": "1", 4722 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4723 "SampleAfterValue": "100003", 4724 "UMask": "0x1" 4725 }, 4726 { 4727 "BriefDescription": "ALL_RFO & L3_MISS & SNOOP_MISS", 4728 "Counter": "0,1,2,3", 4729 "CounterHTOff": "0,1,2,3", 4730 "EventCode": "0xB7, 0xBB", 4731 "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS", 4732 "MSRIndex": "0x1a6,0x1a7", 4733 "MSRValue": "0x023C000122", 4734 "Offcore": "1", 4735 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4736 "SampleAfterValue": "100003", 4737 "UMask": "0x1" 4738 }, 4739 { 4740 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4741 "Counter": "0,1,2,3", 4742 "CounterHTOff": "0,1,2,3", 4743 "Deprecated": "1", 4744 "EventCode": "0xB7, 0xBB", 4745 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4746 "MSRIndex": "0x1a6,0x1a7", 4747 "MSRValue": "0x0110008000", 4748 "Offcore": "1", 4749 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4750 "SampleAfterValue": "100003", 4751 "UMask": "0x1" 4752 }, 4753 { 4754 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4755 "Counter": "0,1,2,3", 4756 "CounterHTOff": "0,1,2,3", 4757 "Deprecated": "1", 4758 "EventCode": "0xB7, 0xBB", 4759 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 4760 "MSRIndex": "0x1a6,0x1a7", 4761 "MSRValue": "0x1010008000", 4762 "Offcore": "1", 4763 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4764 "SampleAfterValue": "100003", 4765 "UMask": "0x1" 4766 }, 4767 { 4768 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 4769 "Counter": "0,1,2,3", 4770 "CounterHTOff": "0,1,2,3", 4771 "EventCode": "0xB7, 0xBB", 4772 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4773 "MSRIndex": "0x1a6,0x1a7", 4774 "MSRValue": "0x0110000400", 4775 "Offcore": "1", 4776 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4777 "SampleAfterValue": "100003", 4778 "UMask": "0x1" 4779 }, 4780 { 4781 "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.", 4782 "Counter": "0,1,2,3", 4783 "CounterHTOff": "0,1,2,3,4,5,6,7", 4784 "CounterMask": "6", 4785 "EventCode": "0xA3", 4786 "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS", 4787 "SampleAfterValue": "2000003", 4788 "UMask": "0x6" 4789 }, 4790 { 4791 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4792 "Counter": "0,1,2,3", 4793 "CounterHTOff": "0,1,2,3", 4794 "Deprecated": "1", 4795 "EventCode": "0xB7, 0xBB", 4796 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4797 "MSRIndex": "0x1a6,0x1a7", 4798 "MSRValue": "0x0204000122", 4799 "Offcore": "1", 4800 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4801 "SampleAfterValue": "100003", 4802 "UMask": "0x1" 4803 }, 4804 { 4805 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & SNOOP_NONE", 4806 "Counter": "0,1,2,3", 4807 "CounterHTOff": "0,1,2,3", 4808 "EventCode": "0xB7, 0xBB", 4809 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 4810 "MSRIndex": "0x1a6,0x1a7", 4811 "MSRValue": "0x00BC000400", 4812 "Offcore": "1", 4813 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4814 "SampleAfterValue": "100003", 4815 "UMask": "0x1" 4816 }, 4817 { 4818 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 4819 "Counter": "0,1,2,3", 4820 "CounterHTOff": "0,1,2,3", 4821 "EventCode": "0xB7, 0xBB", 4822 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4823 "MSRIndex": "0x1a6,0x1a7", 4824 "MSRValue": "0x0090000100", 4825 "Offcore": "1", 4826 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4827 "SampleAfterValue": "100003", 4828 "UMask": "0x1" 4829 }, 4830 { 4831 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & HITM_OTHER_CORE", 4832 "Counter": "0,1,2,3", 4833 "CounterHTOff": "0,1,2,3", 4834 "EventCode": "0xB7, 0xBB", 4835 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE", 4836 "MSRIndex": "0x1a6,0x1a7", 4837 "MSRValue": "0x103C000001", 4838 "Offcore": "1", 4839 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4840 "SampleAfterValue": "100003", 4841 "UMask": "0x1" 4842 }, 4843 { 4844 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & REMOTE_HITM", 4845 "Counter": "0,1,2,3", 4846 "CounterHTOff": "0,1,2,3", 4847 "EventCode": "0xB7, 0xBB", 4848 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 4849 "MSRIndex": "0x1a6,0x1a7", 4850 "MSRValue": "0x103FC00400", 4851 "Offcore": "1", 4852 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4853 "SampleAfterValue": "100003", 4854 "UMask": "0x1" 4855 }, 4856 { 4857 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4858 "Counter": "0,1,2,3", 4859 "CounterHTOff": "0,1,2,3", 4860 "Deprecated": "1", 4861 "EventCode": "0xB7, 0xBB", 4862 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4863 "MSRIndex": "0x1a6,0x1a7", 4864 "MSRValue": "0x0204000400", 4865 "Offcore": "1", 4866 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4867 "SampleAfterValue": "100003", 4868 "UMask": "0x1" 4869 }, 4870 { 4871 "BriefDescription": "Counts any other requests", 4872 "Counter": "0,1,2,3", 4873 "CounterHTOff": "0,1,2,3", 4874 "EventCode": "0xB7, 0xBB", 4875 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 4876 "MSRIndex": "0x1a6,0x1a7", 4877 "MSRValue": "0x0204008000", 4878 "Offcore": "1", 4879 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4880 "SampleAfterValue": "100003", 4881 "UMask": "0x1" 4882 }, 4883 { 4884 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4885 "Counter": "0,1,2,3", 4886 "CounterHTOff": "0,1,2,3", 4887 "Deprecated": "1", 4888 "EventCode": "0xB7, 0xBB", 4889 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 4890 "MSRIndex": "0x1a6,0x1a7", 4891 "MSRValue": "0x0090008000", 4892 "Offcore": "1", 4893 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4894 "SampleAfterValue": "100003", 4895 "UMask": "0x1" 4896 }, 4897 { 4898 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4899 "Counter": "0,1,2,3", 4900 "CounterHTOff": "0,1,2,3", 4901 "Deprecated": "1", 4902 "EventCode": "0xB7, 0xBB", 4903 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 4904 "MSRIndex": "0x1a6,0x1a7", 4905 "MSRValue": "0x08100007F7", 4906 "Offcore": "1", 4907 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4908 "SampleAfterValue": "100003", 4909 "UMask": "0x1" 4910 }, 4911 { 4912 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 4913 "Counter": "0,1,2,3", 4914 "CounterHTOff": "0,1,2,3", 4915 "EventCode": "0xB7, 0xBB", 4916 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4917 "MSRIndex": "0x1a6,0x1a7", 4918 "MSRValue": "0x0604000004", 4919 "Offcore": "1", 4920 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4921 "SampleAfterValue": "100003", 4922 "UMask": "0x1" 4923 }, 4924 { 4925 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4926 "Counter": "0,1,2,3", 4927 "CounterHTOff": "0,1,2,3", 4928 "Deprecated": "1", 4929 "EventCode": "0xB7, 0xBB", 4930 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 4931 "MSRIndex": "0x1a6,0x1a7", 4932 "MSRValue": "0x0604000491", 4933 "Offcore": "1", 4934 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4935 "SampleAfterValue": "100003", 4936 "UMask": "0x1" 4937 }, 4938 { 4939 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4940 "Counter": "0,1,2,3", 4941 "CounterHTOff": "0,1,2,3", 4942 "Deprecated": "1", 4943 "EventCode": "0xB7, 0xBB", 4944 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 4945 "MSRIndex": "0x1a6,0x1a7", 4946 "MSRValue": "0x083FC00002", 4947 "Offcore": "1", 4948 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4949 "SampleAfterValue": "100003", 4950 "UMask": "0x1" 4951 }, 4952 { 4953 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & SNOOP_NONE", 4954 "Counter": "0,1,2,3", 4955 "CounterHTOff": "0,1,2,3", 4956 "EventCode": "0xB7, 0xBB", 4957 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE", 4958 "MSRIndex": "0x1a6,0x1a7", 4959 "MSRValue": "0x00BC000004", 4960 "Offcore": "1", 4961 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4962 "SampleAfterValue": "100003", 4963 "UMask": "0x1" 4964 }, 4965 { 4966 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4967 "Counter": "0,1,2,3", 4968 "CounterHTOff": "0,1,2,3", 4969 "Deprecated": "1", 4970 "EventCode": "0xB7, 0xBB", 4971 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 4972 "MSRIndex": "0x1a6,0x1a7", 4973 "MSRValue": "0x063B800122", 4974 "Offcore": "1", 4975 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4976 "SampleAfterValue": "100003", 4977 "UMask": "0x1" 4978 }, 4979 { 4980 "BriefDescription": "ALL_READS & L3_MISS & REMOTE_HIT_FORWARD", 4981 "Counter": "0,1,2,3", 4982 "CounterHTOff": "0,1,2,3", 4983 "EventCode": "0xB7, 0xBB", 4984 "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD", 4985 "MSRIndex": "0x1a6,0x1a7", 4986 "MSRValue": "0x083FC007F7", 4987 "Offcore": "1", 4988 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 4989 "SampleAfterValue": "100003", 4990 "UMask": "0x1" 4991 }, 4992 { 4993 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4994 "Counter": "0,1,2,3", 4995 "CounterHTOff": "0,1,2,3", 4996 "Deprecated": "1", 4997 "EventCode": "0xB7, 0xBB", 4998 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 4999 "MSRIndex": "0x1a6,0x1a7", 5000 "MSRValue": "0x0110000001", 5001 "Offcore": "1", 5002 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5003 "SampleAfterValue": "100003", 5004 "UMask": "0x1" 5005 }, 5006 { 5007 "BriefDescription": "ALL_RFO & L3_MISS & NO_SNOOP_NEEDED", 5008 "Counter": "0,1,2,3", 5009 "CounterHTOff": "0,1,2,3", 5010 "EventCode": "0xB7, 0xBB", 5011 "EventName": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 5012 "MSRIndex": "0x1a6,0x1a7", 5013 "MSRValue": "0x013C000122", 5014 "Offcore": "1", 5015 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5016 "SampleAfterValue": "100003", 5017 "UMask": "0x1" 5018 }, 5019 { 5020 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & HIT_OTHER_CORE_FWD", 5021 "Counter": "0,1,2,3", 5022 "CounterHTOff": "0,1,2,3", 5023 "EventCode": "0xB7, 0xBB", 5024 "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 5025 "MSRIndex": "0x1a6,0x1a7", 5026 "MSRValue": "0x083C000100", 5027 "Offcore": "1", 5028 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5029 "SampleAfterValue": "100003", 5030 "UMask": "0x1" 5031 }, 5032 { 5033 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 5034 "Counter": "0,1,2,3", 5035 "CounterHTOff": "0,1,2,3", 5036 "EventCode": "0xB7, 0xBB", 5037 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5038 "MSRIndex": "0x1a6,0x1a7", 5039 "MSRValue": "0x3F90000004", 5040 "Offcore": "1", 5041 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5042 "SampleAfterValue": "100003", 5043 "UMask": "0x1" 5044 }, 5045 { 5046 "BriefDescription": "ALL_PF_RFO & L3_MISS & NO_SNOOP_NEEDED", 5047 "Counter": "0,1,2,3", 5048 "CounterHTOff": "0,1,2,3", 5049 "EventCode": "0xB7, 0xBB", 5050 "EventName": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 5051 "MSRIndex": "0x1a6,0x1a7", 5052 "MSRValue": "0x013C000120", 5053 "Offcore": "1", 5054 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5055 "SampleAfterValue": "100003", 5056 "UMask": "0x1" 5057 }, 5058 { 5059 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5060 "Counter": "0,1,2,3", 5061 "CounterHTOff": "0,1,2,3", 5062 "Deprecated": "1", 5063 "EventCode": "0xB7, 0xBB", 5064 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5065 "MSRIndex": "0x1a6,0x1a7", 5066 "MSRValue": "0x02100007F7", 5067 "Offcore": "1", 5068 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5069 "SampleAfterValue": "100003", 5070 "UMask": "0x1" 5071 }, 5072 { 5073 "BriefDescription": "ALL_READS & L3_MISS & REMOTE_HITM", 5074 "Counter": "0,1,2,3", 5075 "CounterHTOff": "0,1,2,3", 5076 "EventCode": "0xB7, 0xBB", 5077 "EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HITM", 5078 "MSRIndex": "0x1a6,0x1a7", 5079 "MSRValue": "0x103FC007F7", 5080 "Offcore": "1", 5081 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5082 "SampleAfterValue": "100003", 5083 "UMask": "0x1" 5084 }, 5085 { 5086 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5087 "Counter": "0,1,2,3", 5088 "CounterHTOff": "0,1,2,3", 5089 "Deprecated": "1", 5090 "EventCode": "0xB7, 0xBB", 5091 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5092 "MSRIndex": "0x1a6,0x1a7", 5093 "MSRValue": "0x0110000490", 5094 "Offcore": "1", 5095 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5096 "SampleAfterValue": "100003", 5097 "UMask": "0x1" 5098 }, 5099 { 5100 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & ANY_SNOOP", 5101 "Counter": "0,1,2,3", 5102 "CounterHTOff": "0,1,2,3", 5103 "EventCode": "0xB7, 0xBB", 5104 "EventName": "OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP", 5105 "MSRIndex": "0x1a6,0x1a7", 5106 "MSRValue": "0x3FBC000100", 5107 "Offcore": "1", 5108 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5109 "SampleAfterValue": "100003", 5110 "UMask": "0x1" 5111 }, 5112 { 5113 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5114 "Counter": "0,1,2,3", 5115 "CounterHTOff": "0,1,2,3", 5116 "Deprecated": "1", 5117 "EventCode": "0xB7, 0xBB", 5118 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5119 "MSRIndex": "0x1a6,0x1a7", 5120 "MSRValue": "0x0810000004", 5121 "Offcore": "1", 5122 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5123 "SampleAfterValue": "100003", 5124 "UMask": "0x1" 5125 }, 5126 { 5127 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 5128 "Counter": "0,1,2,3", 5129 "CounterHTOff": "0,1,2,3", 5130 "Deprecated": "1", 5131 "EventCode": "0xB7, 0xBB", 5132 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 5133 "MSRIndex": "0x1a6,0x1a7", 5134 "MSRValue": "0x0204000490", 5135 "Offcore": "1", 5136 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5137 "SampleAfterValue": "100003", 5138 "UMask": "0x1" 5139 }, 5140 { 5141 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5142 "Counter": "0,1,2,3", 5143 "CounterHTOff": "0,1,2,3", 5144 "Deprecated": "1", 5145 "EventCode": "0xB7, 0xBB", 5146 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5147 "MSRIndex": "0x1a6,0x1a7", 5148 "MSRValue": "0x3F90000491", 5149 "Offcore": "1", 5150 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5151 "SampleAfterValue": "100003", 5152 "UMask": "0x1" 5153 }, 5154 { 5155 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 5156 "Counter": "0,1,2,3", 5157 "CounterHTOff": "0,1,2,3", 5158 "EventCode": "0xB7, 0xBB", 5159 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5160 "MSRIndex": "0x1a6,0x1a7", 5161 "MSRValue": "0x0404000491", 5162 "Offcore": "1", 5163 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5164 "SampleAfterValue": "100003", 5165 "UMask": "0x1" 5166 }, 5167 { 5168 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM", 5169 "Counter": "0,1,2,3", 5170 "CounterHTOff": "0,1,2,3", 5171 "Deprecated": "1", 5172 "EventCode": "0xB7, 0xBB", 5173 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HITM", 5174 "MSRIndex": "0x1a6,0x1a7", 5175 "MSRValue": "0x103FC00002", 5176 "Offcore": "1", 5177 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5178 "SampleAfterValue": "100003", 5179 "UMask": "0x1" 5180 }, 5181 { 5182 "BriefDescription": "Number of times an HLE execution aborted due to hardware timer expiration.", 5183 "Counter": "0,1,2,3", 5184 "CounterHTOff": "0,1,2,3,4,5,6,7", 5185 "EventCode": "0xC8", 5186 "EventName": "HLE_RETIRED.ABORTED_TIMER", 5187 "SampleAfterValue": "2000003", 5188 "UMask": "0x10" 5189 }, 5190 { 5191 "BriefDescription": "ALL_RFO & L3_MISS & REMOTE_HITM", 5192 "Counter": "0,1,2,3", 5193 "CounterHTOff": "0,1,2,3", 5194 "EventCode": "0xB7, 0xBB", 5195 "EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM", 5196 "MSRIndex": "0x1a6,0x1a7", 5197 "MSRValue": "0x103FC00122", 5198 "Offcore": "1", 5199 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5200 "SampleAfterValue": "100003", 5201 "UMask": "0x1" 5202 }, 5203 { 5204 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_NONE", 5205 "Counter": "0,1,2,3", 5206 "CounterHTOff": "0,1,2,3", 5207 "EventCode": "0xB7, 0xBB", 5208 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5209 "MSRIndex": "0x1a6,0x1a7", 5210 "MSRValue": "0x0090000491", 5211 "Offcore": "1", 5212 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5213 "SampleAfterValue": "100003", 5214 "UMask": "0x1" 5215 }, 5216 { 5217 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & REMOTE_HITM", 5218 "Counter": "0,1,2,3", 5219 "CounterHTOff": "0,1,2,3", 5220 "EventCode": "0xB7, 0xBB", 5221 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM", 5222 "MSRIndex": "0x1a6,0x1a7", 5223 "MSRValue": "0x103FC00080", 5224 "Offcore": "1", 5225 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5226 "SampleAfterValue": "100003", 5227 "UMask": "0x1" 5228 }, 5229 { 5230 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 5231 "Counter": "0,1,2,3", 5232 "CounterHTOff": "0,1,2,3", 5233 "EventCode": "0xB7, 0xBB", 5234 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5235 "MSRIndex": "0x1a6,0x1a7", 5236 "MSRValue": "0x063B800004", 5237 "Offcore": "1", 5238 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5239 "SampleAfterValue": "100003", 5240 "UMask": "0x1" 5241 }, 5242 { 5243 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 5244 "Counter": "0,1,2,3", 5245 "CounterHTOff": "0,1,2,3", 5246 "EventCode": "0xB7, 0xBB", 5247 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5248 "MSRIndex": "0x1a6,0x1a7", 5249 "MSRValue": "0x0404000490", 5250 "Offcore": "1", 5251 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5252 "SampleAfterValue": "100003", 5253 "UMask": "0x1" 5254 }, 5255 { 5256 "BriefDescription": "Counts any other requests OTHER & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 5257 "Counter": "0,1,2,3", 5258 "CounterHTOff": "0,1,2,3", 5259 "EventCode": "0xB7, 0xBB", 5260 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5261 "MSRIndex": "0x1a6,0x1a7", 5262 "MSRValue": "0x3F90008000", 5263 "Offcore": "1", 5264 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5265 "SampleAfterValue": "100003", 5266 "UMask": "0x1" 5267 }, 5268 { 5269 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 5270 "Counter": "0,1,2,3", 5271 "CounterHTOff": "0,1,2,3", 5272 "EventCode": "0xB7, 0xBB", 5273 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5274 "MSRIndex": "0x1a6,0x1a7", 5275 "MSRValue": "0x0410000490", 5276 "Offcore": "1", 5277 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5278 "SampleAfterValue": "100003", 5279 "UMask": "0x1" 5280 }, 5281 { 5282 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 5283 "Counter": "0,1,2,3", 5284 "CounterHTOff": "0,1,2,3", 5285 "Deprecated": "1", 5286 "EventCode": "0xB7, 0xBB", 5287 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 5288 "MSRIndex": "0x1a6,0x1a7", 5289 "MSRValue": "0x3FBC000010", 5290 "Offcore": "1", 5291 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5292 "SampleAfterValue": "100003", 5293 "UMask": "0x1" 5294 }, 5295 { 5296 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5297 "Counter": "0,1,2,3", 5298 "CounterHTOff": "0,1,2,3", 5299 "Deprecated": "1", 5300 "EventCode": "0xB7, 0xBB", 5301 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5302 "MSRIndex": "0x1a6,0x1a7", 5303 "MSRValue": "0x3F84000020", 5304 "Offcore": "1", 5305 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5306 "SampleAfterValue": "100003", 5307 "UMask": "0x1" 5308 }, 5309 { 5310 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5311 "Counter": "0,1,2,3", 5312 "CounterHTOff": "0,1,2,3", 5313 "Deprecated": "1", 5314 "EventCode": "0xB7, 0xBB", 5315 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5316 "MSRIndex": "0x1a6,0x1a7", 5317 "MSRValue": "0x0604000001", 5318 "Offcore": "1", 5319 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5320 "SampleAfterValue": "100003", 5321 "UMask": "0x1" 5322 }, 5323 { 5324 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5325 "Counter": "0,1,2,3", 5326 "CounterHTOff": "0,1,2,3", 5327 "Deprecated": "1", 5328 "EventCode": "0xB7, 0xBB", 5329 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5330 "MSRIndex": "0x1a6,0x1a7", 5331 "MSRValue": "0x0084000100", 5332 "Offcore": "1", 5333 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5334 "SampleAfterValue": "100003", 5335 "UMask": "0x1" 5336 }, 5337 { 5338 "BriefDescription": "Counts any other requests OTHER & L3_MISS & SNOOP_MISS", 5339 "Counter": "0,1,2,3", 5340 "CounterHTOff": "0,1,2,3", 5341 "EventCode": "0xB7, 0xBB", 5342 "EventName": "OCR.OTHER.L3_MISS.SNOOP_MISS", 5343 "MSRIndex": "0x1a6,0x1a7", 5344 "MSRValue": "0x023C008000", 5345 "Offcore": "1", 5346 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5347 "SampleAfterValue": "100003", 5348 "UMask": "0x1" 5349 }, 5350 { 5351 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5352 "Counter": "0,1,2,3", 5353 "CounterHTOff": "0,1,2,3", 5354 "Deprecated": "1", 5355 "EventCode": "0xB7, 0xBB", 5356 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5357 "MSRIndex": "0x1a6,0x1a7", 5358 "MSRValue": "0x0404000400", 5359 "Offcore": "1", 5360 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5361 "SampleAfterValue": "100003", 5362 "UMask": "0x1" 5363 }, 5364 { 5365 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5366 "Counter": "0,1,2,3", 5367 "CounterHTOff": "0,1,2,3", 5368 "Deprecated": "1", 5369 "EventCode": "0xB7, 0xBB", 5370 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5371 "MSRIndex": "0x1a6,0x1a7", 5372 "MSRValue": "0x063B800491", 5373 "Offcore": "1", 5374 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5375 "SampleAfterValue": "100003", 5376 "UMask": "0x1" 5377 }, 5378 { 5379 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5380 "Counter": "0,1,2,3", 5381 "CounterHTOff": "0,1,2,3", 5382 "Deprecated": "1", 5383 "EventCode": "0xB7, 0xBB", 5384 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5385 "MSRIndex": "0x1a6,0x1a7", 5386 "MSRValue": "0x0084000020", 5387 "Offcore": "1", 5388 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5389 "SampleAfterValue": "100003", 5390 "UMask": "0x1" 5391 }, 5392 { 5393 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 5394 "Counter": "0,1,2,3", 5395 "CounterHTOff": "0,1,2,3", 5396 "EventCode": "0xB7, 0xBB", 5397 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5398 "MSRIndex": "0x1a6,0x1a7", 5399 "MSRValue": "0x0604008000", 5400 "Offcore": "1", 5401 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5402 "SampleAfterValue": "100003", 5403 "UMask": "0x1" 5404 }, 5405 { 5406 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 5407 "Counter": "0,1,2,3", 5408 "CounterHTOff": "0,1,2,3", 5409 "EventCode": "0xB7, 0xBB", 5410 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5411 "MSRIndex": "0x1a6,0x1a7", 5412 "MSRValue": "0x0110000100", 5413 "Offcore": "1", 5414 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5415 "SampleAfterValue": "100003", 5416 "UMask": "0x1" 5417 }, 5418 { 5419 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.", 5420 "Counter": "0,1,2,3", 5421 "CounterHTOff": "0,1,2,3", 5422 "EventCode": "0xCD", 5423 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", 5424 "MSRIndex": "0x3F6", 5425 "MSRValue": "0x20", 5426 "PEBS": "2", 5427 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.", 5428 "SampleAfterValue": "100007", 5429 "TakenAlone": "1", 5430 "UMask": "0x1" 5431 }, 5432 { 5433 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5434 "Counter": "0,1,2,3", 5435 "CounterHTOff": "0,1,2,3", 5436 "Deprecated": "1", 5437 "EventCode": "0xB7, 0xBB", 5438 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 5439 "MSRIndex": "0x1a6,0x1a7", 5440 "MSRValue": "0x083C000080", 5441 "Offcore": "1", 5442 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5443 "SampleAfterValue": "100003", 5444 "UMask": "0x1" 5445 }, 5446 { 5447 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 5448 "Counter": "0,1,2,3", 5449 "CounterHTOff": "0,1,2,3", 5450 "EventCode": "0xB7, 0xBB", 5451 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5452 "MSRIndex": "0x1a6,0x1a7", 5453 "MSRValue": "0x0110000122", 5454 "Offcore": "1", 5455 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5456 "SampleAfterValue": "100003", 5457 "UMask": "0x1" 5458 }, 5459 { 5460 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 5461 "Counter": "0,1,2,3", 5462 "CounterHTOff": "0,1,2,3", 5463 "EventCode": "0xB7, 0xBB", 5464 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5465 "MSRIndex": "0x1a6,0x1a7", 5466 "MSRValue": "0x0810000020", 5467 "Offcore": "1", 5468 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5469 "SampleAfterValue": "100003", 5470 "UMask": "0x1" 5471 }, 5472 { 5473 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & REMOTE_HIT_FORWARD", 5474 "Counter": "0,1,2,3", 5475 "CounterHTOff": "0,1,2,3", 5476 "EventCode": "0xB7, 0xBB", 5477 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5478 "MSRIndex": "0x1a6,0x1a7", 5479 "MSRValue": "0x083FC00080", 5480 "Offcore": "1", 5481 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5482 "SampleAfterValue": "100003", 5483 "UMask": "0x1" 5484 }, 5485 { 5486 "BriefDescription": "Counts all demand code reads", 5487 "Counter": "0,1,2,3", 5488 "CounterHTOff": "0,1,2,3", 5489 "EventCode": "0xB7, 0xBB", 5490 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5491 "MSRIndex": "0x1a6,0x1a7", 5492 "MSRValue": "0x0210000004", 5493 "Offcore": "1", 5494 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5495 "SampleAfterValue": "100003", 5496 "UMask": "0x1" 5497 }, 5498 { 5499 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5500 "Counter": "0,1,2,3", 5501 "CounterHTOff": "0,1,2,3", 5502 "Deprecated": "1", 5503 "EventCode": "0xB7, 0xBB", 5504 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5505 "MSRIndex": "0x1a6,0x1a7", 5506 "MSRValue": "0x0104000080", 5507 "Offcore": "1", 5508 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5509 "SampleAfterValue": "100003", 5510 "UMask": "0x1" 5511 }, 5512 { 5513 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_MISS", 5514 "Counter": "0,1,2,3", 5515 "CounterHTOff": "0,1,2,3", 5516 "EventCode": "0xB7, 0xBB", 5517 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5518 "MSRIndex": "0x1a6,0x1a7", 5519 "MSRValue": "0x0210000122", 5520 "Offcore": "1", 5521 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5522 "SampleAfterValue": "100003", 5523 "UMask": "0x1" 5524 }, 5525 { 5526 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & SNOOP_NONE", 5527 "Counter": "0,1,2,3", 5528 "CounterHTOff": "0,1,2,3", 5529 "EventCode": "0xB7, 0xBB", 5530 "EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE", 5531 "MSRIndex": "0x1a6,0x1a7", 5532 "MSRValue": "0x00BC000100", 5533 "Offcore": "1", 5534 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5535 "SampleAfterValue": "100003", 5536 "UMask": "0x1" 5537 }, 5538 { 5539 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 5540 "Counter": "0,1,2,3", 5541 "CounterHTOff": "0,1,2,3", 5542 "EventCode": "0xB7, 0xBB", 5543 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 5544 "MSRIndex": "0x1a6,0x1a7", 5545 "MSRValue": "0x0810000002", 5546 "Offcore": "1", 5547 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5548 "SampleAfterValue": "100003", 5549 "UMask": "0x1" 5550 }, 5551 { 5552 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & SNOOP_MISS", 5553 "Counter": "0,1,2,3", 5554 "CounterHTOff": "0,1,2,3", 5555 "EventCode": "0xB7, 0xBB", 5556 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 5557 "MSRIndex": "0x1a6,0x1a7", 5558 "MSRValue": "0x023C000001", 5559 "Offcore": "1", 5560 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5561 "SampleAfterValue": "100003", 5562 "UMask": "0x1" 5563 }, 5564 { 5565 "BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).", 5566 "Counter": "0,1,2,3", 5567 "CounterHTOff": "0,1,2,3,4,5,6,7", 5568 "EventCode": "0xC8", 5569 "EventName": "HLE_RETIRED.ABORTED_MEM", 5570 "SampleAfterValue": "2000003", 5571 "UMask": "0x8" 5572 }, 5573 { 5574 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5575 "Counter": "0,1,2,3", 5576 "CounterHTOff": "0,1,2,3", 5577 "Deprecated": "1", 5578 "EventCode": "0xB7, 0xBB", 5579 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5580 "MSRIndex": "0x1a6,0x1a7", 5581 "MSRValue": "0x0410000080", 5582 "Offcore": "1", 5583 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5584 "SampleAfterValue": "100003", 5585 "UMask": "0x1" 5586 }, 5587 { 5588 "BriefDescription": "ALL_RFO & L3_MISS & SNOOP_NONE", 5589 "Counter": "0,1,2,3", 5590 "CounterHTOff": "0,1,2,3", 5591 "EventCode": "0xB7, 0xBB", 5592 "EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 5593 "MSRIndex": "0x1a6,0x1a7", 5594 "MSRValue": "0x00BC000122", 5595 "Offcore": "1", 5596 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5597 "SampleAfterValue": "100003", 5598 "UMask": "0x1" 5599 }, 5600 { 5601 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 5602 "Counter": "0,1,2,3", 5603 "CounterHTOff": "0,1,2,3", 5604 "EventCode": "0xB7, 0xBB", 5605 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5606 "MSRIndex": "0x1a6,0x1a7", 5607 "MSRValue": "0x063B800120", 5608 "Offcore": "1", 5609 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5610 "SampleAfterValue": "100003", 5611 "UMask": "0x1" 5612 }, 5613 { 5614 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HITM", 5615 "Counter": "0,1,2,3", 5616 "CounterHTOff": "0,1,2,3", 5617 "Deprecated": "1", 5618 "EventCode": "0xB7, 0xBB", 5619 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HITM", 5620 "MSRIndex": "0x1a6,0x1a7", 5621 "MSRValue": "0x103FC08000", 5622 "Offcore": "1", 5623 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5624 "SampleAfterValue": "100003", 5625 "UMask": "0x1" 5626 }, 5627 { 5628 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5629 "Counter": "0,1,2,3", 5630 "CounterHTOff": "0,1,2,3", 5631 "Deprecated": "1", 5632 "EventCode": "0xB7, 0xBB", 5633 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 5634 "MSRIndex": "0x1a6,0x1a7", 5635 "MSRValue": "0x3F90000490", 5636 "Offcore": "1", 5637 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5638 "SampleAfterValue": "100003", 5639 "UMask": "0x1" 5640 }, 5641 { 5642 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5643 "Counter": "0,1,2,3", 5644 "CounterHTOff": "0,1,2,3", 5645 "Deprecated": "1", 5646 "EventCode": "0xB7, 0xBB", 5647 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5648 "MSRIndex": "0x1a6,0x1a7", 5649 "MSRValue": "0x0410000004", 5650 "Offcore": "1", 5651 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5652 "SampleAfterValue": "100003", 5653 "UMask": "0x1" 5654 }, 5655 { 5656 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS", 5657 "Counter": "0,1,2,3", 5658 "CounterHTOff": "0,1,2,3", 5659 "Deprecated": "1", 5660 "EventCode": "0xB7, 0xBB", 5661 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS", 5662 "MSRIndex": "0x1a6,0x1a7", 5663 "MSRValue": "0x023C000002", 5664 "Offcore": "1", 5665 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5666 "SampleAfterValue": "100003", 5667 "UMask": "0x1" 5668 }, 5669 { 5670 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 5671 "Counter": "0,1,2,3", 5672 "CounterHTOff": "0,1,2,3", 5673 "EventCode": "0xB7, 0xBB", 5674 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5675 "MSRIndex": "0x1a6,0x1a7", 5676 "MSRValue": "0x0804000010", 5677 "Offcore": "1", 5678 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5679 "SampleAfterValue": "100003", 5680 "UMask": "0x1" 5681 }, 5682 { 5683 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5684 "Counter": "0,1,2,3", 5685 "CounterHTOff": "0,1,2,3", 5686 "Deprecated": "1", 5687 "EventCode": "0xB7, 0xBB", 5688 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5689 "MSRIndex": "0x1a6,0x1a7", 5690 "MSRValue": "0x0104000491", 5691 "Offcore": "1", 5692 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5693 "SampleAfterValue": "100003", 5694 "UMask": "0x1" 5695 }, 5696 { 5697 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5698 "Counter": "0,1,2,3", 5699 "CounterHTOff": "0,1,2,3", 5700 "Deprecated": "1", 5701 "EventCode": "0xB7, 0xBB", 5702 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5703 "MSRIndex": "0x1a6,0x1a7", 5704 "MSRValue": "0x0090000010", 5705 "Offcore": "1", 5706 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5707 "SampleAfterValue": "100003", 5708 "UMask": "0x1" 5709 }, 5710 { 5711 "BriefDescription": "Counts any other requests OTHER & L3_MISS & HIT_OTHER_CORE_NO_FWD", 5712 "Counter": "0,1,2,3", 5713 "CounterHTOff": "0,1,2,3", 5714 "EventCode": "0xB7, 0xBB", 5715 "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 5716 "MSRIndex": "0x1a6,0x1a7", 5717 "MSRValue": "0x043C008000", 5718 "Offcore": "1", 5719 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5720 "SampleAfterValue": "100003", 5721 "UMask": "0x1" 5722 }, 5723 { 5724 "BriefDescription": "Counts any other requests", 5725 "Counter": "0,1,2,3", 5726 "CounterHTOff": "0,1,2,3", 5727 "EventCode": "0xB7, 0xBB", 5728 "EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 5729 "MSRIndex": "0x1a6,0x1a7", 5730 "MSRValue": "0x0210008000", 5731 "Offcore": "1", 5732 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5733 "SampleAfterValue": "100003", 5734 "UMask": "0x1" 5735 }, 5736 { 5737 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 5738 "Counter": "0,1,2,3", 5739 "CounterHTOff": "0,1,2,3", 5740 "EventCode": "0xB7, 0xBB", 5741 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5742 "MSRIndex": "0x1a6,0x1a7", 5743 "MSRValue": "0x0084000080", 5744 "Offcore": "1", 5745 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5746 "SampleAfterValue": "100003", 5747 "UMask": "0x1" 5748 }, 5749 { 5750 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & REMOTE_HIT_FORWARD", 5751 "Counter": "0,1,2,3", 5752 "CounterHTOff": "0,1,2,3", 5753 "EventCode": "0xB7, 0xBB", 5754 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 5755 "MSRIndex": "0x1a6,0x1a7", 5756 "MSRValue": "0x083FC00001", 5757 "Offcore": "1", 5758 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5759 "SampleAfterValue": "100003", 5760 "UMask": "0x1" 5761 }, 5762 { 5763 "BriefDescription": "ALL_READS & L3_MISS & SNOOP_NONE", 5764 "Counter": "0,1,2,3", 5765 "CounterHTOff": "0,1,2,3", 5766 "EventCode": "0xB7, 0xBB", 5767 "EventName": "OCR.ALL_READS.L3_MISS.SNOOP_NONE", 5768 "MSRIndex": "0x1a6,0x1a7", 5769 "MSRValue": "0x00BC0007F7", 5770 "Offcore": "1", 5771 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5772 "SampleAfterValue": "100003", 5773 "UMask": "0x1" 5774 }, 5775 { 5776 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5777 "Counter": "0,1,2,3", 5778 "CounterHTOff": "0,1,2,3", 5779 "Deprecated": "1", 5780 "EventCode": "0xB7, 0xBB", 5781 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5782 "MSRIndex": "0x1a6,0x1a7", 5783 "MSRValue": "0x0110000491", 5784 "Offcore": "1", 5785 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5786 "SampleAfterValue": "100003", 5787 "UMask": "0x1" 5788 }, 5789 { 5790 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.ANY_SNOOP", 5791 "Counter": "0,1,2,3", 5792 "CounterHTOff": "0,1,2,3", 5793 "Deprecated": "1", 5794 "EventCode": "0xB7, 0xBB", 5795 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.ANY_SNOOP", 5796 "MSRIndex": "0x1a6,0x1a7", 5797 "MSRValue": "0x3FBC0007F7", 5798 "Offcore": "1", 5799 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5800 "SampleAfterValue": "100003", 5801 "UMask": "0x1" 5802 }, 5803 { 5804 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5805 "Counter": "0,1,2,3", 5806 "CounterHTOff": "0,1,2,3", 5807 "Deprecated": "1", 5808 "EventCode": "0xB7, 0xBB", 5809 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5810 "MSRIndex": "0x1a6,0x1a7", 5811 "MSRValue": "0x0410000491", 5812 "Offcore": "1", 5813 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5814 "SampleAfterValue": "100003", 5815 "UMask": "0x1" 5816 }, 5817 { 5818 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 5819 "Counter": "0,1,2,3", 5820 "CounterHTOff": "0,1,2,3", 5821 "Deprecated": "1", 5822 "EventCode": "0xB7, 0xBB", 5823 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 5824 "MSRIndex": "0x1a6,0x1a7", 5825 "MSRValue": "0x103FC00001", 5826 "Offcore": "1", 5827 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5828 "SampleAfterValue": "100003", 5829 "UMask": "0x1" 5830 }, 5831 { 5832 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 5833 "Counter": "0,1,2,3", 5834 "CounterHTOff": "0,1,2,3", 5835 "EventCode": "0xB7, 0xBB", 5836 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 5837 "MSRIndex": "0x1a6,0x1a7", 5838 "MSRValue": "0x0110000020", 5839 "Offcore": "1", 5840 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5841 "SampleAfterValue": "100003", 5842 "UMask": "0x1" 5843 }, 5844 { 5845 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5846 "Counter": "0,1,2,3", 5847 "CounterHTOff": "0,1,2,3", 5848 "Deprecated": "1", 5849 "EventCode": "0xB7, 0xBB", 5850 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 5851 "MSRIndex": "0x1a6,0x1a7", 5852 "MSRValue": "0x0410000001", 5853 "Offcore": "1", 5854 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5855 "SampleAfterValue": "100003", 5856 "UMask": "0x1" 5857 }, 5858 { 5859 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5860 "Counter": "0,1,2,3", 5861 "CounterHTOff": "0,1,2,3", 5862 "Deprecated": "1", 5863 "EventCode": "0xB7, 0xBB", 5864 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 5865 "MSRIndex": "0x1a6,0x1a7", 5866 "MSRValue": "0x0404000491", 5867 "Offcore": "1", 5868 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5869 "SampleAfterValue": "100003", 5870 "UMask": "0x1" 5871 }, 5872 { 5873 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 5874 "Counter": "0,1,2,3", 5875 "CounterHTOff": "0,1,2,3", 5876 "EventCode": "0xB7, 0xBB", 5877 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 5878 "MSRIndex": "0x1a6,0x1a7", 5879 "MSRValue": "0x1004000010", 5880 "Offcore": "1", 5881 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5882 "SampleAfterValue": "100003", 5883 "UMask": "0x1" 5884 }, 5885 { 5886 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5887 "Counter": "0,1,2,3", 5888 "CounterHTOff": "0,1,2,3", 5889 "Deprecated": "1", 5890 "EventCode": "0xB7, 0xBB", 5891 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 5892 "MSRIndex": "0x1a6,0x1a7", 5893 "MSRValue": "0x0804000491", 5894 "Offcore": "1", 5895 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5896 "SampleAfterValue": "100003", 5897 "UMask": "0x1" 5898 }, 5899 { 5900 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5901 "Counter": "0,1,2,3", 5902 "CounterHTOff": "0,1,2,3", 5903 "Deprecated": "1", 5904 "EventCode": "0xB7, 0xBB", 5905 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 5906 "MSRIndex": "0x1a6,0x1a7", 5907 "MSRValue": "0x0084008000", 5908 "Offcore": "1", 5909 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5910 "SampleAfterValue": "100003", 5911 "UMask": "0x1" 5912 }, 5913 { 5914 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5915 "Counter": "0,1,2,3", 5916 "CounterHTOff": "0,1,2,3", 5917 "Deprecated": "1", 5918 "EventCode": "0xB7, 0xBB", 5919 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 5920 "MSRIndex": "0x1a6,0x1a7", 5921 "MSRValue": "0x0104000020", 5922 "Offcore": "1", 5923 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5924 "SampleAfterValue": "100003", 5925 "UMask": "0x1" 5926 }, 5927 { 5928 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 5929 "Counter": "0,1,2,3", 5930 "CounterHTOff": "0,1,2,3", 5931 "EventCode": "0xB7, 0xBB", 5932 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 5933 "MSRIndex": "0x1a6,0x1a7", 5934 "MSRValue": "0x3F84000020", 5935 "Offcore": "1", 5936 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5937 "SampleAfterValue": "100003", 5938 "UMask": "0x1" 5939 }, 5940 { 5941 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 5942 "Counter": "0,1,2,3", 5943 "CounterHTOff": "0,1,2,3", 5944 "EventCode": "0xB7, 0xBB", 5945 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 5946 "MSRIndex": "0x1a6,0x1a7", 5947 "MSRValue": "0x0604000120", 5948 "Offcore": "1", 5949 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5950 "SampleAfterValue": "100003", 5951 "UMask": "0x1" 5952 }, 5953 { 5954 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_NONE", 5955 "Counter": "0,1,2,3", 5956 "CounterHTOff": "0,1,2,3", 5957 "EventCode": "0xB7, 0xBB", 5958 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 5959 "MSRIndex": "0x1a6,0x1a7", 5960 "MSRValue": "0x0090000120", 5961 "Offcore": "1", 5962 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5963 "SampleAfterValue": "100003", 5964 "UMask": "0x1" 5965 }, 5966 { 5967 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & REMOTE_HIT_FORWARD", 5968 "Counter": "0,1,2,3", 5969 "CounterHTOff": "0,1,2,3", 5970 "EventCode": "0xB7, 0xBB", 5971 "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 5972 "MSRIndex": "0x1a6,0x1a7", 5973 "MSRValue": "0x083FC00100", 5974 "Offcore": "1", 5975 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5976 "SampleAfterValue": "100003", 5977 "UMask": "0x1" 5978 }, 5979 { 5980 "BriefDescription": "ALL_DATA_RD & L3_MISS & SNOOP_MISS", 5981 "Counter": "0,1,2,3", 5982 "CounterHTOff": "0,1,2,3", 5983 "EventCode": "0xB7, 0xBB", 5984 "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS", 5985 "MSRIndex": "0x1a6,0x1a7", 5986 "MSRValue": "0x023C000491", 5987 "Offcore": "1", 5988 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 5989 "SampleAfterValue": "100003", 5990 "UMask": "0x1" 5991 }, 5992 { 5993 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5994 "Counter": "0,1,2,3", 5995 "CounterHTOff": "0,1,2,3", 5996 "Deprecated": "1", 5997 "EventCode": "0xB7, 0xBB", 5998 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 5999 "MSRIndex": "0x1a6,0x1a7", 6000 "MSRValue": "0x063B800020", 6001 "Offcore": "1", 6002 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6003 "SampleAfterValue": "100003", 6004 "UMask": "0x1" 6005 }, 6006 { 6007 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 6008 "Counter": "0,1,2,3", 6009 "CounterHTOff": "0,1,2,3", 6010 "EventCode": "0xB7, 0xBB", 6011 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6012 "MSRIndex": "0x1a6,0x1a7", 6013 "MSRValue": "0x043C000490", 6014 "Offcore": "1", 6015 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6016 "SampleAfterValue": "100003", 6017 "UMask": "0x1" 6018 }, 6019 { 6020 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 6021 "Counter": "0,1,2,3", 6022 "CounterHTOff": "0,1,2,3", 6023 "EventCode": "0xB7, 0xBB", 6024 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6025 "MSRIndex": "0x1a6,0x1a7", 6026 "MSRValue": "0x0104000004", 6027 "Offcore": "1", 6028 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6029 "SampleAfterValue": "100003", 6030 "UMask": "0x1" 6031 }, 6032 { 6033 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 6034 "Counter": "0,1,2,3", 6035 "CounterHTOff": "0,1,2,3", 6036 "EventCode": "0xB7, 0xBB", 6037 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6038 "MSRIndex": "0x1a6,0x1a7", 6039 "MSRValue": "0x0404000001", 6040 "Offcore": "1", 6041 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6042 "SampleAfterValue": "100003", 6043 "UMask": "0x1" 6044 }, 6045 { 6046 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 6047 "Counter": "0,1,2,3", 6048 "CounterHTOff": "0,1,2,3", 6049 "Deprecated": "1", 6050 "EventCode": "0xB7, 0xBB", 6051 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP", 6052 "MSRIndex": "0x1a6,0x1a7", 6053 "MSRValue": "0x3FBC000080", 6054 "Offcore": "1", 6055 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6056 "SampleAfterValue": "100003", 6057 "UMask": "0x1" 6058 }, 6059 { 6060 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6061 "Counter": "0,1,2,3", 6062 "CounterHTOff": "0,1,2,3", 6063 "Deprecated": "1", 6064 "EventCode": "0xB7, 0xBB", 6065 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6066 "MSRIndex": "0x1a6,0x1a7", 6067 "MSRValue": "0x1004000122", 6068 "Offcore": "1", 6069 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6070 "SampleAfterValue": "100003", 6071 "UMask": "0x1" 6072 }, 6073 { 6074 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6075 "Counter": "0,1,2,3", 6076 "CounterHTOff": "0,1,2,3", 6077 "Deprecated": "1", 6078 "EventCode": "0xB7, 0xBB", 6079 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6080 "MSRIndex": "0x1a6,0x1a7", 6081 "MSRValue": "0x0804000020", 6082 "Offcore": "1", 6083 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6084 "SampleAfterValue": "100003", 6085 "UMask": "0x1" 6086 }, 6087 { 6088 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6089 "Counter": "0,1,2,3", 6090 "CounterHTOff": "0,1,2,3", 6091 "Deprecated": "1", 6092 "EventCode": "0xB7, 0xBB", 6093 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6094 "MSRIndex": "0x1a6,0x1a7", 6095 "MSRValue": "0x1010000001", 6096 "Offcore": "1", 6097 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6098 "SampleAfterValue": "100003", 6099 "UMask": "0x1" 6100 }, 6101 { 6102 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 6103 "Counter": "0,1,2,3", 6104 "CounterHTOff": "0,1,2,3", 6105 "EventCode": "0xB7, 0xBB", 6106 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6107 "MSRIndex": "0x1a6,0x1a7", 6108 "MSRValue": "0x0404000122", 6109 "Offcore": "1", 6110 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6111 "SampleAfterValue": "100003", 6112 "UMask": "0x1" 6113 }, 6114 { 6115 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_NONE", 6116 "Counter": "0,1,2,3", 6117 "CounterHTOff": "0,1,2,3", 6118 "Deprecated": "1", 6119 "EventCode": "0xB7, 0xBB", 6120 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE", 6121 "MSRIndex": "0x1a6,0x1a7", 6122 "MSRValue": "0x00BC008000", 6123 "Offcore": "1", 6124 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6125 "SampleAfterValue": "100003", 6126 "UMask": "0x1" 6127 }, 6128 { 6129 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 6130 "Counter": "0,1,2,3", 6131 "CounterHTOff": "0,1,2,3", 6132 "Deprecated": "1", 6133 "EventCode": "0xB7, 0xBB", 6134 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 6135 "MSRIndex": "0x1a6,0x1a7", 6136 "MSRValue": "0x00BC000491", 6137 "Offcore": "1", 6138 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6139 "SampleAfterValue": "100003", 6140 "UMask": "0x1" 6141 }, 6142 { 6143 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 6144 "Counter": "0,1,2,3", 6145 "CounterHTOff": "0,1,2,3", 6146 "Deprecated": "1", 6147 "EventCode": "0xB7, 0xBB", 6148 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED", 6149 "MSRIndex": "0x1a6,0x1a7", 6150 "MSRValue": "0x013C000120", 6151 "Offcore": "1", 6152 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6153 "SampleAfterValue": "100003", 6154 "UMask": "0x1" 6155 }, 6156 { 6157 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 6158 "Counter": "0,1,2,3", 6159 "CounterHTOff": "0,1,2,3", 6160 "EventCode": "0xB7, 0xBB", 6161 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6162 "MSRIndex": "0x1a6,0x1a7", 6163 "MSRValue": "0x0210000020", 6164 "Offcore": "1", 6165 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6166 "SampleAfterValue": "100003", 6167 "UMask": "0x1" 6168 }, 6169 { 6170 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6171 "Counter": "0,1,2,3", 6172 "CounterHTOff": "0,1,2,3", 6173 "Deprecated": "1", 6174 "EventCode": "0xB7, 0xBB", 6175 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6176 "MSRIndex": "0x1a6,0x1a7", 6177 "MSRValue": "0x0110000080", 6178 "Offcore": "1", 6179 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6180 "SampleAfterValue": "100003", 6181 "UMask": "0x1" 6182 }, 6183 { 6184 "BriefDescription": "ALL_PF_RFO & L3_MISS & HITM_OTHER_CORE", 6185 "Counter": "0,1,2,3", 6186 "CounterHTOff": "0,1,2,3", 6187 "EventCode": "0xB7, 0xBB", 6188 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6189 "MSRIndex": "0x1a6,0x1a7", 6190 "MSRValue": "0x103C000120", 6191 "Offcore": "1", 6192 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6193 "SampleAfterValue": "100003", 6194 "UMask": "0x1" 6195 }, 6196 { 6197 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6198 "Counter": "0,1,2,3", 6199 "CounterHTOff": "0,1,2,3", 6200 "Deprecated": "1", 6201 "EventCode": "0xB7, 0xBB", 6202 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE", 6203 "MSRIndex": "0x1a6,0x1a7", 6204 "MSRValue": "0x103C000120", 6205 "Offcore": "1", 6206 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6207 "SampleAfterValue": "100003", 6208 "UMask": "0x1" 6209 }, 6210 { 6211 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 6212 "Counter": "0,1,2,3", 6213 "CounterHTOff": "0,1,2,3", 6214 "Deprecated": "1", 6215 "EventCode": "0xB7, 0xBB", 6216 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE", 6217 "MSRIndex": "0x1a6,0x1a7", 6218 "MSRValue": "0x00BC000400", 6219 "Offcore": "1", 6220 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6221 "SampleAfterValue": "100003", 6222 "UMask": "0x1" 6223 }, 6224 { 6225 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 6226 "Counter": "0,1,2,3", 6227 "CounterHTOff": "0,1,2,3", 6228 "EventCode": "0xB7, 0xBB", 6229 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6230 "MSRIndex": "0x1a6,0x1a7", 6231 "MSRValue": "0x0110000001", 6232 "Offcore": "1", 6233 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6234 "SampleAfterValue": "100003", 6235 "UMask": "0x1" 6236 }, 6237 { 6238 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & ANY_SNOOP", 6239 "Counter": "0,1,2,3", 6240 "CounterHTOff": "0,1,2,3", 6241 "EventCode": "0xB7, 0xBB", 6242 "EventName": "OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 6243 "MSRIndex": "0x1a6,0x1a7", 6244 "MSRValue": "0x3FBC000020", 6245 "Offcore": "1", 6246 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6247 "SampleAfterValue": "100003", 6248 "UMask": "0x1" 6249 }, 6250 { 6251 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_NONE", 6252 "Counter": "0,1,2,3", 6253 "CounterHTOff": "0,1,2,3", 6254 "Deprecated": "1", 6255 "EventCode": "0xB7, 0xBB", 6256 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_NONE", 6257 "MSRIndex": "0x1a6,0x1a7", 6258 "MSRValue": "0x00BC0007F7", 6259 "Offcore": "1", 6260 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6261 "SampleAfterValue": "100003", 6262 "UMask": "0x1" 6263 }, 6264 { 6265 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & SNOOP_MISS", 6266 "Counter": "0,1,2,3", 6267 "CounterHTOff": "0,1,2,3", 6268 "EventCode": "0xB7, 0xBB", 6269 "EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS", 6270 "MSRIndex": "0x1a6,0x1a7", 6271 "MSRValue": "0x023C000020", 6272 "Offcore": "1", 6273 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6274 "SampleAfterValue": "100003", 6275 "UMask": "0x1" 6276 }, 6277 { 6278 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6279 "Counter": "0,1,2,3", 6280 "CounterHTOff": "0,1,2,3", 6281 "Deprecated": "1", 6282 "EventCode": "0xB7, 0xBB", 6283 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6284 "MSRIndex": "0x1a6,0x1a7", 6285 "MSRValue": "0x0104000001", 6286 "Offcore": "1", 6287 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6288 "SampleAfterValue": "100003", 6289 "UMask": "0x1" 6290 }, 6291 { 6292 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6293 "Counter": "0,1,2,3", 6294 "CounterHTOff": "0,1,2,3", 6295 "Deprecated": "1", 6296 "EventCode": "0xB7, 0xBB", 6297 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6298 "MSRIndex": "0x1a6,0x1a7", 6299 "MSRValue": "0x043C000100", 6300 "Offcore": "1", 6301 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6302 "SampleAfterValue": "100003", 6303 "UMask": "0x1" 6304 }, 6305 { 6306 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 6307 "Counter": "0,1,2,3", 6308 "CounterHTOff": "0,1,2,3", 6309 "Deprecated": "1", 6310 "EventCode": "0xB7, 0xBB", 6311 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS", 6312 "MSRIndex": "0x1a6,0x1a7", 6313 "MSRValue": "0x023C000001", 6314 "Offcore": "1", 6315 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6316 "SampleAfterValue": "100003", 6317 "UMask": "0x1" 6318 }, 6319 { 6320 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6321 "Counter": "0,1,2,3", 6322 "CounterHTOff": "0,1,2,3", 6323 "Deprecated": "1", 6324 "EventCode": "0xB7, 0xBB", 6325 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6326 "MSRIndex": "0x1a6,0x1a7", 6327 "MSRValue": "0x043C000080", 6328 "Offcore": "1", 6329 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6330 "SampleAfterValue": "100003", 6331 "UMask": "0x1" 6332 }, 6333 { 6334 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6335 "Counter": "0,1,2,3", 6336 "CounterHTOff": "0,1,2,3", 6337 "Deprecated": "1", 6338 "EventCode": "0xB7, 0xBB", 6339 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 6340 "MSRIndex": "0x1a6,0x1a7", 6341 "MSRValue": "0x083C000004", 6342 "Offcore": "1", 6343 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6344 "SampleAfterValue": "100003", 6345 "UMask": "0x1" 6346 }, 6347 { 6348 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6349 "Counter": "0,1,2,3", 6350 "CounterHTOff": "0,1,2,3", 6351 "Deprecated": "1", 6352 "EventCode": "0xB7, 0xBB", 6353 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6354 "MSRIndex": "0x1a6,0x1a7", 6355 "MSRValue": "0x0404000001", 6356 "Offcore": "1", 6357 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6358 "SampleAfterValue": "100003", 6359 "UMask": "0x1" 6360 }, 6361 { 6362 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 6363 "Counter": "0,1,2,3", 6364 "CounterHTOff": "0,1,2,3", 6365 "EventCode": "0xB7, 0xBB", 6366 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 6367 "MSRIndex": "0x1a6,0x1a7", 6368 "MSRValue": "0x3F90000491", 6369 "Offcore": "1", 6370 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6371 "SampleAfterValue": "100003", 6372 "UMask": "0x1" 6373 }, 6374 { 6375 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6376 "Counter": "0,1,2,3", 6377 "CounterHTOff": "0,1,2,3", 6378 "Deprecated": "1", 6379 "EventCode": "0xB7, 0xBB", 6380 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 6381 "MSRIndex": "0x1a6,0x1a7", 6382 "MSRValue": "0x043C000122", 6383 "Offcore": "1", 6384 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6385 "SampleAfterValue": "100003", 6386 "UMask": "0x1" 6387 }, 6388 { 6389 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6390 "Counter": "0,1,2,3", 6391 "CounterHTOff": "0,1,2,3", 6392 "Deprecated": "1", 6393 "EventCode": "0xB7, 0xBB", 6394 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6395 "MSRIndex": "0x1a6,0x1a7", 6396 "MSRValue": "0x0110000020", 6397 "Offcore": "1", 6398 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6399 "SampleAfterValue": "100003", 6400 "UMask": "0x1" 6401 }, 6402 { 6403 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 6404 "Counter": "0,1,2,3", 6405 "CounterHTOff": "0,1,2,3", 6406 "EventCode": "0xB7, 0xBB", 6407 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6408 "MSRIndex": "0x1a6,0x1a7", 6409 "MSRValue": "0x1004000400", 6410 "Offcore": "1", 6411 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6412 "SampleAfterValue": "100003", 6413 "UMask": "0x1" 6414 }, 6415 { 6416 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & SNOOP_NONE", 6417 "Counter": "0,1,2,3", 6418 "CounterHTOff": "0,1,2,3", 6419 "EventCode": "0xB7, 0xBB", 6420 "EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE", 6421 "MSRIndex": "0x1a6,0x1a7", 6422 "MSRValue": "0x00BC000002", 6423 "Offcore": "1", 6424 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6425 "SampleAfterValue": "100003", 6426 "UMask": "0x1" 6427 }, 6428 { 6429 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 6430 "Counter": "0,1,2,3", 6431 "CounterHTOff": "0,1,2,3", 6432 "EventCode": "0xB7, 0xBB", 6433 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6434 "MSRIndex": "0x1a6,0x1a7", 6435 "MSRValue": "0x1010000020", 6436 "Offcore": "1", 6437 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6438 "SampleAfterValue": "100003", 6439 "UMask": "0x1" 6440 }, 6441 { 6442 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 6443 "Counter": "0,1,2,3", 6444 "CounterHTOff": "0,1,2,3", 6445 "EventCode": "0xB7, 0xBB", 6446 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 6447 "MSRIndex": "0x1a6,0x1a7", 6448 "MSRValue": "0x0110000120", 6449 "Offcore": "1", 6450 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6451 "SampleAfterValue": "100003", 6452 "UMask": "0x1" 6453 }, 6454 { 6455 "BriefDescription": "Counts any other requests OTHER & L3_MISS & HITM_OTHER_CORE", 6456 "Counter": "0,1,2,3", 6457 "CounterHTOff": "0,1,2,3", 6458 "EventCode": "0xB7, 0xBB", 6459 "EventName": "OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 6460 "MSRIndex": "0x1a6,0x1a7", 6461 "MSRValue": "0x103C008000", 6462 "Offcore": "1", 6463 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6464 "SampleAfterValue": "100003", 6465 "UMask": "0x1" 6466 }, 6467 { 6468 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6469 "Counter": "0,1,2,3", 6470 "CounterHTOff": "0,1,2,3", 6471 "Deprecated": "1", 6472 "EventCode": "0xB7, 0xBB", 6473 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6474 "MSRIndex": "0x1a6,0x1a7", 6475 "MSRValue": "0x0804000004", 6476 "Offcore": "1", 6477 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6478 "SampleAfterValue": "100003", 6479 "UMask": "0x1" 6480 }, 6481 { 6482 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6483 "Counter": "0,1,2,3", 6484 "CounterHTOff": "0,1,2,3", 6485 "Deprecated": "1", 6486 "EventCode": "0xB7, 0xBB", 6487 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 6488 "MSRIndex": "0x1a6,0x1a7", 6489 "MSRValue": "0x0104008000", 6490 "Offcore": "1", 6491 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6492 "SampleAfterValue": "100003", 6493 "UMask": "0x1" 6494 }, 6495 { 6496 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.", 6497 "Counter": "0,1,2,3", 6498 "CounterHTOff": "0,1,2,3", 6499 "EventCode": "0xCD", 6500 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", 6501 "MSRIndex": "0x3F6", 6502 "MSRValue": "0x100", 6503 "PEBS": "2", 6504 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.", 6505 "SampleAfterValue": "503", 6506 "TakenAlone": "1", 6507 "UMask": "0x1" 6508 }, 6509 { 6510 "BriefDescription": "Counts all demand code reads", 6511 "Counter": "0,1,2,3", 6512 "CounterHTOff": "0,1,2,3", 6513 "EventCode": "0xB7, 0xBB", 6514 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 6515 "MSRIndex": "0x1a6,0x1a7", 6516 "MSRValue": "0x0204000004", 6517 "Offcore": "1", 6518 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6519 "SampleAfterValue": "100003", 6520 "UMask": "0x1" 6521 }, 6522 { 6523 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6524 "Counter": "0,1,2,3", 6525 "CounterHTOff": "0,1,2,3", 6526 "Deprecated": "1", 6527 "EventCode": "0xB7, 0xBB", 6528 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6529 "MSRIndex": "0x1a6,0x1a7", 6530 "MSRValue": "0x0810000100", 6531 "Offcore": "1", 6532 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6533 "SampleAfterValue": "100003", 6534 "UMask": "0x1" 6535 }, 6536 { 6537 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 6538 "Counter": "0,1,2,3", 6539 "CounterHTOff": "0,1,2,3", 6540 "EventCode": "0xB7, 0xBB", 6541 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6542 "MSRIndex": "0x1a6,0x1a7", 6543 "MSRValue": "0x0210000100", 6544 "Offcore": "1", 6545 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6546 "SampleAfterValue": "100003", 6547 "UMask": "0x1" 6548 }, 6549 { 6550 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6551 "Counter": "0,1,2,3", 6552 "CounterHTOff": "0,1,2,3", 6553 "Deprecated": "1", 6554 "EventCode": "0xB7, 0xBB", 6555 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6556 "MSRIndex": "0x1a6,0x1a7", 6557 "MSRValue": "0x0084000002", 6558 "Offcore": "1", 6559 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6560 "SampleAfterValue": "100003", 6561 "UMask": "0x1" 6562 }, 6563 { 6564 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6565 "Counter": "0,1,2,3", 6566 "CounterHTOff": "0,1,2,3", 6567 "Deprecated": "1", 6568 "EventCode": "0xB7, 0xBB", 6569 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6570 "MSRIndex": "0x1a6,0x1a7", 6571 "MSRValue": "0x063B800004", 6572 "Offcore": "1", 6573 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6574 "SampleAfterValue": "100003", 6575 "UMask": "0x1" 6576 }, 6577 { 6578 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6579 "Counter": "0,1,2,3", 6580 "CounterHTOff": "0,1,2,3", 6581 "Deprecated": "1", 6582 "EventCode": "0xB7, 0xBB", 6583 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 6584 "MSRIndex": "0x1a6,0x1a7", 6585 "MSRValue": "0x013C000080", 6586 "Offcore": "1", 6587 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6588 "SampleAfterValue": "100003", 6589 "UMask": "0x1" 6590 }, 6591 { 6592 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 6593 "Counter": "0,1,2,3", 6594 "CounterHTOff": "0,1,2,3", 6595 "EventCode": "0xCD", 6596 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", 6597 "MSRIndex": "0x3F6", 6598 "MSRValue": "0x10", 6599 "PEBS": "2", 6600 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.", 6601 "SampleAfterValue": "20011", 6602 "TakenAlone": "1", 6603 "UMask": "0x1" 6604 }, 6605 { 6606 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 6607 "Counter": "0,1,2,3", 6608 "CounterHTOff": "0,1,2,3", 6609 "Deprecated": "1", 6610 "EventCode": "0xB7, 0xBB", 6611 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 6612 "MSRIndex": "0x1a6,0x1a7", 6613 "MSRValue": "0x083C000400", 6614 "Offcore": "1", 6615 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6616 "SampleAfterValue": "100003", 6617 "UMask": "0x1" 6618 }, 6619 { 6620 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 6621 "Counter": "0,1,2,3", 6622 "CounterHTOff": "0,1,2,3", 6623 "EventCode": "0xB7, 0xBB", 6624 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6625 "MSRIndex": "0x1a6,0x1a7", 6626 "MSRValue": "0x0084000020", 6627 "Offcore": "1", 6628 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6629 "SampleAfterValue": "100003", 6630 "UMask": "0x1" 6631 }, 6632 { 6633 "BriefDescription": "Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer.", 6634 "Counter": "0,1,2,3", 6635 "CounterHTOff": "0,1,2,3,4,5,6,7", 6636 "EventCode": "0x54", 6637 "EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", 6638 "PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.", 6639 "SampleAfterValue": "2000003", 6640 "UMask": "0x20" 6641 }, 6642 { 6643 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & SNOOP_MISS", 6644 "Counter": "0,1,2,3", 6645 "CounterHTOff": "0,1,2,3", 6646 "EventCode": "0xB7, 0xBB", 6647 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS", 6648 "MSRIndex": "0x1a6,0x1a7", 6649 "MSRValue": "0x023C000080", 6650 "Offcore": "1", 6651 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6652 "SampleAfterValue": "100003", 6653 "UMask": "0x1" 6654 }, 6655 { 6656 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6657 "Counter": "0,1,2,3", 6658 "CounterHTOff": "0,1,2,3", 6659 "Deprecated": "1", 6660 "EventCode": "0xB7, 0xBB", 6661 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6662 "MSRIndex": "0x1a6,0x1a7", 6663 "MSRValue": "0x0090000491", 6664 "Offcore": "1", 6665 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6666 "SampleAfterValue": "100003", 6667 "UMask": "0x1" 6668 }, 6669 { 6670 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6671 "Counter": "0,1,2,3", 6672 "CounterHTOff": "0,1,2,3", 6673 "Deprecated": "1", 6674 "EventCode": "0xB7, 0xBB", 6675 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6676 "MSRIndex": "0x1a6,0x1a7", 6677 "MSRValue": "0x3F84000400", 6678 "Offcore": "1", 6679 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6680 "SampleAfterValue": "100003", 6681 "UMask": "0x1" 6682 }, 6683 { 6684 "BriefDescription": "Counts demand data reads", 6685 "Counter": "0,1,2,3", 6686 "CounterHTOff": "0,1,2,3", 6687 "EventCode": "0xB7, 0xBB", 6688 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 6689 "MSRIndex": "0x1a6,0x1a7", 6690 "MSRValue": "0x0090000001", 6691 "Offcore": "1", 6692 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6693 "SampleAfterValue": "100003", 6694 "UMask": "0x1" 6695 }, 6696 { 6697 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & SNOOP_NONE", 6698 "Counter": "0,1,2,3", 6699 "CounterHTOff": "0,1,2,3", 6700 "EventCode": "0xB7, 0xBB", 6701 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 6702 "MSRIndex": "0x1a6,0x1a7", 6703 "MSRValue": "0x00BC000010", 6704 "Offcore": "1", 6705 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6706 "SampleAfterValue": "100003", 6707 "UMask": "0x1" 6708 }, 6709 { 6710 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 6711 "Counter": "0,1,2,3", 6712 "CounterHTOff": "0,1,2,3", 6713 "EventCode": "0xB7, 0xBB", 6714 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 6715 "MSRIndex": "0x1a6,0x1a7", 6716 "MSRValue": "0x1004000002", 6717 "Offcore": "1", 6718 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6719 "SampleAfterValue": "100003", 6720 "UMask": "0x1" 6721 }, 6722 { 6723 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6724 "Counter": "0,1,2,3", 6725 "CounterHTOff": "0,1,2,3", 6726 "Deprecated": "1", 6727 "EventCode": "0xB7, 0xBB", 6728 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 6729 "MSRIndex": "0x1a6,0x1a7", 6730 "MSRValue": "0x063B800400", 6731 "Offcore": "1", 6732 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6733 "SampleAfterValue": "100003", 6734 "UMask": "0x1" 6735 }, 6736 { 6737 "BriefDescription": "Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes.", 6738 "Counter": "0,1,2,3", 6739 "CounterHTOff": "0,1,2,3,4,5,6,7", 6740 "EventCode": "0x54", 6741 "EventName": "TX_MEM.ABORT_CAPACITY", 6742 "SampleAfterValue": "2000003", 6743 "UMask": "0x2" 6744 }, 6745 { 6746 "BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type", 6747 "Counter": "0,1,2,3", 6748 "CounterHTOff": "0,1,2,3,4,5,6,7", 6749 "EventCode": "0xC8", 6750 "EventName": "HLE_RETIRED.ABORTED_MEMTYPE", 6751 "PublicDescription": "Number of times an HLE execution aborted due to incompatible memory type.", 6752 "SampleAfterValue": "2000003", 6753 "UMask": "0x40" 6754 }, 6755 { 6756 "BriefDescription": "Number of times an RTM execution started.", 6757 "Counter": "0,1,2,3", 6758 "CounterHTOff": "0,1,2,3,4,5,6,7", 6759 "EventCode": "0xC9", 6760 "EventName": "RTM_RETIRED.START", 6761 "PublicDescription": "Number of times we entered an RTM region. Does not count nested transactions.", 6762 "SampleAfterValue": "2000003", 6763 "UMask": "0x1" 6764 }, 6765 { 6766 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 6767 "Counter": "0,1,2,3", 6768 "CounterHTOff": "0,1,2,3", 6769 "EventCode": "0xB7, 0xBB", 6770 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 6771 "MSRIndex": "0x1a6,0x1a7", 6772 "MSRValue": "0x0804000122", 6773 "Offcore": "1", 6774 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6775 "SampleAfterValue": "100003", 6776 "UMask": "0x1" 6777 }, 6778 { 6779 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_MISS", 6780 "Counter": "0,1,2,3", 6781 "CounterHTOff": "0,1,2,3", 6782 "EventCode": "0xB7, 0xBB", 6783 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6784 "MSRIndex": "0x1a6,0x1a7", 6785 "MSRValue": "0x0210000490", 6786 "Offcore": "1", 6787 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6788 "SampleAfterValue": "100003", 6789 "UMask": "0x1" 6790 }, 6791 { 6792 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 6793 "Counter": "0,1,2,3", 6794 "CounterHTOff": "0,1,2,3", 6795 "EventCode": "0xB7, 0xBB", 6796 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6797 "MSRIndex": "0x1a6,0x1a7", 6798 "MSRValue": "0x0404008000", 6799 "Offcore": "1", 6800 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6801 "SampleAfterValue": "100003", 6802 "UMask": "0x1" 6803 }, 6804 { 6805 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6806 "Counter": "0,1,2,3", 6807 "CounterHTOff": "0,1,2,3", 6808 "Deprecated": "1", 6809 "EventCode": "0xB7, 0xBB", 6810 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6811 "MSRIndex": "0x1a6,0x1a7", 6812 "MSRValue": "0x0210000100", 6813 "Offcore": "1", 6814 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6815 "SampleAfterValue": "100003", 6816 "UMask": "0x1" 6817 }, 6818 { 6819 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 6820 "Counter": "0,1,2,3", 6821 "CounterHTOff": "0,1,2,3", 6822 "EventCode": "0xB7, 0xBB", 6823 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6824 "MSRIndex": "0x1a6,0x1a7", 6825 "MSRValue": "0x1010000001", 6826 "Offcore": "1", 6827 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6828 "SampleAfterValue": "100003", 6829 "UMask": "0x1" 6830 }, 6831 { 6832 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 6833 "Counter": "0,1,2,3", 6834 "CounterHTOff": "0,1,2,3", 6835 "Deprecated": "1", 6836 "EventCode": "0xB7, 0xBB", 6837 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 6838 "MSRIndex": "0x1a6,0x1a7", 6839 "MSRValue": "0x00BC000490", 6840 "Offcore": "1", 6841 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6842 "SampleAfterValue": "100003", 6843 "UMask": "0x1" 6844 }, 6845 { 6846 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 6847 "Counter": "0,1,2,3", 6848 "CounterHTOff": "0,1,2,3", 6849 "EventCode": "0xB7, 0xBB", 6850 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6851 "MSRIndex": "0x1a6,0x1a7", 6852 "MSRValue": "0x1010000490", 6853 "Offcore": "1", 6854 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6855 "SampleAfterValue": "100003", 6856 "UMask": "0x1" 6857 }, 6858 { 6859 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6860 "Counter": "0,1,2,3", 6861 "CounterHTOff": "0,1,2,3", 6862 "Deprecated": "1", 6863 "EventCode": "0xB7, 0xBB", 6864 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 6865 "MSRIndex": "0x1a6,0x1a7", 6866 "MSRValue": "0x0084000080", 6867 "Offcore": "1", 6868 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6869 "SampleAfterValue": "100003", 6870 "UMask": "0x1" 6871 }, 6872 { 6873 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.", 6874 "Counter": "0,1,2,3", 6875 "CounterHTOff": "0,1,2,3", 6876 "EventCode": "0xCD", 6877 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", 6878 "MSRIndex": "0x3F6", 6879 "MSRValue": "0x200", 6880 "PEBS": "2", 6881 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.", 6882 "SampleAfterValue": "101", 6883 "TakenAlone": "1", 6884 "UMask": "0x1" 6885 }, 6886 { 6887 "BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).", 6888 "Counter": "0,1,2,3", 6889 "CounterHTOff": "0,1,2,3,4,5,6,7", 6890 "EventCode": "0xC8", 6891 "EventName": "HLE_RETIRED.ABORTED_UNFRIENDLY", 6892 "SampleAfterValue": "2000003", 6893 "UMask": "0x20" 6894 }, 6895 { 6896 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 6897 "Counter": "0,1,2,3", 6898 "CounterHTOff": "0,1,2,3", 6899 "EventCode": "0xB7, 0xBB", 6900 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 6901 "MSRIndex": "0x1a6,0x1a7", 6902 "MSRValue": "0x0404000010", 6903 "Offcore": "1", 6904 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6905 "SampleAfterValue": "100003", 6906 "UMask": "0x1" 6907 }, 6908 { 6909 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 6910 "Counter": "0,1,2,3", 6911 "CounterHTOff": "0,1,2,3", 6912 "Deprecated": "1", 6913 "EventCode": "0xB7, 0xBB", 6914 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE", 6915 "MSRIndex": "0x1a6,0x1a7", 6916 "MSRValue": "0x103C000020", 6917 "Offcore": "1", 6918 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6919 "SampleAfterValue": "100003", 6920 "UMask": "0x1" 6921 }, 6922 { 6923 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6924 "Counter": "0,1,2,3", 6925 "CounterHTOff": "0,1,2,3", 6926 "Deprecated": "1", 6927 "EventCode": "0xB7, 0xBB", 6928 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 6929 "MSRIndex": "0x1a6,0x1a7", 6930 "MSRValue": "0x0810000080", 6931 "Offcore": "1", 6932 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6933 "SampleAfterValue": "100003", 6934 "UMask": "0x1" 6935 }, 6936 { 6937 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6938 "Counter": "0,1,2,3", 6939 "CounterHTOff": "0,1,2,3", 6940 "Deprecated": "1", 6941 "EventCode": "0xB7, 0xBB", 6942 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 6943 "MSRIndex": "0x1a6,0x1a7", 6944 "MSRValue": "0x1010000120", 6945 "Offcore": "1", 6946 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6947 "SampleAfterValue": "100003", 6948 "UMask": "0x1" 6949 }, 6950 { 6951 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6952 "Counter": "0,1,2,3", 6953 "CounterHTOff": "0,1,2,3", 6954 "Deprecated": "1", 6955 "EventCode": "0xB7, 0xBB", 6956 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 6957 "MSRIndex": "0x1a6,0x1a7", 6958 "MSRValue": "0x3F84000490", 6959 "Offcore": "1", 6960 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6961 "SampleAfterValue": "100003", 6962 "UMask": "0x1" 6963 }, 6964 { 6965 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 6966 "Counter": "0,1,2,3", 6967 "CounterHTOff": "0,1,2,3", 6968 "EventCode": "0xB7, 0xBB", 6969 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 6970 "MSRIndex": "0x1a6,0x1a7", 6971 "MSRValue": "0x0604000010", 6972 "Offcore": "1", 6973 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6974 "SampleAfterValue": "100003", 6975 "UMask": "0x1" 6976 }, 6977 { 6978 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_MISS", 6979 "Counter": "0,1,2,3", 6980 "CounterHTOff": "0,1,2,3", 6981 "EventCode": "0xB7, 0xBB", 6982 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 6983 "MSRIndex": "0x1a6,0x1a7", 6984 "MSRValue": "0x02100007F7", 6985 "Offcore": "1", 6986 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 6987 "SampleAfterValue": "100003", 6988 "UMask": "0x1" 6989 }, 6990 { 6991 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 6992 "Counter": "0,1,2,3", 6993 "CounterHTOff": "0,1,2,3", 6994 "Deprecated": "1", 6995 "EventCode": "0xB7, 0xBB", 6996 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HITM_OTHER_CORE", 6997 "MSRIndex": "0x1a6,0x1a7", 6998 "MSRValue": "0x103C0007F7", 6999 "Offcore": "1", 7000 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7001 "SampleAfterValue": "100003", 7002 "UMask": "0x1" 7003 }, 7004 { 7005 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 7006 "Counter": "0,1,2,3", 7007 "CounterHTOff": "0,1,2,3", 7008 "Deprecated": "1", 7009 "EventCode": "0xB7, 0xBB", 7010 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED", 7011 "MSRIndex": "0x1a6,0x1a7", 7012 "MSRValue": "0x013C000020", 7013 "Offcore": "1", 7014 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7015 "SampleAfterValue": "100003", 7016 "UMask": "0x1" 7017 }, 7018 { 7019 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & NO_SNOOP_NEEDED", 7020 "Counter": "0,1,2,3", 7021 "CounterHTOff": "0,1,2,3", 7022 "EventCode": "0xB7, 0xBB", 7023 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED", 7024 "MSRIndex": "0x1a6,0x1a7", 7025 "MSRValue": "0x013C000004", 7026 "Offcore": "1", 7027 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7028 "SampleAfterValue": "100003", 7029 "UMask": "0x1" 7030 }, 7031 { 7032 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & HITM_OTHER_CORE", 7033 "Counter": "0,1,2,3", 7034 "CounterHTOff": "0,1,2,3", 7035 "EventCode": "0xB7, 0xBB", 7036 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 7037 "MSRIndex": "0x1a6,0x1a7", 7038 "MSRValue": "0x103C000400", 7039 "Offcore": "1", 7040 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7041 "SampleAfterValue": "100003", 7042 "UMask": "0x1" 7043 }, 7044 { 7045 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7046 "Counter": "0,1,2,3", 7047 "CounterHTOff": "0,1,2,3", 7048 "Deprecated": "1", 7049 "EventCode": "0xB7, 0xBB", 7050 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7051 "MSRIndex": "0x1a6,0x1a7", 7052 "MSRValue": "0x0110000002", 7053 "Offcore": "1", 7054 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7055 "SampleAfterValue": "100003", 7056 "UMask": "0x1" 7057 }, 7058 { 7059 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7060 "Counter": "0,1,2,3", 7061 "CounterHTOff": "0,1,2,3", 7062 "Deprecated": "1", 7063 "EventCode": "0xB7, 0xBB", 7064 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7065 "MSRIndex": "0x1a6,0x1a7", 7066 "MSRValue": "0x1010000122", 7067 "Offcore": "1", 7068 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7069 "SampleAfterValue": "100003", 7070 "UMask": "0x1" 7071 }, 7072 { 7073 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & REMOTE_HITM", 7074 "Counter": "0,1,2,3", 7075 "CounterHTOff": "0,1,2,3", 7076 "EventCode": "0xB7, 0xBB", 7077 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM", 7078 "MSRIndex": "0x1a6,0x1a7", 7079 "MSRValue": "0x103FC00001", 7080 "Offcore": "1", 7081 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7082 "SampleAfterValue": "100003", 7083 "UMask": "0x1" 7084 }, 7085 { 7086 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS & NO_SNOOP_NEEDED", 7087 "Counter": "0,1,2,3", 7088 "CounterHTOff": "0,1,2,3", 7089 "EventCode": "0xB7, 0xBB", 7090 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7091 "MSRIndex": "0x1a6,0x1a7", 7092 "MSRValue": "0x013C000001", 7093 "Offcore": "1", 7094 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7095 "SampleAfterValue": "100003", 7096 "UMask": "0x1" 7097 }, 7098 { 7099 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 7100 "Counter": "0,1,2,3", 7101 "CounterHTOff": "0,1,2,3", 7102 "EventCode": "0xB7, 0xBB", 7103 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7104 "MSRIndex": "0x1a6,0x1a7", 7105 "MSRValue": "0x063B800020", 7106 "Offcore": "1", 7107 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7108 "SampleAfterValue": "100003", 7109 "UMask": "0x1" 7110 }, 7111 { 7112 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7113 "Counter": "0,1,2,3", 7114 "CounterHTOff": "0,1,2,3", 7115 "Deprecated": "1", 7116 "EventCode": "0xB7, 0xBB", 7117 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7118 "MSRIndex": "0x1a6,0x1a7", 7119 "MSRValue": "0x04100007F7", 7120 "Offcore": "1", 7121 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7122 "SampleAfterValue": "100003", 7123 "UMask": "0x1" 7124 }, 7125 { 7126 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 7127 "Counter": "0,1,2,3", 7128 "CounterHTOff": "0,1,2,3", 7129 "EventCode": "0xB7, 0xBB", 7130 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7131 "MSRIndex": "0x1a6,0x1a7", 7132 "MSRValue": "0x0604000080", 7133 "Offcore": "1", 7134 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7135 "SampleAfterValue": "100003", 7136 "UMask": "0x1" 7137 }, 7138 { 7139 "BriefDescription": "ALL_RFO & L3_MISS & ANY_SNOOP", 7140 "Counter": "0,1,2,3", 7141 "CounterHTOff": "0,1,2,3", 7142 "EventCode": "0xB7, 0xBB", 7143 "EventName": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP", 7144 "MSRIndex": "0x1a6,0x1a7", 7145 "MSRValue": "0x3FBC000122", 7146 "Offcore": "1", 7147 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7148 "SampleAfterValue": "100003", 7149 "UMask": "0x1" 7150 }, 7151 { 7152 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 7153 "Counter": "0,1,2,3", 7154 "CounterHTOff": "0,1,2,3", 7155 "EventCode": "0xB7, 0xBB", 7156 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 7157 "MSRIndex": "0x1a6,0x1a7", 7158 "MSRValue": "0x3F90000490", 7159 "Offcore": "1", 7160 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7161 "SampleAfterValue": "100003", 7162 "UMask": "0x1" 7163 }, 7164 { 7165 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7166 "Counter": "0,1,2,3", 7167 "CounterHTOff": "0,1,2,3", 7168 "Deprecated": "1", 7169 "EventCode": "0xB7, 0xBB", 7170 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7171 "MSRIndex": "0x1a6,0x1a7", 7172 "MSRValue": "0x1010000490", 7173 "Offcore": "1", 7174 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7175 "SampleAfterValue": "100003", 7176 "UMask": "0x1" 7177 }, 7178 { 7179 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 7180 "Counter": "0,1,2,3", 7181 "CounterHTOff": "0,1,2,3", 7182 "Deprecated": "1", 7183 "EventCode": "0xB7, 0xBB", 7184 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP", 7185 "MSRIndex": "0x1a6,0x1a7", 7186 "MSRValue": "0x3FBC000004", 7187 "Offcore": "1", 7188 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7189 "SampleAfterValue": "100003", 7190 "UMask": "0x1" 7191 }, 7192 { 7193 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7194 "Counter": "0,1,2,3", 7195 "CounterHTOff": "0,1,2,3", 7196 "Deprecated": "1", 7197 "EventCode": "0xB7, 0xBB", 7198 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7199 "MSRIndex": "0x1a6,0x1a7", 7200 "MSRValue": "0x083FC00120", 7201 "Offcore": "1", 7202 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7203 "SampleAfterValue": "100003", 7204 "UMask": "0x1" 7205 }, 7206 { 7207 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & HIT_OTHER_CORE_FWD", 7208 "Counter": "0,1,2,3", 7209 "CounterHTOff": "0,1,2,3", 7210 "EventCode": "0xB7, 0xBB", 7211 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7212 "MSRIndex": "0x1a6,0x1a7", 7213 "MSRValue": "0x083C000004", 7214 "Offcore": "1", 7215 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7216 "SampleAfterValue": "100003", 7217 "UMask": "0x1" 7218 }, 7219 { 7220 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & REMOTE_HITM", 7221 "Counter": "0,1,2,3", 7222 "CounterHTOff": "0,1,2,3", 7223 "EventCode": "0xB7, 0xBB", 7224 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 7225 "MSRIndex": "0x1a6,0x1a7", 7226 "MSRValue": "0x103FC00010", 7227 "Offcore": "1", 7228 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7229 "SampleAfterValue": "100003", 7230 "UMask": "0x1" 7231 }, 7232 { 7233 "BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the superQ.", 7234 "Counter": "0,1,2,3", 7235 "CounterHTOff": "0,1,2,3,4,5,6,7", 7236 "CounterMask": "6", 7237 "EventCode": "0x60", 7238 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6", 7239 "SampleAfterValue": "2000003", 7240 "UMask": "0x10" 7241 }, 7242 { 7243 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.", 7244 "Counter": "0,1,2,3", 7245 "CounterHTOff": "0,1,2,3", 7246 "EventCode": "0xCD", 7247 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", 7248 "MSRIndex": "0x3F6", 7249 "MSRValue": "0x40", 7250 "PEBS": "2", 7251 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.", 7252 "SampleAfterValue": "2003", 7253 "TakenAlone": "1", 7254 "UMask": "0x1" 7255 }, 7256 { 7257 "BriefDescription": "ALL_RFO & L3_MISS & HITM_OTHER_CORE", 7258 "Counter": "0,1,2,3", 7259 "CounterHTOff": "0,1,2,3", 7260 "EventCode": "0xB7, 0xBB", 7261 "EventName": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE", 7262 "MSRIndex": "0x1a6,0x1a7", 7263 "MSRValue": "0x103C000122", 7264 "Offcore": "1", 7265 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7266 "SampleAfterValue": "100003", 7267 "UMask": "0x1" 7268 }, 7269 { 7270 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7271 "Counter": "0,1,2,3", 7272 "CounterHTOff": "0,1,2,3", 7273 "Deprecated": "1", 7274 "EventCode": "0xB7, 0xBB", 7275 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7276 "MSRIndex": "0x1a6,0x1a7", 7277 "MSRValue": "0x043C000002", 7278 "Offcore": "1", 7279 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7280 "SampleAfterValue": "100003", 7281 "UMask": "0x1" 7282 }, 7283 { 7284 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7285 "Counter": "0,1,2,3", 7286 "CounterHTOff": "0,1,2,3", 7287 "Deprecated": "1", 7288 "EventCode": "0xB7, 0xBB", 7289 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 7290 "MSRIndex": "0x1a6,0x1a7", 7291 "MSRValue": "0x0404000010", 7292 "Offcore": "1", 7293 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7294 "SampleAfterValue": "100003", 7295 "UMask": "0x1" 7296 }, 7297 { 7298 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS & SNOOP_NONE", 7299 "Counter": "0,1,2,3", 7300 "CounterHTOff": "0,1,2,3", 7301 "EventCode": "0xB7, 0xBB", 7302 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE", 7303 "MSRIndex": "0x1a6,0x1a7", 7304 "MSRValue": "0x00BC000490", 7305 "Offcore": "1", 7306 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7307 "SampleAfterValue": "100003", 7308 "UMask": "0x1" 7309 }, 7310 { 7311 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 7312 "Counter": "0,1,2,3", 7313 "CounterHTOff": "0,1,2,3", 7314 "Deprecated": "1", 7315 "EventCode": "0xB7, 0xBB", 7316 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 7317 "MSRIndex": "0x1a6,0x1a7", 7318 "MSRValue": "0x103FC00120", 7319 "Offcore": "1", 7320 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7321 "SampleAfterValue": "100003", 7322 "UMask": "0x1" 7323 }, 7324 { 7325 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7326 "Counter": "0,1,2,3", 7327 "CounterHTOff": "0,1,2,3", 7328 "Deprecated": "1", 7329 "EventCode": "0xB7, 0xBB", 7330 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 7331 "MSRIndex": "0x1a6,0x1a7", 7332 "MSRValue": "0x0090000122", 7333 "Offcore": "1", 7334 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7335 "SampleAfterValue": "100003", 7336 "UMask": "0x1" 7337 }, 7338 { 7339 "BriefDescription": "Counts any other requests OTHER & L3_MISS & NO_SNOOP_NEEDED", 7340 "Counter": "0,1,2,3", 7341 "CounterHTOff": "0,1,2,3", 7342 "EventCode": "0xB7, 0xBB", 7343 "EventName": "OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7344 "MSRIndex": "0x1a6,0x1a7", 7345 "MSRValue": "0x013C008000", 7346 "Offcore": "1", 7347 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7348 "SampleAfterValue": "100003", 7349 "UMask": "0x1" 7350 }, 7351 { 7352 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7353 "Counter": "0,1,2,3", 7354 "CounterHTOff": "0,1,2,3", 7355 "Deprecated": "1", 7356 "EventCode": "0xB7, 0xBB", 7357 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7358 "MSRIndex": "0x1a6,0x1a7", 7359 "MSRValue": "0x0204000120", 7360 "Offcore": "1", 7361 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7362 "SampleAfterValue": "100003", 7363 "UMask": "0x1" 7364 }, 7365 { 7366 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7367 "Counter": "0,1,2,3", 7368 "CounterHTOff": "0,1,2,3", 7369 "Deprecated": "1", 7370 "EventCode": "0xB7, 0xBB", 7371 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7372 "MSRIndex": "0x1a6,0x1a7", 7373 "MSRValue": "0x063B800010", 7374 "Offcore": "1", 7375 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7376 "SampleAfterValue": "100003", 7377 "UMask": "0x1" 7378 }, 7379 { 7380 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7381 "Counter": "0,1,2,3", 7382 "CounterHTOff": "0,1,2,3", 7383 "Deprecated": "1", 7384 "EventCode": "0xB7, 0xBB", 7385 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 7386 "MSRIndex": "0x1a6,0x1a7", 7387 "MSRValue": "0x0204000491", 7388 "Offcore": "1", 7389 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7390 "SampleAfterValue": "100003", 7391 "UMask": "0x1" 7392 }, 7393 { 7394 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7395 "Counter": "0,1,2,3", 7396 "CounterHTOff": "0,1,2,3", 7397 "Deprecated": "1", 7398 "EventCode": "0xB7, 0xBB", 7399 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7400 "MSRIndex": "0x1a6,0x1a7", 7401 "MSRValue": "0x083FC00020", 7402 "Offcore": "1", 7403 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7404 "SampleAfterValue": "100003", 7405 "UMask": "0x1" 7406 }, 7407 { 7408 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 7409 "Counter": "0,1,2,3", 7410 "CounterHTOff": "0,1,2,3", 7411 "EventCode": "0xB7, 0xBB", 7412 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7413 "MSRIndex": "0x1a6,0x1a7", 7414 "MSRValue": "0x063B800400", 7415 "Offcore": "1", 7416 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7417 "SampleAfterValue": "100003", 7418 "UMask": "0x1" 7419 }, 7420 { 7421 "BriefDescription": "Counts any other requests OTHER & L3_MISS & ANY_SNOOP", 7422 "Counter": "0,1,2,3", 7423 "CounterHTOff": "0,1,2,3", 7424 "EventCode": "0xB7, 0xBB", 7425 "EventName": "OCR.OTHER.L3_MISS.ANY_SNOOP", 7426 "MSRIndex": "0x1a6,0x1a7", 7427 "MSRValue": "0x3FBC008000", 7428 "Offcore": "1", 7429 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7430 "SampleAfterValue": "100003", 7431 "UMask": "0x1" 7432 }, 7433 { 7434 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 7435 "Counter": "0,1,2,3", 7436 "CounterHTOff": "0,1,2,3", 7437 "EventCode": "0xB7, 0xBB", 7438 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7439 "MSRIndex": "0x1a6,0x1a7", 7440 "MSRValue": "0x0110000004", 7441 "Offcore": "1", 7442 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7443 "SampleAfterValue": "100003", 7444 "UMask": "0x1" 7445 }, 7446 { 7447 "BriefDescription": "ALL_RFO & L3_MISS & HIT_OTHER_CORE_NO_FWD", 7448 "Counter": "0,1,2,3", 7449 "CounterHTOff": "0,1,2,3", 7450 "EventCode": "0xB7, 0xBB", 7451 "EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7452 "MSRIndex": "0x1a6,0x1a7", 7453 "MSRValue": "0x043C000122", 7454 "Offcore": "1", 7455 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7456 "SampleAfterValue": "100003", 7457 "UMask": "0x1" 7458 }, 7459 { 7460 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 7461 "Counter": "0,1,2,3", 7462 "CounterHTOff": "0,1,2,3", 7463 "EventCode": "0xB7, 0xBB", 7464 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7465 "MSRIndex": "0x1a6,0x1a7", 7466 "MSRValue": "0x0604000122", 7467 "Offcore": "1", 7468 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7469 "SampleAfterValue": "100003", 7470 "UMask": "0x1" 7471 }, 7472 { 7473 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & HIT_OTHER_CORE_FWD", 7474 "Counter": "0,1,2,3", 7475 "CounterHTOff": "0,1,2,3", 7476 "EventCode": "0xB7, 0xBB", 7477 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7478 "MSRIndex": "0x1a6,0x1a7", 7479 "MSRValue": "0x083C000080", 7480 "Offcore": "1", 7481 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7482 "SampleAfterValue": "100003", 7483 "UMask": "0x1" 7484 }, 7485 { 7486 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 7487 "Counter": "0,1,2,3", 7488 "CounterHTOff": "0,1,2,3", 7489 "EventCode": "0xB7, 0xBB", 7490 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 7491 "MSRIndex": "0x1a6,0x1a7", 7492 "MSRValue": "0x0604000490", 7493 "Offcore": "1", 7494 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7495 "SampleAfterValue": "100003", 7496 "UMask": "0x1" 7497 }, 7498 { 7499 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7500 "Counter": "0,1,2,3", 7501 "CounterHTOff": "0,1,2,3", 7502 "Deprecated": "1", 7503 "EventCode": "0xB7, 0xBB", 7504 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7505 "MSRIndex": "0x1a6,0x1a7", 7506 "MSRValue": "0x0210000080", 7507 "Offcore": "1", 7508 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7509 "SampleAfterValue": "100003", 7510 "UMask": "0x1" 7511 }, 7512 { 7513 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 7514 "Counter": "0,1,2,3", 7515 "CounterHTOff": "0,1,2,3", 7516 "Deprecated": "1", 7517 "EventCode": "0xB7, 0xBB", 7518 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HITM", 7519 "MSRIndex": "0x1a6,0x1a7", 7520 "MSRValue": "0x103FC00020", 7521 "Offcore": "1", 7522 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7523 "SampleAfterValue": "100003", 7524 "UMask": "0x1" 7525 }, 7526 { 7527 "BriefDescription": "ALL_PF_RFO & L3_MISS & REMOTE_HIT_FORWARD", 7528 "Counter": "0,1,2,3", 7529 "CounterHTOff": "0,1,2,3", 7530 "EventCode": "0xB7, 0xBB", 7531 "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD", 7532 "MSRIndex": "0x1a6,0x1a7", 7533 "MSRValue": "0x083FC00120", 7534 "Offcore": "1", 7535 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7536 "SampleAfterValue": "100003", 7537 "UMask": "0x1" 7538 }, 7539 { 7540 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7541 "Counter": "0,1,2,3", 7542 "CounterHTOff": "0,1,2,3", 7543 "Deprecated": "1", 7544 "EventCode": "0xB7, 0xBB", 7545 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7546 "MSRIndex": "0x1a6,0x1a7", 7547 "MSRValue": "0x0804000080", 7548 "Offcore": "1", 7549 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7550 "SampleAfterValue": "100003", 7551 "UMask": "0x1" 7552 }, 7553 { 7554 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 7555 "Counter": "0,1,2,3", 7556 "CounterHTOff": "0,1,2,3", 7557 "EventCode": "0xB7, 0xBB", 7558 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7559 "MSRIndex": "0x1a6,0x1a7", 7560 "MSRValue": "0x1004000120", 7561 "Offcore": "1", 7562 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7563 "SampleAfterValue": "100003", 7564 "UMask": "0x1" 7565 }, 7566 { 7567 "BriefDescription": "Counts any other requests OTHER & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 7568 "Counter": "0,1,2,3", 7569 "CounterHTOff": "0,1,2,3", 7570 "EventCode": "0xB7, 0xBB", 7571 "EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7572 "MSRIndex": "0x1a6,0x1a7", 7573 "MSRValue": "0x3F84008000", 7574 "Offcore": "1", 7575 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7576 "SampleAfterValue": "100003", 7577 "UMask": "0x1" 7578 }, 7579 { 7580 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & HIT_OTHER_CORE_NO_FWD", 7581 "Counter": "0,1,2,3", 7582 "CounterHTOff": "0,1,2,3", 7583 "EventCode": "0xB7, 0xBB", 7584 "EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7585 "MSRIndex": "0x1a6,0x1a7", 7586 "MSRValue": "0x043C000100", 7587 "Offcore": "1", 7588 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7589 "SampleAfterValue": "100003", 7590 "UMask": "0x1" 7591 }, 7592 { 7593 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HITM_OTHER_CORE", 7594 "Counter": "0,1,2,3", 7595 "CounterHTOff": "0,1,2,3", 7596 "Deprecated": "1", 7597 "EventCode": "0xB7, 0xBB", 7598 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HITM_OTHER_CORE", 7599 "MSRIndex": "0x1a6,0x1a7", 7600 "MSRValue": "0x103C008000", 7601 "Offcore": "1", 7602 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7603 "SampleAfterValue": "100003", 7604 "UMask": "0x1" 7605 }, 7606 { 7607 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 7608 "Counter": "0,1,2,3", 7609 "CounterHTOff": "0,1,2,3", 7610 "EventCode": "0xB7, 0xBB", 7611 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7612 "MSRIndex": "0x1a6,0x1a7", 7613 "MSRValue": "0x3F84000002", 7614 "Offcore": "1", 7615 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7616 "SampleAfterValue": "100003", 7617 "UMask": "0x1" 7618 }, 7619 { 7620 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & HITM_OTHER_CORE", 7621 "Counter": "0,1,2,3", 7622 "CounterHTOff": "0,1,2,3", 7623 "EventCode": "0xB7, 0xBB", 7624 "EventName": "OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE", 7625 "MSRIndex": "0x1a6,0x1a7", 7626 "MSRValue": "0x103C000002", 7627 "Offcore": "1", 7628 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7629 "SampleAfterValue": "100003", 7630 "UMask": "0x1" 7631 }, 7632 { 7633 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 7634 "Counter": "0,1,2,3", 7635 "CounterHTOff": "0,1,2,3", 7636 "Deprecated": "1", 7637 "EventCode": "0xB7, 0xBB", 7638 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM", 7639 "MSRIndex": "0x1a6,0x1a7", 7640 "MSRValue": "0x103FC00400", 7641 "Offcore": "1", 7642 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7643 "SampleAfterValue": "100003", 7644 "UMask": "0x1" 7645 }, 7646 { 7647 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7648 "Counter": "0,1,2,3", 7649 "CounterHTOff": "0,1,2,3", 7650 "Deprecated": "1", 7651 "EventCode": "0xB7, 0xBB", 7652 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 7653 "MSRIndex": "0x1a6,0x1a7", 7654 "MSRValue": "0x0410000120", 7655 "Offcore": "1", 7656 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7657 "SampleAfterValue": "100003", 7658 "UMask": "0x1" 7659 }, 7660 { 7661 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_MISS", 7662 "Counter": "0,1,2,3", 7663 "CounterHTOff": "0,1,2,3", 7664 "EventCode": "0xB7, 0xBB", 7665 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7666 "MSRIndex": "0x1a6,0x1a7", 7667 "MSRValue": "0x0210000491", 7668 "Offcore": "1", 7669 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7670 "SampleAfterValue": "100003", 7671 "UMask": "0x1" 7672 }, 7673 { 7674 "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.", 7675 "Counter": "0,1,2,3", 7676 "CounterHTOff": "0,1,2,3,4,5,6,7", 7677 "CounterMask": "2", 7678 "EventCode": "0xA3", 7679 "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS", 7680 "SampleAfterValue": "2000003", 7681 "UMask": "0x2" 7682 }, 7683 { 7684 "BriefDescription": "Counts any other requests OTHER & L3_MISS & REMOTE_HITM", 7685 "Counter": "0,1,2,3", 7686 "CounterHTOff": "0,1,2,3", 7687 "EventCode": "0xB7, 0xBB", 7688 "EventName": "OCR.OTHER.L3_MISS.REMOTE_HITM", 7689 "MSRIndex": "0x1a6,0x1a7", 7690 "MSRValue": "0x103FC08000", 7691 "Offcore": "1", 7692 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7693 "SampleAfterValue": "100003", 7694 "UMask": "0x1" 7695 }, 7696 { 7697 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 7698 "Counter": "0,1,2,3", 7699 "CounterHTOff": "0,1,2,3", 7700 "Deprecated": "1", 7701 "EventCode": "0xB7, 0xBB", 7702 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED", 7703 "MSRIndex": "0x1a6,0x1a7", 7704 "MSRValue": "0x013C000122", 7705 "Offcore": "1", 7706 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7707 "SampleAfterValue": "100003", 7708 "UMask": "0x1" 7709 }, 7710 { 7711 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 7712 "Counter": "0,1,2,3", 7713 "CounterHTOff": "0,1,2,3", 7714 "EventCode": "0xB7, 0xBB", 7715 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 7716 "MSRIndex": "0x1a6,0x1a7", 7717 "MSRValue": "0x063B800001", 7718 "Offcore": "1", 7719 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7720 "SampleAfterValue": "100003", 7721 "UMask": "0x1" 7722 }, 7723 { 7724 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7725 "Counter": "0,1,2,3", 7726 "CounterHTOff": "0,1,2,3", 7727 "Deprecated": "1", 7728 "EventCode": "0xB7, 0xBB", 7729 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.NO_SNOOP_NEEDED", 7730 "MSRIndex": "0x1a6,0x1a7", 7731 "MSRValue": "0x013C008000", 7732 "Offcore": "1", 7733 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7734 "SampleAfterValue": "100003", 7735 "UMask": "0x1" 7736 }, 7737 { 7738 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 7739 "Counter": "0,1,2,3", 7740 "CounterHTOff": "0,1,2,3", 7741 "EventCode": "0xB7, 0xBB", 7742 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7743 "MSRIndex": "0x1a6,0x1a7", 7744 "MSRValue": "0x043C000080", 7745 "Offcore": "1", 7746 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7747 "SampleAfterValue": "100003", 7748 "UMask": "0x1" 7749 }, 7750 { 7751 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7752 "Counter": "0,1,2,3", 7753 "CounterHTOff": "0,1,2,3", 7754 "Deprecated": "1", 7755 "EventCode": "0xB7, 0xBB", 7756 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7757 "MSRIndex": "0x1a6,0x1a7", 7758 "MSRValue": "0x3F84000122", 7759 "Offcore": "1", 7760 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7761 "SampleAfterValue": "100003", 7762 "UMask": "0x1" 7763 }, 7764 { 7765 "BriefDescription": "ALL_PF_RFO & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_MISS", 7766 "Counter": "0,1,2,3", 7767 "CounterHTOff": "0,1,2,3", 7768 "EventCode": "0xB7, 0xBB", 7769 "EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7770 "MSRIndex": "0x1a6,0x1a7", 7771 "MSRValue": "0x0210000120", 7772 "Offcore": "1", 7773 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7774 "SampleAfterValue": "100003", 7775 "UMask": "0x1" 7776 }, 7777 { 7778 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7779 "Counter": "0,1,2,3", 7780 "CounterHTOff": "0,1,2,3", 7781 "Deprecated": "1", 7782 "EventCode": "0xB7, 0xBB", 7783 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD", 7784 "MSRIndex": "0x1a6,0x1a7", 7785 "MSRValue": "0x043C0007F7", 7786 "Offcore": "1", 7787 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7788 "SampleAfterValue": "100003", 7789 "UMask": "0x1" 7790 }, 7791 { 7792 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 7793 "Counter": "0,1,2,3", 7794 "CounterHTOff": "0,1,2,3", 7795 "EventCode": "0xB7, 0xBB", 7796 "EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 7797 "MSRIndex": "0x1a6,0x1a7", 7798 "MSRValue": "0x0110000002", 7799 "Offcore": "1", 7800 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7801 "SampleAfterValue": "100003", 7802 "UMask": "0x1" 7803 }, 7804 { 7805 "BriefDescription": "ALL_DATA_RD & L3_MISS & SNOOP_NONE", 7806 "Counter": "0,1,2,3", 7807 "CounterHTOff": "0,1,2,3", 7808 "EventCode": "0xB7, 0xBB", 7809 "EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE", 7810 "MSRIndex": "0x1a6,0x1a7", 7811 "MSRValue": "0x00BC000491", 7812 "Offcore": "1", 7813 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7814 "SampleAfterValue": "100003", 7815 "UMask": "0x1" 7816 }, 7817 { 7818 "BriefDescription": "ALL_DATA_RD & L3_MISS & NO_SNOOP_NEEDED", 7819 "Counter": "0,1,2,3", 7820 "CounterHTOff": "0,1,2,3", 7821 "EventCode": "0xB7, 0xBB", 7822 "EventName": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 7823 "MSRIndex": "0x1a6,0x1a7", 7824 "MSRValue": "0x013C000491", 7825 "Offcore": "1", 7826 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7827 "SampleAfterValue": "100003", 7828 "UMask": "0x1" 7829 }, 7830 { 7831 "BriefDescription": "ALL_RFO & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 7832 "Counter": "0,1,2,3", 7833 "CounterHTOff": "0,1,2,3", 7834 "EventCode": "0xB7, 0xBB", 7835 "EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 7836 "MSRIndex": "0x1a6,0x1a7", 7837 "MSRValue": "0x3F84000122", 7838 "Offcore": "1", 7839 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7840 "SampleAfterValue": "100003", 7841 "UMask": "0x1" 7842 }, 7843 { 7844 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_NONE", 7845 "Counter": "0,1,2,3", 7846 "CounterHTOff": "0,1,2,3", 7847 "EventCode": "0xB7, 0xBB", 7848 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 7849 "MSRIndex": "0x1a6,0x1a7", 7850 "MSRValue": "0x0084000490", 7851 "Offcore": "1", 7852 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7853 "SampleAfterValue": "100003", 7854 "UMask": "0x1" 7855 }, 7856 { 7857 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 7858 "Counter": "0,1,2,3", 7859 "CounterHTOff": "0,1,2,3", 7860 "EventCode": "0xB7, 0xBB", 7861 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 7862 "MSRIndex": "0x1a6,0x1a7", 7863 "MSRValue": "0x0804000001", 7864 "Offcore": "1", 7865 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7866 "SampleAfterValue": "100003", 7867 "UMask": "0x1" 7868 }, 7869 { 7870 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7871 "Counter": "0,1,2,3", 7872 "CounterHTOff": "0,1,2,3", 7873 "Deprecated": "1", 7874 "EventCode": "0xB7, 0xBB", 7875 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HIT_FORWARD", 7876 "MSRIndex": "0x1a6,0x1a7", 7877 "MSRValue": "0x083FC08000", 7878 "Offcore": "1", 7879 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7880 "SampleAfterValue": "100003", 7881 "UMask": "0x1" 7882 }, 7883 { 7884 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7885 "Counter": "0,1,2,3", 7886 "CounterHTOff": "0,1,2,3", 7887 "Deprecated": "1", 7888 "EventCode": "0xB7, 0xBB", 7889 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7890 "MSRIndex": "0x1a6,0x1a7", 7891 "MSRValue": "0x0810000120", 7892 "Offcore": "1", 7893 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7894 "SampleAfterValue": "100003", 7895 "UMask": "0x1" 7896 }, 7897 { 7898 "BriefDescription": "ALL_DATA_RD & L3_MISS & HITM_OTHER_CORE", 7899 "Counter": "0,1,2,3", 7900 "CounterHTOff": "0,1,2,3", 7901 "EventCode": "0xB7, 0xBB", 7902 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 7903 "MSRIndex": "0x1a6,0x1a7", 7904 "MSRValue": "0x103C000491", 7905 "Offcore": "1", 7906 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7907 "SampleAfterValue": "100003", 7908 "UMask": "0x1" 7909 }, 7910 { 7911 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP", 7912 "Counter": "0,1,2,3", 7913 "CounterHTOff": "0,1,2,3", 7914 "Deprecated": "1", 7915 "EventCode": "0xB7, 0xBB", 7916 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.ANY_SNOOP", 7917 "MSRIndex": "0x1a6,0x1a7", 7918 "MSRValue": "0x3FBC000020", 7919 "Offcore": "1", 7920 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7921 "SampleAfterValue": "100003", 7922 "UMask": "0x1" 7923 }, 7924 { 7925 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 7926 "Counter": "0,1,2,3", 7927 "CounterHTOff": "0,1,2,3", 7928 "EventCode": "0xB7, 0xBB", 7929 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 7930 "MSRIndex": "0x1a6,0x1a7", 7931 "MSRValue": "0x1010000080", 7932 "Offcore": "1", 7933 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7934 "SampleAfterValue": "100003", 7935 "UMask": "0x1" 7936 }, 7937 { 7938 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7939 "Counter": "0,1,2,3", 7940 "CounterHTOff": "0,1,2,3", 7941 "Deprecated": "1", 7942 "EventCode": "0xB7, 0xBB", 7943 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 7944 "MSRIndex": "0x1a6,0x1a7", 7945 "MSRValue": "0x083C000001", 7946 "Offcore": "1", 7947 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7948 "SampleAfterValue": "100003", 7949 "UMask": "0x1" 7950 }, 7951 { 7952 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 7953 "Counter": "0,1,2,3", 7954 "CounterHTOff": "0,1,2,3", 7955 "EventCode": "0xB7, 0xBB", 7956 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 7957 "MSRIndex": "0x1a6,0x1a7", 7958 "MSRValue": "0x0104000491", 7959 "Offcore": "1", 7960 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7961 "SampleAfterValue": "100003", 7962 "UMask": "0x1" 7963 }, 7964 { 7965 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7966 "Counter": "0,1,2,3", 7967 "CounterHTOff": "0,1,2,3", 7968 "Deprecated": "1", 7969 "EventCode": "0xB7, 0xBB", 7970 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 7971 "MSRIndex": "0x1a6,0x1a7", 7972 "MSRValue": "0x1004008000", 7973 "Offcore": "1", 7974 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7975 "SampleAfterValue": "100003", 7976 "UMask": "0x1" 7977 }, 7978 { 7979 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 7980 "Counter": "0,1,2,3", 7981 "CounterHTOff": "0,1,2,3", 7982 "EventCode": "0xB7, 0xBB", 7983 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 7984 "MSRIndex": "0x1a6,0x1a7", 7985 "MSRValue": "0x0810000001", 7986 "Offcore": "1", 7987 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 7988 "SampleAfterValue": "100003", 7989 "UMask": "0x1" 7990 }, 7991 { 7992 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7993 "Counter": "0,1,2,3", 7994 "CounterHTOff": "0,1,2,3", 7995 "Deprecated": "1", 7996 "EventCode": "0xB7, 0xBB", 7997 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 7998 "MSRIndex": "0x1a6,0x1a7", 7999 "MSRValue": "0x0210000010", 8000 "Offcore": "1", 8001 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8002 "SampleAfterValue": "100003", 8003 "UMask": "0x1" 8004 }, 8005 { 8006 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 8007 "Counter": "0,1,2,3", 8008 "CounterHTOff": "0,1,2,3", 8009 "EventCode": "0xB7, 0xBB", 8010 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8011 "MSRIndex": "0x1a6,0x1a7", 8012 "MSRValue": "0x0104000010", 8013 "Offcore": "1", 8014 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8015 "SampleAfterValue": "100003", 8016 "UMask": "0x1" 8017 }, 8018 { 8019 "BriefDescription": "Number of times an RTM execution successfully committed", 8020 "Counter": "0,1,2,3", 8021 "CounterHTOff": "0,1,2,3,4,5,6,7", 8022 "EventCode": "0xC9", 8023 "EventName": "RTM_RETIRED.COMMIT", 8024 "PublicDescription": "Number of times RTM commit succeeded.", 8025 "SampleAfterValue": "2000003", 8026 "UMask": "0x2" 8027 }, 8028 { 8029 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & SNOOP_MISS_OR_NO_FWD", 8030 "Counter": "0,1,2,3", 8031 "CounterHTOff": "0,1,2,3", 8032 "EventCode": "0xB7, 0xBB", 8033 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8034 "MSRIndex": "0x1a6,0x1a7", 8035 "MSRValue": "0x0604000400", 8036 "Offcore": "1", 8037 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8038 "SampleAfterValue": "100003", 8039 "UMask": "0x1" 8040 }, 8041 { 8042 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 8043 "Counter": "0,1,2,3", 8044 "CounterHTOff": "0,1,2,3", 8045 "EventCode": "0xB7, 0xBB", 8046 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8047 "MSRIndex": "0x1a6,0x1a7", 8048 "MSRValue": "0x1004000491", 8049 "Offcore": "1", 8050 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8051 "SampleAfterValue": "100003", 8052 "UMask": "0x1" 8053 }, 8054 { 8055 "BriefDescription": "Number of times an HLE execution aborted due to unfriendly events (such as interrupts).", 8056 "Counter": "0,1,2,3", 8057 "CounterHTOff": "0,1,2,3,4,5,6,7", 8058 "EventCode": "0xC8", 8059 "EventName": "HLE_RETIRED.ABORTED_EVENTS", 8060 "SampleAfterValue": "2000003", 8061 "UMask": "0x80" 8062 }, 8063 { 8064 "BriefDescription": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the superQ every cycle.", 8065 "Counter": "0,1,2,3", 8066 "CounterHTOff": "0,1,2,3,4,5,6,7", 8067 "EventCode": "0x60", 8068 "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", 8069 "SampleAfterValue": "2000003", 8070 "UMask": "0x10" 8071 }, 8072 { 8073 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & ANY_SNOOP", 8074 "Counter": "0,1,2,3", 8075 "CounterHTOff": "0,1,2,3", 8076 "EventCode": "0xB7, 0xBB", 8077 "EventName": "OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP", 8078 "MSRIndex": "0x1a6,0x1a7", 8079 "MSRValue": "0x3FBC000002", 8080 "Offcore": "1", 8081 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8082 "SampleAfterValue": "100003", 8083 "UMask": "0x1" 8084 }, 8085 { 8086 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_LOCAL_DRAM & SNOOP_MISS", 8087 "Counter": "0,1,2,3", 8088 "CounterHTOff": "0,1,2,3", 8089 "EventCode": "0xB7, 0xBB", 8090 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8091 "MSRIndex": "0x1a6,0x1a7", 8092 "MSRValue": "0x0204000490", 8093 "Offcore": "1", 8094 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8095 "SampleAfterValue": "100003", 8096 "UMask": "0x1" 8097 }, 8098 { 8099 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8100 "Counter": "0,1,2,3", 8101 "CounterHTOff": "0,1,2,3", 8102 "Deprecated": "1", 8103 "EventCode": "0xB7, 0xBB", 8104 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8105 "MSRIndex": "0x1a6,0x1a7", 8106 "MSRValue": "0x04040007F7", 8107 "Offcore": "1", 8108 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8109 "SampleAfterValue": "100003", 8110 "UMask": "0x1" 8111 }, 8112 { 8113 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 8114 "Counter": "0,1,2,3", 8115 "CounterHTOff": "0,1,2,3", 8116 "Deprecated": "1", 8117 "EventCode": "0xB7, 0xBB", 8118 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE", 8119 "MSRIndex": "0x1a6,0x1a7", 8120 "MSRValue": "0x00BC000080", 8121 "Offcore": "1", 8122 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8123 "SampleAfterValue": "100003", 8124 "UMask": "0x1" 8125 }, 8126 { 8127 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8128 "Counter": "0,1,2,3", 8129 "CounterHTOff": "0,1,2,3", 8130 "Deprecated": "1", 8131 "EventCode": "0xB7, 0xBB", 8132 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8133 "MSRIndex": "0x1a6,0x1a7", 8134 "MSRValue": "0x0804000001", 8135 "Offcore": "1", 8136 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8137 "SampleAfterValue": "100003", 8138 "UMask": "0x1" 8139 }, 8140 { 8141 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8142 "Counter": "0,1,2,3", 8143 "CounterHTOff": "0,1,2,3", 8144 "Deprecated": "1", 8145 "EventCode": "0xB7, 0xBB", 8146 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8147 "MSRIndex": "0x1a6,0x1a7", 8148 "MSRValue": "0x3F900007F7", 8149 "Offcore": "1", 8150 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8151 "SampleAfterValue": "100003", 8152 "UMask": "0x1" 8153 }, 8154 { 8155 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8156 "Counter": "0,1,2,3", 8157 "CounterHTOff": "0,1,2,3", 8158 "Deprecated": "1", 8159 "EventCode": "0xB7, 0xBB", 8160 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8161 "MSRIndex": "0x1a6,0x1a7", 8162 "MSRValue": "0x3F84000004", 8163 "Offcore": "1", 8164 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8165 "SampleAfterValue": "100003", 8166 "UMask": "0x1" 8167 }, 8168 { 8169 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8170 "Counter": "0,1,2,3", 8171 "CounterHTOff": "0,1,2,3", 8172 "Deprecated": "1", 8173 "EventCode": "0xB7, 0xBB", 8174 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 8175 "MSRIndex": "0x1a6,0x1a7", 8176 "MSRValue": "0x083C000120", 8177 "Offcore": "1", 8178 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8179 "SampleAfterValue": "100003", 8180 "UMask": "0x1" 8181 }, 8182 { 8183 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8184 "Counter": "0,1,2,3", 8185 "CounterHTOff": "0,1,2,3", 8186 "Deprecated": "1", 8187 "EventCode": "0xB7, 0xBB", 8188 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE", 8189 "MSRIndex": "0x1a6,0x1a7", 8190 "MSRValue": "0x00BC000010", 8191 "Offcore": "1", 8192 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8193 "SampleAfterValue": "100003", 8194 "UMask": "0x1" 8195 }, 8196 { 8197 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8198 "Counter": "0,1,2,3", 8199 "CounterHTOff": "0,1,2,3", 8200 "Deprecated": "1", 8201 "EventCode": "0xB7, 0xBB", 8202 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8203 "MSRIndex": "0x1a6,0x1a7", 8204 "MSRValue": "0x043C008000", 8205 "Offcore": "1", 8206 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8207 "SampleAfterValue": "100003", 8208 "UMask": "0x1" 8209 }, 8210 { 8211 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8212 "Counter": "0,1,2,3", 8213 "CounterHTOff": "0,1,2,3", 8214 "Deprecated": "1", 8215 "EventCode": "0xB7, 0xBB", 8216 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NONE", 8217 "MSRIndex": "0x1a6,0x1a7", 8218 "MSRValue": "0x00BC000020", 8219 "Offcore": "1", 8220 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8221 "SampleAfterValue": "100003", 8222 "UMask": "0x1" 8223 }, 8224 { 8225 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8226 "Counter": "0,1,2,3", 8227 "CounterHTOff": "0,1,2,3", 8228 "Deprecated": "1", 8229 "EventCode": "0xB7, 0xBB", 8230 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8231 "MSRIndex": "0x1a6,0x1a7", 8232 "MSRValue": "0x103FC00004", 8233 "Offcore": "1", 8234 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8235 "SampleAfterValue": "100003", 8236 "UMask": "0x1" 8237 }, 8238 { 8239 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 8240 "Counter": "0,1,2,3", 8241 "CounterHTOff": "0,1,2,3", 8242 "EventCode": "0xB7, 0xBB", 8243 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8244 "MSRIndex": "0x1a6,0x1a7", 8245 "MSRValue": "0x01040007F7", 8246 "Offcore": "1", 8247 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8248 "SampleAfterValue": "100003", 8249 "UMask": "0x1" 8250 }, 8251 { 8252 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 8253 "Counter": "0,1,2,3", 8254 "CounterHTOff": "0,1,2,3", 8255 "EventCode": "0xB7, 0xBB", 8256 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8257 "MSRIndex": "0x1a6,0x1a7", 8258 "MSRValue": "0x043C000004", 8259 "Offcore": "1", 8260 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8261 "SampleAfterValue": "100003", 8262 "UMask": "0x1" 8263 }, 8264 { 8265 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_DRAM & SNOOP_MISS_OR_NO_FWD", 8266 "Counter": "0,1,2,3", 8267 "CounterHTOff": "0,1,2,3", 8268 "EventCode": "0xB7, 0xBB", 8269 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8270 "MSRIndex": "0x1a6,0x1a7", 8271 "MSRValue": "0x063B800080", 8272 "Offcore": "1", 8273 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8274 "SampleAfterValue": "100003", 8275 "UMask": "0x1" 8276 }, 8277 { 8278 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 8279 "Counter": "0,1,2,3", 8280 "CounterHTOff": "0,1,2,3", 8281 "Deprecated": "1", 8282 "EventCode": "0xB7, 0xBB", 8283 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE", 8284 "MSRIndex": "0x1a6,0x1a7", 8285 "MSRValue": "0x103C000400", 8286 "Offcore": "1", 8287 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8288 "SampleAfterValue": "100003", 8289 "UMask": "0x1" 8290 }, 8291 { 8292 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & SNOOP_NONE", 8293 "Counter": "0,1,2,3", 8294 "CounterHTOff": "0,1,2,3", 8295 "EventCode": "0xB7, 0xBB", 8296 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8297 "MSRIndex": "0x1a6,0x1a7", 8298 "MSRValue": "0x0084000120", 8299 "Offcore": "1", 8300 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8301 "SampleAfterValue": "100003", 8302 "UMask": "0x1" 8303 }, 8304 { 8305 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8306 "Counter": "0,1,2,3", 8307 "CounterHTOff": "0,1,2,3", 8308 "Deprecated": "1", 8309 "EventCode": "0xB7, 0xBB", 8310 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8311 "MSRIndex": "0x1a6,0x1a7", 8312 "MSRValue": "0x0810000020", 8313 "Offcore": "1", 8314 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8315 "SampleAfterValue": "100003", 8316 "UMask": "0x1" 8317 }, 8318 { 8319 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8320 "Counter": "0,1,2,3", 8321 "CounterHTOff": "0,1,2,3", 8322 "Deprecated": "1", 8323 "EventCode": "0xB7, 0xBB", 8324 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8325 "MSRIndex": "0x1a6,0x1a7", 8326 "MSRValue": "0x3F84000080", 8327 "Offcore": "1", 8328 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8329 "SampleAfterValue": "100003", 8330 "UMask": "0x1" 8331 }, 8332 { 8333 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8334 "Counter": "0,1,2,3", 8335 "CounterHTOff": "0,1,2,3", 8336 "Deprecated": "1", 8337 "EventCode": "0xB7, 0xBB", 8338 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 8339 "MSRIndex": "0x1a6,0x1a7", 8340 "MSRValue": "0x1010000010", 8341 "Offcore": "1", 8342 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8343 "SampleAfterValue": "100003", 8344 "UMask": "0x1" 8345 }, 8346 { 8347 "BriefDescription": "ALL_DATA_RD & L3_MISS & REMOTE_HITM", 8348 "Counter": "0,1,2,3", 8349 "CounterHTOff": "0,1,2,3", 8350 "EventCode": "0xB7, 0xBB", 8351 "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM", 8352 "MSRIndex": "0x1a6,0x1a7", 8353 "MSRValue": "0x103FC00491", 8354 "Offcore": "1", 8355 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8356 "SampleAfterValue": "100003", 8357 "UMask": "0x1" 8358 }, 8359 { 8360 "BriefDescription": "ALL_RFO & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_NONE", 8361 "Counter": "0,1,2,3", 8362 "CounterHTOff": "0,1,2,3", 8363 "EventCode": "0xB7, 0xBB", 8364 "EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8365 "MSRIndex": "0x1a6,0x1a7", 8366 "MSRValue": "0x0090000122", 8367 "Offcore": "1", 8368 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8369 "SampleAfterValue": "100003", 8370 "UMask": "0x1" 8371 }, 8372 { 8373 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8374 "Counter": "0,1,2,3", 8375 "CounterHTOff": "0,1,2,3", 8376 "Deprecated": "1", 8377 "EventCode": "0xB7, 0xBB", 8378 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8379 "MSRIndex": "0x1a6,0x1a7", 8380 "MSRValue": "0x043C000001", 8381 "Offcore": "1", 8382 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8383 "SampleAfterValue": "100003", 8384 "UMask": "0x1" 8385 }, 8386 { 8387 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8388 "Counter": "0,1,2,3", 8389 "CounterHTOff": "0,1,2,3", 8390 "Deprecated": "1", 8391 "EventCode": "0xB7, 0xBB", 8392 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8393 "MSRIndex": "0x1a6,0x1a7", 8394 "MSRValue": "0x0084000400", 8395 "Offcore": "1", 8396 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8397 "SampleAfterValue": "100003", 8398 "UMask": "0x1" 8399 }, 8400 { 8401 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8402 "Counter": "0,1,2,3", 8403 "CounterHTOff": "0,1,2,3", 8404 "Deprecated": "1", 8405 "EventCode": "0xB7, 0xBB", 8406 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8407 "MSRIndex": "0x1a6,0x1a7", 8408 "MSRValue": "0x083FC00001", 8409 "Offcore": "1", 8410 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8411 "SampleAfterValue": "100003", 8412 "UMask": "0x1" 8413 }, 8414 { 8415 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8416 "Counter": "0,1,2,3", 8417 "CounterHTOff": "0,1,2,3", 8418 "Deprecated": "1", 8419 "EventCode": "0xB7, 0xBB", 8420 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8421 "MSRIndex": "0x1a6,0x1a7", 8422 "MSRValue": "0x0404000120", 8423 "Offcore": "1", 8424 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8425 "SampleAfterValue": "100003", 8426 "UMask": "0x1" 8427 }, 8428 { 8429 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & REMOTE_HITM", 8430 "Counter": "0,1,2,3", 8431 "CounterHTOff": "0,1,2,3", 8432 "EventCode": "0xB7, 0xBB", 8433 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM", 8434 "MSRIndex": "0x1a6,0x1a7", 8435 "MSRValue": "0x103FC00004", 8436 "Offcore": "1", 8437 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8438 "SampleAfterValue": "100003", 8439 "UMask": "0x1" 8440 }, 8441 { 8442 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 8443 "Counter": "0,1,2,3", 8444 "CounterHTOff": "0,1,2,3", 8445 "EventCode": "0xB7, 0xBB", 8446 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8447 "MSRIndex": "0x1a6,0x1a7", 8448 "MSRValue": "0x0804000491", 8449 "Offcore": "1", 8450 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8451 "SampleAfterValue": "100003", 8452 "UMask": "0x1" 8453 }, 8454 { 8455 "BriefDescription": "Counts all demand data writes (RFOs) DEMAND_RFO & L3_MISS & REMOTE_HIT_FORWARD", 8456 "Counter": "0,1,2,3", 8457 "CounterHTOff": "0,1,2,3", 8458 "EventCode": "0xB7, 0xBB", 8459 "EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8460 "MSRIndex": "0x1a6,0x1a7", 8461 "MSRValue": "0x083FC00002", 8462 "Offcore": "1", 8463 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8464 "SampleAfterValue": "100003", 8465 "UMask": "0x1" 8466 }, 8467 { 8468 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 8469 "Counter": "0,1,2,3", 8470 "CounterHTOff": "0,1,2,3", 8471 "Deprecated": "1", 8472 "EventCode": "0xB7, 0xBB", 8473 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_MISS", 8474 "MSRIndex": "0x1a6,0x1a7", 8475 "MSRValue": "0x023C000120", 8476 "Offcore": "1", 8477 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8478 "SampleAfterValue": "100003", 8479 "UMask": "0x1" 8480 }, 8481 { 8482 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8483 "Counter": "0,1,2,3", 8484 "CounterHTOff": "0,1,2,3", 8485 "Deprecated": "1", 8486 "EventCode": "0xB7, 0xBB", 8487 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE", 8488 "MSRIndex": "0x1a6,0x1a7", 8489 "MSRValue": "0x103C000490", 8490 "Offcore": "1", 8491 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8492 "SampleAfterValue": "100003", 8493 "UMask": "0x1" 8494 }, 8495 { 8496 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8497 "Counter": "0,1,2,3", 8498 "CounterHTOff": "0,1,2,3", 8499 "Deprecated": "1", 8500 "EventCode": "0xB7, 0xBB", 8501 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD", 8502 "MSRIndex": "0x1a6,0x1a7", 8503 "MSRValue": "0x083FC00100", 8504 "Offcore": "1", 8505 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8506 "SampleAfterValue": "100003", 8507 "UMask": "0x1" 8508 }, 8509 { 8510 "BriefDescription": "Counts all demand data writes (RFOs)", 8511 "Counter": "0,1,2,3", 8512 "CounterHTOff": "0,1,2,3", 8513 "EventCode": "0xB7, 0xBB", 8514 "EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 8515 "MSRIndex": "0x1a6,0x1a7", 8516 "MSRValue": "0x0084000002", 8517 "Offcore": "1", 8518 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8519 "SampleAfterValue": "100003", 8520 "UMask": "0x1" 8521 }, 8522 { 8523 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS & REMOTE_HITM", 8524 "Counter": "0,1,2,3", 8525 "CounterHTOff": "0,1,2,3", 8526 "EventCode": "0xB7, 0xBB", 8527 "EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM", 8528 "MSRIndex": "0x1a6,0x1a7", 8529 "MSRValue": "0x103FC00100", 8530 "Offcore": "1", 8531 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8532 "SampleAfterValue": "100003", 8533 "UMask": "0x1" 8534 }, 8535 { 8536 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8537 "Counter": "0,1,2,3", 8538 "CounterHTOff": "0,1,2,3", 8539 "Deprecated": "1", 8540 "EventCode": "0xB7, 0xBB", 8541 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 8542 "MSRIndex": "0x1a6,0x1a7", 8543 "MSRValue": "0x063B800001", 8544 "Offcore": "1", 8545 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8546 "SampleAfterValue": "100003", 8547 "UMask": "0x1" 8548 }, 8549 { 8550 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8551 "Counter": "0,1,2,3", 8552 "CounterHTOff": "0,1,2,3", 8553 "Deprecated": "1", 8554 "EventCode": "0xB7, 0xBB", 8555 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8556 "MSRIndex": "0x1a6,0x1a7", 8557 "MSRValue": "0x0104000002", 8558 "Offcore": "1", 8559 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8560 "SampleAfterValue": "100003", 8561 "UMask": "0x1" 8562 }, 8563 { 8564 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads", 8565 "Counter": "0,1,2,3", 8566 "CounterHTOff": "0,1,2,3", 8567 "EventCode": "0xB7, 0xBB", 8568 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8569 "MSRIndex": "0x1a6,0x1a7", 8570 "MSRValue": "0x0204000080", 8571 "Offcore": "1", 8572 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8573 "SampleAfterValue": "100003", 8574 "UMask": "0x1" 8575 }, 8576 { 8577 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8578 "Counter": "0,1,2,3", 8579 "CounterHTOff": "0,1,2,3", 8580 "Deprecated": "1", 8581 "EventCode": "0xB7, 0xBB", 8582 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8583 "MSRIndex": "0x1a6,0x1a7", 8584 "MSRValue": "0x0804000122", 8585 "Offcore": "1", 8586 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8587 "SampleAfterValue": "100003", 8588 "UMask": "0x1" 8589 }, 8590 { 8591 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8592 "Counter": "0,1,2,3", 8593 "CounterHTOff": "0,1,2,3", 8594 "Deprecated": "1", 8595 "EventCode": "0xB7, 0xBB", 8596 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8597 "MSRIndex": "0x1a6,0x1a7", 8598 "MSRValue": "0x0810000002", 8599 "Offcore": "1", 8600 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8601 "SampleAfterValue": "100003", 8602 "UMask": "0x1" 8603 }, 8604 { 8605 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8606 "Counter": "0,1,2,3", 8607 "CounterHTOff": "0,1,2,3", 8608 "Deprecated": "1", 8609 "EventCode": "0xB7, 0xBB", 8610 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8611 "MSRIndex": "0x1a6,0x1a7", 8612 "MSRValue": "0x0204000080", 8613 "Offcore": "1", 8614 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8615 "SampleAfterValue": "100003", 8616 "UMask": "0x1" 8617 }, 8618 { 8619 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8620 "Counter": "0,1,2,3", 8621 "CounterHTOff": "0,1,2,3", 8622 "Deprecated": "1", 8623 "EventCode": "0xB7, 0xBB", 8624 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 8625 "MSRIndex": "0x1a6,0x1a7", 8626 "MSRValue": "0x0104000400", 8627 "Offcore": "1", 8628 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8629 "SampleAfterValue": "100003", 8630 "UMask": "0x1" 8631 }, 8632 { 8633 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS & NO_SNOOP_NEEDED", 8634 "Counter": "0,1,2,3", 8635 "CounterHTOff": "0,1,2,3", 8636 "EventCode": "0xB7, 0xBB", 8637 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8638 "MSRIndex": "0x1a6,0x1a7", 8639 "MSRValue": "0x013C000080", 8640 "Offcore": "1", 8641 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8642 "SampleAfterValue": "100003", 8643 "UMask": "0x1" 8644 }, 8645 { 8646 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8647 "Counter": "0,1,2,3", 8648 "CounterHTOff": "0,1,2,3", 8649 "Deprecated": "1", 8650 "EventCode": "0xB7, 0xBB", 8651 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 8652 "MSRIndex": "0x1a6,0x1a7", 8653 "MSRValue": "0x3F90000010", 8654 "Offcore": "1", 8655 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8656 "SampleAfterValue": "100003", 8657 "UMask": "0x1" 8658 }, 8659 { 8660 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8661 "Counter": "0,1,2,3", 8662 "CounterHTOff": "0,1,2,3", 8663 "Deprecated": "1", 8664 "EventCode": "0xB7, 0xBB", 8665 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 8666 "MSRIndex": "0x1a6,0x1a7", 8667 "MSRValue": "0x1004000400", 8668 "Offcore": "1", 8669 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8670 "SampleAfterValue": "100003", 8671 "UMask": "0x1" 8672 }, 8673 { 8674 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 8675 "Counter": "0,1,2,3", 8676 "CounterHTOff": "0,1,2,3", 8677 "Deprecated": "1", 8678 "EventCode": "0xB7, 0xBB", 8679 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 8680 "MSRIndex": "0x1a6,0x1a7", 8681 "MSRValue": "0x083C008000", 8682 "Offcore": "1", 8683 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8684 "SampleAfterValue": "100003", 8685 "UMask": "0x1" 8686 }, 8687 { 8688 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8689 "Counter": "0,1,2,3", 8690 "CounterHTOff": "0,1,2,3", 8691 "Deprecated": "1", 8692 "EventCode": "0xB7, 0xBB", 8693 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8694 "MSRIndex": "0x1a6,0x1a7", 8695 "MSRValue": "0x0110000004", 8696 "Offcore": "1", 8697 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8698 "SampleAfterValue": "100003", 8699 "UMask": "0x1" 8700 }, 8701 { 8702 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8703 "Counter": "0,1,2,3", 8704 "CounterHTOff": "0,1,2,3", 8705 "Deprecated": "1", 8706 "EventCode": "0xB7, 0xBB", 8707 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 8708 "MSRIndex": "0x1a6,0x1a7", 8709 "MSRValue": "0x013C000001", 8710 "Offcore": "1", 8711 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8712 "SampleAfterValue": "100003", 8713 "UMask": "0x1" 8714 }, 8715 { 8716 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 8717 "Counter": "0,1,2,3", 8718 "CounterHTOff": "0,1,2,3", 8719 "EventCode": "0xB7, 0xBB", 8720 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8721 "MSRIndex": "0x1a6,0x1a7", 8722 "MSRValue": "0x0810000400", 8723 "Offcore": "1", 8724 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8725 "SampleAfterValue": "100003", 8726 "UMask": "0x1" 8727 }, 8728 { 8729 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 8730 "Counter": "0,1,2,3", 8731 "CounterHTOff": "0,1,2,3", 8732 "EventCode": "0xB7, 0xBB", 8733 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 8734 "MSRIndex": "0x1a6,0x1a7", 8735 "MSRValue": "0x0804000080", 8736 "Offcore": "1", 8737 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8738 "SampleAfterValue": "100003", 8739 "UMask": "0x1" 8740 }, 8741 { 8742 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8743 "Counter": "0,1,2,3", 8744 "CounterHTOff": "0,1,2,3", 8745 "Deprecated": "1", 8746 "EventCode": "0xB7, 0xBB", 8747 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 8748 "MSRIndex": "0x1a6,0x1a7", 8749 "MSRValue": "0x0210008000", 8750 "Offcore": "1", 8751 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8752 "SampleAfterValue": "100003", 8753 "UMask": "0x1" 8754 }, 8755 { 8756 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs", 8757 "Counter": "0,1,2,3", 8758 "CounterHTOff": "0,1,2,3", 8759 "EventCode": "0xB7, 0xBB", 8760 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8761 "MSRIndex": "0x1a6,0x1a7", 8762 "MSRValue": "0x0204000100", 8763 "Offcore": "1", 8764 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8765 "SampleAfterValue": "100003", 8766 "UMask": "0x1" 8767 }, 8768 { 8769 "BriefDescription": "ALL_DATA_RD & L3_MISS & REMOTE_HIT_FORWARD", 8770 "Counter": "0,1,2,3", 8771 "CounterHTOff": "0,1,2,3", 8772 "EventCode": "0xB7, 0xBB", 8773 "EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 8774 "MSRIndex": "0x1a6,0x1a7", 8775 "MSRValue": "0x083FC00491", 8776 "Offcore": "1", 8777 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8778 "SampleAfterValue": "100003", 8779 "UMask": "0x1" 8780 }, 8781 { 8782 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 8783 "Counter": "0,1,2,3", 8784 "CounterHTOff": "0,1,2,3", 8785 "Deprecated": "1", 8786 "EventCode": "0xB7, 0xBB", 8787 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.ANY_SNOOP", 8788 "MSRIndex": "0x1a6,0x1a7", 8789 "MSRValue": "0x3FBC000491", 8790 "Offcore": "1", 8791 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8792 "SampleAfterValue": "100003", 8793 "UMask": "0x1" 8794 }, 8795 { 8796 "BriefDescription": "Demand Data Read requests who miss L3 cache", 8797 "Counter": "0,1,2,3", 8798 "CounterHTOff": "0,1,2,3,4,5,6,7", 8799 "EventCode": "0xB0", 8800 "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 8801 "PublicDescription": "Demand Data Read requests who miss L3 cache.", 8802 "SampleAfterValue": "100003", 8803 "UMask": "0x10" 8804 }, 8805 { 8806 "BriefDescription": "ALL_READS & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 8807 "Counter": "0,1,2,3", 8808 "CounterHTOff": "0,1,2,3", 8809 "EventCode": "0xB7, 0xBB", 8810 "EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8811 "MSRIndex": "0x1a6,0x1a7", 8812 "MSRValue": "0x01100007F7", 8813 "Offcore": "1", 8814 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8815 "SampleAfterValue": "100003", 8816 "UMask": "0x1" 8817 }, 8818 { 8819 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 8820 "Counter": "0,1,2,3", 8821 "CounterHTOff": "0,1,2,3", 8822 "EventCode": "0xB7, 0xBB", 8823 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8824 "MSRIndex": "0x1a6,0x1a7", 8825 "MSRValue": "0x0810000010", 8826 "Offcore": "1", 8827 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8828 "SampleAfterValue": "100003", 8829 "UMask": "0x1" 8830 }, 8831 { 8832 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8833 "Counter": "0,1,2,3", 8834 "CounterHTOff": "0,1,2,3", 8835 "Deprecated": "1", 8836 "EventCode": "0xB7, 0xBB", 8837 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED", 8838 "MSRIndex": "0x1a6,0x1a7", 8839 "MSRValue": "0x013C000400", 8840 "Offcore": "1", 8841 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8842 "SampleAfterValue": "100003", 8843 "UMask": "0x1" 8844 }, 8845 { 8846 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8847 "Counter": "0,1,2,3", 8848 "CounterHTOff": "0,1,2,3", 8849 "Deprecated": "1", 8850 "EventCode": "0xB7, 0xBB", 8851 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 8852 "MSRIndex": "0x1a6,0x1a7", 8853 "MSRValue": "0x02040007F7", 8854 "Offcore": "1", 8855 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8856 "SampleAfterValue": "100003", 8857 "UMask": "0x1" 8858 }, 8859 { 8860 "BriefDescription": "ALL_PF_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_NO_FWD", 8861 "Counter": "0,1,2,3", 8862 "CounterHTOff": "0,1,2,3", 8863 "EventCode": "0xB7, 0xBB", 8864 "EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 8865 "MSRIndex": "0x1a6,0x1a7", 8866 "MSRValue": "0x0404000120", 8867 "Offcore": "1", 8868 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8869 "SampleAfterValue": "100003", 8870 "UMask": "0x1" 8871 }, 8872 { 8873 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8874 "Counter": "0,1,2,3", 8875 "CounterHTOff": "0,1,2,3", 8876 "Deprecated": "1", 8877 "EventCode": "0xB7, 0xBB", 8878 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 8879 "MSRIndex": "0x1a6,0x1a7", 8880 "MSRValue": "0x0110000400", 8881 "Offcore": "1", 8882 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8883 "SampleAfterValue": "100003", 8884 "UMask": "0x1" 8885 }, 8886 { 8887 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8888 "Counter": "0,1,2,3", 8889 "CounterHTOff": "0,1,2,3", 8890 "Deprecated": "1", 8891 "EventCode": "0xB7, 0xBB", 8892 "EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 8893 "MSRIndex": "0x1a6,0x1a7", 8894 "MSRValue": "0x00900007F7", 8895 "Offcore": "1", 8896 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8897 "SampleAfterValue": "100003", 8898 "UMask": "0x1" 8899 }, 8900 { 8901 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8902 "Counter": "0,1,2,3", 8903 "CounterHTOff": "0,1,2,3", 8904 "Deprecated": "1", 8905 "EventCode": "0xB7, 0xBB", 8906 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 8907 "MSRIndex": "0x1a6,0x1a7", 8908 "MSRValue": "0x3F84000120", 8909 "Offcore": "1", 8910 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8911 "SampleAfterValue": "100003", 8912 "UMask": "0x1" 8913 }, 8914 { 8915 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8916 "Counter": "0,1,2,3", 8917 "CounterHTOff": "0,1,2,3", 8918 "Deprecated": "1", 8919 "EventCode": "0xB7, 0xBB", 8920 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 8921 "MSRIndex": "0x1a6,0x1a7", 8922 "MSRValue": "0x0410000100", 8923 "Offcore": "1", 8924 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8925 "SampleAfterValue": "100003", 8926 "UMask": "0x1" 8927 }, 8928 { 8929 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_NONE", 8930 "Counter": "0,1,2,3", 8931 "CounterHTOff": "0,1,2,3", 8932 "Deprecated": "1", 8933 "EventCode": "0xB7, 0xBB", 8934 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NONE", 8935 "MSRIndex": "0x1a6,0x1a7", 8936 "MSRValue": "0x00BC000122", 8937 "Offcore": "1", 8938 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8939 "SampleAfterValue": "100003", 8940 "UMask": "0x1" 8941 }, 8942 { 8943 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8944 "Counter": "0,1,2,3", 8945 "CounterHTOff": "0,1,2,3", 8946 "Deprecated": "1", 8947 "EventCode": "0xB7, 0xBB", 8948 "EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 8949 "MSRIndex": "0x1a6,0x1a7", 8950 "MSRValue": "0x0810000490", 8951 "Offcore": "1", 8952 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8953 "SampleAfterValue": "100003", 8954 "UMask": "0x1" 8955 }, 8956 { 8957 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8958 "Counter": "0,1,2,3", 8959 "CounterHTOff": "0,1,2,3", 8960 "Deprecated": "1", 8961 "EventCode": "0xB7, 0xBB", 8962 "EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 8963 "MSRIndex": "0x1a6,0x1a7", 8964 "MSRValue": "0x0604000080", 8965 "Offcore": "1", 8966 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8967 "SampleAfterValue": "100003", 8968 "UMask": "0x1" 8969 }, 8970 { 8971 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & HIT_OTHER_CORE_NO_FWD", 8972 "Counter": "0,1,2,3", 8973 "CounterHTOff": "0,1,2,3", 8974 "EventCode": "0xB7, 0xBB", 8975 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD", 8976 "MSRIndex": "0x1a6,0x1a7", 8977 "MSRValue": "0x043C000400", 8978 "Offcore": "1", 8979 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8980 "SampleAfterValue": "100003", 8981 "UMask": "0x1" 8982 }, 8983 { 8984 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS & HITM_OTHER_CORE", 8985 "Counter": "0,1,2,3", 8986 "CounterHTOff": "0,1,2,3", 8987 "EventCode": "0xB7, 0xBB", 8988 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE", 8989 "MSRIndex": "0x1a6,0x1a7", 8990 "MSRValue": "0x103C000004", 8991 "Offcore": "1", 8992 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 8993 "SampleAfterValue": "100003", 8994 "UMask": "0x1" 8995 }, 8996 { 8997 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 8998 "Counter": "0,1,2,3", 8999 "CounterHTOff": "0,1,2,3", 9000 "EventCode": "0xB7, 0xBB", 9001 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9002 "MSRIndex": "0x1a6,0x1a7", 9003 "MSRValue": "0x1010000491", 9004 "Offcore": "1", 9005 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9006 "SampleAfterValue": "100003", 9007 "UMask": "0x1" 9008 }, 9009 { 9010 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 9011 "Counter": "0,1,2,3", 9012 "CounterHTOff": "0,1,2,3", 9013 "Deprecated": "1", 9014 "EventCode": "0xB7, 0xBB", 9015 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS", 9016 "MSRIndex": "0x1a6,0x1a7", 9017 "MSRValue": "0x023C000400", 9018 "Offcore": "1", 9019 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9020 "SampleAfterValue": "100003", 9021 "UMask": "0x1" 9022 }, 9023 { 9024 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 9025 "Counter": "0,1,2,3", 9026 "CounterHTOff": "0,1,2,3", 9027 "EventCode": "0xB7, 0xBB", 9028 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9029 "MSRIndex": "0x1a6,0x1a7", 9030 "MSRValue": "0x0804000020", 9031 "Offcore": "1", 9032 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9033 "SampleAfterValue": "100003", 9034 "UMask": "0x1" 9035 }, 9036 { 9037 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 9038 "Counter": "0,1,2,3", 9039 "CounterHTOff": "0,1,2,3", 9040 "EventCode": "0xB7, 0xBB", 9041 "EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9042 "MSRIndex": "0x1a6,0x1a7", 9043 "MSRValue": "0x0204000020", 9044 "Offcore": "1", 9045 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9046 "SampleAfterValue": "100003", 9047 "UMask": "0x1" 9048 }, 9049 { 9050 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & NO_SNOOP_NEEDED", 9051 "Counter": "0,1,2,3", 9052 "CounterHTOff": "0,1,2,3", 9053 "EventCode": "0xB7, 0xBB", 9054 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9055 "MSRIndex": "0x1a6,0x1a7", 9056 "MSRValue": "0x0110000491", 9057 "Offcore": "1", 9058 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9059 "SampleAfterValue": "100003", 9060 "UMask": "0x1" 9061 }, 9062 { 9063 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 9064 "Counter": "0,1,2,3", 9065 "CounterHTOff": "0,1,2,3", 9066 "EventCode": "0xB7, 0xBB", 9067 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9068 "MSRIndex": "0x1a6,0x1a7", 9069 "MSRValue": "0x08040007F7", 9070 "Offcore": "1", 9071 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9072 "SampleAfterValue": "100003", 9073 "UMask": "0x1" 9074 }, 9075 { 9076 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_LOCAL_DRAM & HITM_OTHER_CORE", 9077 "Counter": "0,1,2,3", 9078 "CounterHTOff": "0,1,2,3", 9079 "EventCode": "0xB7, 0xBB", 9080 "EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9081 "MSRIndex": "0x1a6,0x1a7", 9082 "MSRValue": "0x1004000100", 9083 "Offcore": "1", 9084 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9085 "SampleAfterValue": "100003", 9086 "UMask": "0x1" 9087 }, 9088 { 9089 "BriefDescription": "Counts all demand code reads", 9090 "Counter": "0,1,2,3", 9091 "CounterHTOff": "0,1,2,3", 9092 "EventCode": "0xB7, 0xBB", 9093 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9094 "MSRIndex": "0x1a6,0x1a7", 9095 "MSRValue": "0x0084000004", 9096 "Offcore": "1", 9097 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9098 "SampleAfterValue": "100003", 9099 "UMask": "0x1" 9100 }, 9101 { 9102 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9103 "Counter": "0,1,2,3", 9104 "CounterHTOff": "0,1,2,3", 9105 "Deprecated": "1", 9106 "EventCode": "0xB7, 0xBB", 9107 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9108 "MSRIndex": "0x1a6,0x1a7", 9109 "MSRValue": "0x3F90000122", 9110 "Offcore": "1", 9111 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9112 "SampleAfterValue": "100003", 9113 "UMask": "0x1" 9114 }, 9115 { 9116 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 9117 "Counter": "0,1,2,3", 9118 "CounterHTOff": "0,1,2,3", 9119 "Deprecated": "1", 9120 "EventCode": "0xB7, 0xBB", 9121 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM", 9122 "MSRIndex": "0x1a6,0x1a7", 9123 "MSRValue": "0x103FC00010", 9124 "Offcore": "1", 9125 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9126 "SampleAfterValue": "100003", 9127 "UMask": "0x1" 9128 }, 9129 { 9130 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9131 "Counter": "0,1,2,3", 9132 "CounterHTOff": "0,1,2,3", 9133 "Deprecated": "1", 9134 "EventCode": "0xB7, 0xBB", 9135 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9136 "MSRIndex": "0x1a6,0x1a7", 9137 "MSRValue": "0x1004000002", 9138 "Offcore": "1", 9139 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9140 "SampleAfterValue": "100003", 9141 "UMask": "0x1" 9142 }, 9143 { 9144 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9145 "Counter": "0,1,2,3", 9146 "CounterHTOff": "0,1,2,3", 9147 "Deprecated": "1", 9148 "EventCode": "0xB7, 0xBB", 9149 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9150 "MSRIndex": "0x1a6,0x1a7", 9151 "MSRValue": "0x0084000004", 9152 "Offcore": "1", 9153 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9154 "SampleAfterValue": "100003", 9155 "UMask": "0x1" 9156 }, 9157 { 9158 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9159 "Counter": "0,1,2,3", 9160 "CounterHTOff": "0,1,2,3", 9161 "Deprecated": "1", 9162 "EventCode": "0xB7, 0xBB", 9163 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9164 "MSRIndex": "0x1a6,0x1a7", 9165 "MSRValue": "0x0104000120", 9166 "Offcore": "1", 9167 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9168 "SampleAfterValue": "100003", 9169 "UMask": "0x1" 9170 }, 9171 { 9172 "BriefDescription": "Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).", 9173 "Counter": "0,1,2,3", 9174 "CounterHTOff": "0,1,2,3,4,5,6,7", 9175 "EventCode": "0xC8", 9176 "EventName": "HLE_RETIRED.ABORTED", 9177 "PEBS": "1", 9178 "PublicDescription": "Number of times HLE abort was triggered.", 9179 "SampleAfterValue": "2000003", 9180 "UMask": "0x4" 9181 }, 9182 { 9183 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_MISS", 9184 "Counter": "0,1,2,3", 9185 "CounterHTOff": "0,1,2,3", 9186 "Deprecated": "1", 9187 "EventCode": "0xB7, 0xBB", 9188 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS", 9189 "MSRIndex": "0x1a6,0x1a7", 9190 "MSRValue": "0x023C008000", 9191 "Offcore": "1", 9192 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9193 "SampleAfterValue": "100003", 9194 "UMask": "0x1" 9195 }, 9196 { 9197 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9198 "Counter": "0,1,2,3", 9199 "CounterHTOff": "0,1,2,3", 9200 "Deprecated": "1", 9201 "EventCode": "0xB7, 0xBB", 9202 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED", 9203 "MSRIndex": "0x1a6,0x1a7", 9204 "MSRValue": "0x013C000010", 9205 "Offcore": "1", 9206 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9207 "SampleAfterValue": "100003", 9208 "UMask": "0x1" 9209 }, 9210 { 9211 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9212 "Counter": "0,1,2,3", 9213 "CounterHTOff": "0,1,2,3", 9214 "Deprecated": "1", 9215 "EventCode": "0xB7, 0xBB", 9216 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", 9217 "MSRIndex": "0x1a6,0x1a7", 9218 "MSRValue": "0x0604000120", 9219 "Offcore": "1", 9220 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9221 "SampleAfterValue": "100003", 9222 "UMask": "0x1" 9223 }, 9224 { 9225 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs", 9226 "Counter": "0,1,2,3", 9227 "CounterHTOff": "0,1,2,3", 9228 "EventCode": "0xB7, 0xBB", 9229 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9230 "MSRIndex": "0x1a6,0x1a7", 9231 "MSRValue": "0x0090000020", 9232 "Offcore": "1", 9233 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9234 "SampleAfterValue": "100003", 9235 "UMask": "0x1" 9236 }, 9237 { 9238 "BriefDescription": "Counts prefetch (that bring data to L2) data reads", 9239 "Counter": "0,1,2,3", 9240 "CounterHTOff": "0,1,2,3", 9241 "EventCode": "0xB7, 0xBB", 9242 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9243 "MSRIndex": "0x1a6,0x1a7", 9244 "MSRValue": "0x0204000010", 9245 "Offcore": "1", 9246 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9247 "SampleAfterValue": "100003", 9248 "UMask": "0x1" 9249 }, 9250 { 9251 "BriefDescription": "Counts all demand code reads", 9252 "Counter": "0,1,2,3", 9253 "CounterHTOff": "0,1,2,3", 9254 "EventCode": "0xB7, 0xBB", 9255 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9256 "MSRIndex": "0x1a6,0x1a7", 9257 "MSRValue": "0x0090000004", 9258 "Offcore": "1", 9259 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9260 "SampleAfterValue": "100003", 9261 "UMask": "0x1" 9262 }, 9263 { 9264 "BriefDescription": "ALL_DATA_RD & L3_MISS & HIT_OTHER_CORE_FWD", 9265 "Counter": "0,1,2,3", 9266 "CounterHTOff": "0,1,2,3", 9267 "EventCode": "0xB7, 0xBB", 9268 "EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD", 9269 "MSRIndex": "0x1a6,0x1a7", 9270 "MSRValue": "0x083C000491", 9271 "Offcore": "1", 9272 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9273 "SampleAfterValue": "100003", 9274 "UMask": "0x1" 9275 }, 9276 { 9277 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9278 "Counter": "0,1,2,3", 9279 "CounterHTOff": "0,1,2,3", 9280 "Deprecated": "1", 9281 "EventCode": "0xB7, 0xBB", 9282 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9283 "MSRIndex": "0x1a6,0x1a7", 9284 "MSRValue": "0x1010000491", 9285 "Offcore": "1", 9286 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9287 "SampleAfterValue": "100003", 9288 "UMask": "0x1" 9289 }, 9290 { 9291 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9292 "Counter": "0,1,2,3", 9293 "CounterHTOff": "0,1,2,3", 9294 "Deprecated": "1", 9295 "EventCode": "0xB7, 0xBB", 9296 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9297 "MSRIndex": "0x1a6,0x1a7", 9298 "MSRValue": "0x0804000400", 9299 "Offcore": "1", 9300 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9301 "SampleAfterValue": "100003", 9302 "UMask": "0x1" 9303 }, 9304 { 9305 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9306 "Counter": "0,1,2,3", 9307 "CounterHTOff": "0,1,2,3", 9308 "Deprecated": "1", 9309 "EventCode": "0xB7, 0xBB", 9310 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", 9311 "MSRIndex": "0x1a6,0x1a7", 9312 "MSRValue": "0x063B800120", 9313 "Offcore": "1", 9314 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9315 "SampleAfterValue": "100003", 9316 "UMask": "0x1" 9317 }, 9318 { 9319 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_FWD", 9320 "Counter": "0,1,2,3", 9321 "CounterHTOff": "0,1,2,3", 9322 "EventCode": "0xB7, 0xBB", 9323 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9324 "MSRIndex": "0x1a6,0x1a7", 9325 "MSRValue": "0x0810000490", 9326 "Offcore": "1", 9327 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9328 "SampleAfterValue": "100003", 9329 "UMask": "0x1" 9330 }, 9331 { 9332 "BriefDescription": "ALL_DATA_RD & L3_MISS_LOCAL_DRAM & ANY_SNOOP", 9333 "Counter": "0,1,2,3", 9334 "CounterHTOff": "0,1,2,3", 9335 "EventCode": "0xB7, 0xBB", 9336 "EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP", 9337 "MSRIndex": "0x1a6,0x1a7", 9338 "MSRValue": "0x3F84000491", 9339 "Offcore": "1", 9340 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9341 "SampleAfterValue": "100003", 9342 "UMask": "0x1" 9343 }, 9344 { 9345 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9346 "Counter": "0,1,2,3", 9347 "CounterHTOff": "0,1,2,3", 9348 "Deprecated": "1", 9349 "EventCode": "0xB7, 0xBB", 9350 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9351 "MSRIndex": "0x1a6,0x1a7", 9352 "MSRValue": "0x0810000400", 9353 "Offcore": "1", 9354 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9355 "SampleAfterValue": "100003", 9356 "UMask": "0x1" 9357 }, 9358 { 9359 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & ANY_SNOOP", 9360 "Counter": "0,1,2,3", 9361 "CounterHTOff": "0,1,2,3", 9362 "EventCode": "0xB7, 0xBB", 9363 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP", 9364 "MSRIndex": "0x1a6,0x1a7", 9365 "MSRValue": "0x3FBC000010", 9366 "Offcore": "1", 9367 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9368 "SampleAfterValue": "100003", 9369 "UMask": "0x1" 9370 }, 9371 { 9372 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9373 "Counter": "0,1,2,3", 9374 "CounterHTOff": "0,1,2,3", 9375 "Deprecated": "1", 9376 "EventCode": "0xB7, 0xBB", 9377 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9378 "MSRIndex": "0x1a6,0x1a7", 9379 "MSRValue": "0x0410000122", 9380 "Offcore": "1", 9381 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9382 "SampleAfterValue": "100003", 9383 "UMask": "0x1" 9384 }, 9385 { 9386 "BriefDescription": "Counts all demand code reads DEMAND_CODE_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 9387 "Counter": "0,1,2,3", 9388 "CounterHTOff": "0,1,2,3", 9389 "EventCode": "0xB7, 0xBB", 9390 "EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9391 "MSRIndex": "0x1a6,0x1a7", 9392 "MSRValue": "0x0410000004", 9393 "Offcore": "1", 9394 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9395 "SampleAfterValue": "100003", 9396 "UMask": "0x1" 9397 }, 9398 { 9399 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9400 "Counter": "0,1,2,3", 9401 "CounterHTOff": "0,1,2,3", 9402 "Deprecated": "1", 9403 "EventCode": "0xB7, 0xBB", 9404 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9405 "MSRIndex": "0x1a6,0x1a7", 9406 "MSRValue": "0x0210000004", 9407 "Offcore": "1", 9408 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9409 "SampleAfterValue": "100003", 9410 "UMask": "0x1" 9411 }, 9412 { 9413 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9414 "Counter": "0,1,2,3", 9415 "CounterHTOff": "0,1,2,3", 9416 "Deprecated": "1", 9417 "EventCode": "0xB7, 0xBB", 9418 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9419 "MSRIndex": "0x1a6,0x1a7", 9420 "MSRValue": "0x1010000400", 9421 "Offcore": "1", 9422 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9423 "SampleAfterValue": "100003", 9424 "UMask": "0x1" 9425 }, 9426 { 9427 "BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads PF_L3_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 9428 "Counter": "0,1,2,3", 9429 "CounterHTOff": "0,1,2,3", 9430 "EventCode": "0xB7, 0xBB", 9431 "EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9432 "MSRIndex": "0x1a6,0x1a7", 9433 "MSRValue": "0x0410000080", 9434 "Offcore": "1", 9435 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9436 "SampleAfterValue": "100003", 9437 "UMask": "0x1" 9438 }, 9439 { 9440 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9441 "Counter": "0,1,2,3", 9442 "CounterHTOff": "0,1,2,3", 9443 "Deprecated": "1", 9444 "EventCode": "0xB7, 0xBB", 9445 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9446 "MSRIndex": "0x1a6,0x1a7", 9447 "MSRValue": "0x0810000491", 9448 "Offcore": "1", 9449 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9450 "SampleAfterValue": "100003", 9451 "UMask": "0x1" 9452 }, 9453 { 9454 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9455 "Counter": "0,1,2,3", 9456 "CounterHTOff": "0,1,2,3", 9457 "Deprecated": "1", 9458 "EventCode": "0xB7, 0xBB", 9459 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9460 "MSRIndex": "0x1a6,0x1a7", 9461 "MSRValue": "0x3F90000001", 9462 "Offcore": "1", 9463 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9464 "SampleAfterValue": "100003", 9465 "UMask": "0x1" 9466 }, 9467 { 9468 "BriefDescription": "Counts demand data reads DEMAND_DATA_RD & L3_MISS_LOCAL_DRAM & NO_SNOOP_NEEDED", 9469 "Counter": "0,1,2,3", 9470 "CounterHTOff": "0,1,2,3", 9471 "EventCode": "0xB7, 0xBB", 9472 "EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED", 9473 "MSRIndex": "0x1a6,0x1a7", 9474 "MSRValue": "0x0104000001", 9475 "Offcore": "1", 9476 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9477 "SampleAfterValue": "100003", 9478 "UMask": "0x1" 9479 }, 9480 { 9481 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9482 "Counter": "0,1,2,3", 9483 "CounterHTOff": "0,1,2,3", 9484 "Deprecated": "1", 9485 "EventCode": "0xB7, 0xBB", 9486 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD", 9487 "MSRIndex": "0x1a6,0x1a7", 9488 "MSRValue": "0x083FC00010", 9489 "Offcore": "1", 9490 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9491 "SampleAfterValue": "100003", 9492 "UMask": "0x1" 9493 }, 9494 { 9495 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9496 "Counter": "0,1,2,3", 9497 "CounterHTOff": "0,1,2,3", 9498 "Deprecated": "1", 9499 "EventCode": "0xB7, 0xBB", 9500 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE", 9501 "MSRIndex": "0x1a6,0x1a7", 9502 "MSRValue": "0x103C000491", 9503 "Offcore": "1", 9504 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9505 "SampleAfterValue": "100003", 9506 "UMask": "0x1" 9507 }, 9508 { 9509 "BriefDescription": "Counts prefetch (that bring data to L2) data reads PF_L2_DATA_RD & L3_MISS & HIT_OTHER_CORE_NO_FWD", 9510 "Counter": "0,1,2,3", 9511 "CounterHTOff": "0,1,2,3", 9512 "EventCode": "0xB7, 0xBB", 9513 "EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD", 9514 "MSRIndex": "0x1a6,0x1a7", 9515 "MSRValue": "0x043C000010", 9516 "Offcore": "1", 9517 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9518 "SampleAfterValue": "100003", 9519 "UMask": "0x1" 9520 }, 9521 { 9522 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9523 "Counter": "0,1,2,3", 9524 "CounterHTOff": "0,1,2,3", 9525 "Deprecated": "1", 9526 "EventCode": "0xB7, 0xBB", 9527 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9528 "MSRIndex": "0x1a6,0x1a7", 9529 "MSRValue": "0x083C000100", 9530 "Offcore": "1", 9531 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9532 "SampleAfterValue": "100003", 9533 "UMask": "0x1" 9534 }, 9535 { 9536 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_LOCAL_DRAM & HIT_OTHER_CORE_FWD", 9537 "Counter": "0,1,2,3", 9538 "CounterHTOff": "0,1,2,3", 9539 "EventCode": "0xB7, 0xBB", 9540 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD", 9541 "MSRIndex": "0x1a6,0x1a7", 9542 "MSRValue": "0x0804000400", 9543 "Offcore": "1", 9544 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9545 "SampleAfterValue": "100003", 9546 "UMask": "0x1" 9547 }, 9548 { 9549 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS_REMOTE_HOP1_DRAM & ANY_SNOOP", 9550 "Counter": "0,1,2,3", 9551 "CounterHTOff": "0,1,2,3", 9552 "EventCode": "0xB7, 0xBB", 9553 "EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9554 "MSRIndex": "0x1a6,0x1a7", 9555 "MSRValue": "0x3F90000020", 9556 "Offcore": "1", 9557 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9558 "SampleAfterValue": "100003", 9559 "UMask": "0x1" 9560 }, 9561 { 9562 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9563 "Counter": "0,1,2,3", 9564 "CounterHTOff": "0,1,2,3", 9565 "Deprecated": "1", 9566 "EventCode": "0xB7, 0xBB", 9567 "EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS", 9568 "MSRIndex": "0x1a6,0x1a7", 9569 "MSRValue": "0x0210000122", 9570 "Offcore": "1", 9571 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9572 "SampleAfterValue": "100003", 9573 "UMask": "0x1" 9574 }, 9575 { 9576 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9577 "Counter": "0,1,2,3", 9578 "CounterHTOff": "0,1,2,3", 9579 "Deprecated": "1", 9580 "EventCode": "0xB7, 0xBB", 9581 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9582 "MSRIndex": "0x1a6,0x1a7", 9583 "MSRValue": "0x0810000001", 9584 "Offcore": "1", 9585 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9586 "SampleAfterValue": "100003", 9587 "UMask": "0x1" 9588 }, 9589 { 9590 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9591 "Counter": "0,1,2,3", 9592 "CounterHTOff": "0,1,2,3", 9593 "Deprecated": "1", 9594 "EventCode": "0xB7, 0xBB", 9595 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP", 9596 "MSRIndex": "0x1a6,0x1a7", 9597 "MSRValue": "0x3F90000400", 9598 "Offcore": "1", 9599 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9600 "SampleAfterValue": "100003", 9601 "UMask": "0x1" 9602 }, 9603 { 9604 "BriefDescription": "ALL_PF_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & SNOOP_NONE", 9605 "Counter": "0,1,2,3", 9606 "CounterHTOff": "0,1,2,3", 9607 "EventCode": "0xB7, 0xBB", 9608 "EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE", 9609 "MSRIndex": "0x1a6,0x1a7", 9610 "MSRValue": "0x0090000490", 9611 "Offcore": "1", 9612 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9613 "SampleAfterValue": "100003", 9614 "UMask": "0x1" 9615 }, 9616 { 9617 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS & HIT_OTHER_CORE_FWD", 9618 "Counter": "0,1,2,3", 9619 "CounterHTOff": "0,1,2,3", 9620 "EventCode": "0xB7, 0xBB", 9621 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD", 9622 "MSRIndex": "0x1a6,0x1a7", 9623 "MSRValue": "0x083C000400", 9624 "Offcore": "1", 9625 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9626 "SampleAfterValue": "100003", 9627 "UMask": "0x1" 9628 }, 9629 { 9630 "BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9631 "Counter": "0,1,2,3", 9632 "CounterHTOff": "0,1,2,3", 9633 "Deprecated": "1", 9634 "EventCode": "0xB7, 0xBB", 9635 "EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED", 9636 "MSRIndex": "0x1a6,0x1a7", 9637 "MSRValue": "0x0110000120", 9638 "Offcore": "1", 9639 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9640 "SampleAfterValue": "100003", 9641 "UMask": "0x1" 9642 }, 9643 { 9644 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs PF_L2_RFO & L3_MISS & REMOTE_HITM", 9645 "Counter": "0,1,2,3", 9646 "CounterHTOff": "0,1,2,3", 9647 "EventCode": "0xB7, 0xBB", 9648 "EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM", 9649 "MSRIndex": "0x1a6,0x1a7", 9650 "MSRValue": "0x103FC00020", 9651 "Offcore": "1", 9652 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9653 "SampleAfterValue": "100003", 9654 "UMask": "0x1" 9655 }, 9656 { 9657 "BriefDescription": "Number of times an HLE execution started.", 9658 "Counter": "0,1,2,3", 9659 "CounterHTOff": "0,1,2,3,4,5,6,7", 9660 "EventCode": "0xC8", 9661 "EventName": "HLE_RETIRED.START", 9662 "PublicDescription": "Number of times we entered an HLE region. Does not count nested transactions.", 9663 "SampleAfterValue": "2000003", 9664 "UMask": "0x1" 9665 }, 9666 { 9667 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9668 "Counter": "0,1,2,3", 9669 "CounterHTOff": "0,1,2,3", 9670 "Deprecated": "1", 9671 "EventCode": "0xB7, 0xBB", 9672 "EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE", 9673 "MSRIndex": "0x1a6,0x1a7", 9674 "MSRValue": "0x1004000020", 9675 "Offcore": "1", 9676 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9677 "SampleAfterValue": "100003", 9678 "UMask": "0x1" 9679 }, 9680 { 9681 "BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests PF_L1D_AND_SW & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 9682 "Counter": "0,1,2,3", 9683 "CounterHTOff": "0,1,2,3", 9684 "EventCode": "0xB7, 0xBB", 9685 "EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9686 "MSRIndex": "0x1a6,0x1a7", 9687 "MSRValue": "0x1010000400", 9688 "Offcore": "1", 9689 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9690 "SampleAfterValue": "100003", 9691 "UMask": "0x1" 9692 }, 9693 { 9694 "BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 9695 "Counter": "0,1,2,3", 9696 "CounterHTOff": "0,1,2,3", 9697 "Deprecated": "1", 9698 "EventCode": "0xB7, 0xBB", 9699 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD", 9700 "MSRIndex": "0x1a6,0x1a7", 9701 "MSRValue": "0x083FC00004", 9702 "Offcore": "1", 9703 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9704 "SampleAfterValue": "100003", 9705 "UMask": "0x1" 9706 }, 9707 { 9708 "BriefDescription": "ALL_DATA_RD & L3_MISS_REMOTE_HOP1_DRAM & HIT_OTHER_CORE_NO_FWD", 9709 "Counter": "0,1,2,3", 9710 "CounterHTOff": "0,1,2,3", 9711 "EventCode": "0xB7, 0xBB", 9712 "EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9713 "MSRIndex": "0x1a6,0x1a7", 9714 "MSRValue": "0x0410000491", 9715 "Offcore": "1", 9716 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9717 "SampleAfterValue": "100003", 9718 "UMask": "0x1" 9719 }, 9720 { 9721 "BriefDescription": "ALL_PF_RFO & L3_MISS & HIT_OTHER_CORE_FWD", 9722 "Counter": "0,1,2,3", 9723 "CounterHTOff": "0,1,2,3", 9724 "EventCode": "0xB7, 0xBB", 9725 "EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD", 9726 "MSRIndex": "0x1a6,0x1a7", 9727 "MSRValue": "0x083C000120", 9728 "Offcore": "1", 9729 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9730 "SampleAfterValue": "100003", 9731 "UMask": "0x1" 9732 }, 9733 { 9734 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9735 "Counter": "0,1,2,3", 9736 "CounterHTOff": "0,1,2,3", 9737 "Deprecated": "1", 9738 "EventCode": "0xB7, 0xBB", 9739 "EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD", 9740 "MSRIndex": "0x1a6,0x1a7", 9741 "MSRValue": "0x0410000400", 9742 "Offcore": "1", 9743 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9744 "SampleAfterValue": "100003", 9745 "UMask": "0x1" 9746 }, 9747 { 9748 "BriefDescription": "ALL_READS & L3_MISS & HITM_OTHER_CORE", 9749 "Counter": "0,1,2,3", 9750 "CounterHTOff": "0,1,2,3", 9751 "EventCode": "0xB7, 0xBB", 9752 "EventName": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE", 9753 "MSRIndex": "0x1a6,0x1a7", 9754 "MSRValue": "0x103C0007F7", 9755 "Offcore": "1", 9756 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9757 "SampleAfterValue": "100003", 9758 "UMask": "0x1" 9759 }, 9760 { 9761 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9762 "Counter": "0,1,2,3", 9763 "CounterHTOff": "0,1,2,3", 9764 "Deprecated": "1", 9765 "EventCode": "0xB7, 0xBB", 9766 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD", 9767 "MSRIndex": "0x1a6,0x1a7", 9768 "MSRValue": "0x0404000100", 9769 "Offcore": "1", 9770 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9771 "SampleAfterValue": "100003", 9772 "UMask": "0x1" 9773 }, 9774 { 9775 "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs PF_L3_RFO & L3_MISS_REMOTE_HOP1_DRAM & HITM_OTHER_CORE", 9776 "Counter": "0,1,2,3", 9777 "CounterHTOff": "0,1,2,3", 9778 "EventCode": "0xB7, 0xBB", 9779 "EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE", 9780 "MSRIndex": "0x1a6,0x1a7", 9781 "MSRValue": "0x1010000100", 9782 "Offcore": "1", 9783 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9784 "SampleAfterValue": "100003", 9785 "UMask": "0x1" 9786 }, 9787 { 9788 "BriefDescription": "Counts any other requests OTHER & L3_MISS & HIT_OTHER_CORE_FWD", 9789 "Counter": "0,1,2,3", 9790 "CounterHTOff": "0,1,2,3", 9791 "EventCode": "0xB7, 0xBB", 9792 "EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD", 9793 "MSRIndex": "0x1a6,0x1a7", 9794 "MSRValue": "0x083C008000", 9795 "Offcore": "1", 9796 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9797 "SampleAfterValue": "100003", 9798 "UMask": "0x1" 9799 }, 9800 { 9801 "BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9802 "Counter": "0,1,2,3", 9803 "CounterHTOff": "0,1,2,3", 9804 "Deprecated": "1", 9805 "EventCode": "0xB7, 0xBB", 9806 "EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD", 9807 "MSRIndex": "0x1a6,0x1a7", 9808 "MSRValue": "0x0810008000", 9809 "Offcore": "1", 9810 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9811 "SampleAfterValue": "100003", 9812 "UMask": "0x1" 9813 }, 9814 { 9815 "BriefDescription": "ALL_PF_RFO & L3_MISS & REMOTE_HITM", 9816 "Counter": "0,1,2,3", 9817 "CounterHTOff": "0,1,2,3", 9818 "EventCode": "0xB7, 0xBB", 9819 "EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM", 9820 "MSRIndex": "0x1a6,0x1a7", 9821 "MSRValue": "0x103FC00120", 9822 "Offcore": "1", 9823 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9824 "SampleAfterValue": "100003", 9825 "UMask": "0x1" 9826 }, 9827 { 9828 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9829 "Counter": "0,1,2,3", 9830 "CounterHTOff": "0,1,2,3", 9831 "Deprecated": "1", 9832 "EventCode": "0xB7, 0xBB", 9833 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS", 9834 "MSRIndex": "0x1a6,0x1a7", 9835 "MSRValue": "0x0204000010", 9836 "Offcore": "1", 9837 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9838 "SampleAfterValue": "100003", 9839 "UMask": "0x1" 9840 }, 9841 { 9842 "BriefDescription": "ALL_READS & L3_MISS_LOCAL_DRAM & SNOOP_NONE", 9843 "Counter": "0,1,2,3", 9844 "CounterHTOff": "0,1,2,3", 9845 "EventCode": "0xB7, 0xBB", 9846 "EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE", 9847 "MSRIndex": "0x1a6,0x1a7", 9848 "MSRValue": "0x00840007F7", 9849 "Offcore": "1", 9850 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9851 "SampleAfterValue": "100003", 9852 "UMask": "0x1" 9853 }, 9854 { 9855 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.", 9856 "Counter": "0,1,2,3", 9857 "CounterHTOff": "0,1,2,3", 9858 "EventCode": "0xCD", 9859 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", 9860 "MSRIndex": "0x3F6", 9861 "MSRValue": "0x4", 9862 "PEBS": "2", 9863 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.", 9864 "SampleAfterValue": "100003", 9865 "TakenAlone": "1", 9866 "UMask": "0x1" 9867 }, 9868 { 9869 "BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS", 9870 "Counter": "0,1,2,3", 9871 "CounterHTOff": "0,1,2,3", 9872 "Deprecated": "1", 9873 "EventCode": "0xB7, 0xBB", 9874 "EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_MISS", 9875 "MSRIndex": "0x1a6,0x1a7", 9876 "MSRValue": "0x023C000100", 9877 "Offcore": "1", 9878 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9879 "SampleAfterValue": "100003", 9880 "UMask": "0x1" 9881 }, 9882 { 9883 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.", 9884 "Counter": "0,1,2,3", 9885 "CounterHTOff": "0,1,2,3", 9886 "EventCode": "0xCD", 9887 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", 9888 "MSRIndex": "0x3F6", 9889 "MSRValue": "0x8", 9890 "PEBS": "2", 9891 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.", 9892 "SampleAfterValue": "50021", 9893 "TakenAlone": "1", 9894 "UMask": "0x1" 9895 }, 9896 { 9897 "BriefDescription": "ALL_READS & L3_MISS & HIT_OTHER_CORE_FWD", 9898 "Counter": "0,1,2,3", 9899 "CounterHTOff": "0,1,2,3", 9900 "EventCode": "0xB7, 0xBB", 9901 "EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD", 9902 "MSRIndex": "0x1a6,0x1a7", 9903 "MSRValue": "0x083C0007F7", 9904 "Offcore": "1", 9905 "PublicDescription": "Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.", 9906 "SampleAfterValue": "100003", 9907 "UMask": "0x1" 9908 } 9909]