1[ 2 { 3 "BriefDescription": "Bus queue is empty.", 4 "Counter": "0,1", 5 "EventCode": "0x7D", 6 "EventName": "BUSQ_EMPTY.SELF", 7 "SampleAfterValue": "200000", 8 "UMask": "0x40" 9 }, 10 { 11 "BriefDescription": "Number of Bus Not Ready signals asserted.", 12 "Counter": "0,1", 13 "EventCode": "0x61", 14 "EventName": "BUS_BNR_DRV.ALL_AGENTS", 15 "SampleAfterValue": "200000", 16 "UMask": "0x20" 17 }, 18 { 19 "BriefDescription": "Number of Bus Not Ready signals asserted.", 20 "Counter": "0,1", 21 "EventCode": "0x61", 22 "EventName": "BUS_BNR_DRV.THIS_AGENT", 23 "SampleAfterValue": "200000", 24 "UMask": "0x0" 25 }, 26 { 27 "BriefDescription": "Bus cycles while processor receives data.", 28 "Counter": "0,1", 29 "EventCode": "0x64", 30 "EventName": "BUS_DATA_RCV.SELF", 31 "SampleAfterValue": "200000", 32 "UMask": "0x40" 33 }, 34 { 35 "BriefDescription": "Bus cycles when data is sent on the bus.", 36 "Counter": "0,1", 37 "EventCode": "0x62", 38 "EventName": "BUS_DRDY_CLOCKS.ALL_AGENTS", 39 "SampleAfterValue": "200000", 40 "UMask": "0x20" 41 }, 42 { 43 "BriefDescription": "Bus cycles when data is sent on the bus.", 44 "Counter": "0,1", 45 "EventCode": "0x62", 46 "EventName": "BUS_DRDY_CLOCKS.THIS_AGENT", 47 "SampleAfterValue": "200000", 48 "UMask": "0x0" 49 }, 50 { 51 "BriefDescription": "HITM signal asserted.", 52 "Counter": "0,1", 53 "EventCode": "0x7B", 54 "EventName": "BUS_HITM_DRV.ALL_AGENTS", 55 "SampleAfterValue": "200000", 56 "UMask": "0x20" 57 }, 58 { 59 "BriefDescription": "HITM signal asserted.", 60 "Counter": "0,1", 61 "EventCode": "0x7B", 62 "EventName": "BUS_HITM_DRV.THIS_AGENT", 63 "SampleAfterValue": "200000", 64 "UMask": "0x0" 65 }, 66 { 67 "BriefDescription": "HIT signal asserted.", 68 "Counter": "0,1", 69 "EventCode": "0x7A", 70 "EventName": "BUS_HIT_DRV.ALL_AGENTS", 71 "SampleAfterValue": "200000", 72 "UMask": "0x20" 73 }, 74 { 75 "BriefDescription": "HIT signal asserted.", 76 "Counter": "0,1", 77 "EventCode": "0x7A", 78 "EventName": "BUS_HIT_DRV.THIS_AGENT", 79 "SampleAfterValue": "200000", 80 "UMask": "0x0" 81 }, 82 { 83 "BriefDescription": "IO requests waiting in the bus queue.", 84 "Counter": "0,1", 85 "EventCode": "0x7F", 86 "EventName": "BUS_IO_WAIT.SELF", 87 "SampleAfterValue": "200000", 88 "UMask": "0x40" 89 }, 90 { 91 "BriefDescription": "Bus cycles when a LOCK signal is asserted.", 92 "Counter": "0,1", 93 "EventCode": "0x63", 94 "EventName": "BUS_LOCK_CLOCKS.ALL_AGENTS", 95 "SampleAfterValue": "200000", 96 "UMask": "0xe0" 97 }, 98 { 99 "BriefDescription": "Bus cycles when a LOCK signal is asserted.", 100 "Counter": "0,1", 101 "EventCode": "0x63", 102 "EventName": "BUS_LOCK_CLOCKS.SELF", 103 "SampleAfterValue": "200000", 104 "UMask": "0x40" 105 }, 106 { 107 "BriefDescription": "Outstanding cacheable data read bus requests duration.", 108 "Counter": "0,1", 109 "EventCode": "0x60", 110 "EventName": "BUS_REQUEST_OUTSTANDING.ALL_AGENTS", 111 "SampleAfterValue": "200000", 112 "UMask": "0xe0" 113 }, 114 { 115 "BriefDescription": "Outstanding cacheable data read bus requests duration.", 116 "Counter": "0,1", 117 "EventCode": "0x60", 118 "EventName": "BUS_REQUEST_OUTSTANDING.SELF", 119 "SampleAfterValue": "200000", 120 "UMask": "0x40" 121 }, 122 { 123 "BriefDescription": "All bus transactions.", 124 "Counter": "0,1", 125 "EventCode": "0x70", 126 "EventName": "BUS_TRANS_ANY.ALL_AGENTS", 127 "SampleAfterValue": "200000", 128 "UMask": "0xe0" 129 }, 130 { 131 "BriefDescription": "All bus transactions.", 132 "Counter": "0,1", 133 "EventCode": "0x70", 134 "EventName": "BUS_TRANS_ANY.SELF", 135 "SampleAfterValue": "200000", 136 "UMask": "0x40" 137 }, 138 { 139 "BriefDescription": "Burst read bus transactions.", 140 "Counter": "0,1", 141 "EventCode": "0x65", 142 "EventName": "BUS_TRANS_BRD.ALL_AGENTS", 143 "SampleAfterValue": "200000", 144 "UMask": "0xe0" 145 }, 146 { 147 "BriefDescription": "Burst read bus transactions.", 148 "Counter": "0,1", 149 "EventCode": "0x65", 150 "EventName": "BUS_TRANS_BRD.SELF", 151 "SampleAfterValue": "200000", 152 "UMask": "0x40" 153 }, 154 { 155 "BriefDescription": "Burst (full cache-line) bus transactions.", 156 "Counter": "0,1", 157 "EventCode": "0x6E", 158 "EventName": "BUS_TRANS_BURST.ALL_AGENTS", 159 "SampleAfterValue": "200000", 160 "UMask": "0xe0" 161 }, 162 { 163 "BriefDescription": "Burst (full cache-line) bus transactions.", 164 "Counter": "0,1", 165 "EventCode": "0x6E", 166 "EventName": "BUS_TRANS_BURST.SELF", 167 "SampleAfterValue": "200000", 168 "UMask": "0x40" 169 }, 170 { 171 "BriefDescription": "Deferred bus transactions.", 172 "Counter": "0,1", 173 "EventCode": "0x6D", 174 "EventName": "BUS_TRANS_DEF.ALL_AGENTS", 175 "SampleAfterValue": "200000", 176 "UMask": "0xe0" 177 }, 178 { 179 "BriefDescription": "Deferred bus transactions.", 180 "Counter": "0,1", 181 "EventCode": "0x6D", 182 "EventName": "BUS_TRANS_DEF.SELF", 183 "SampleAfterValue": "200000", 184 "UMask": "0x40" 185 }, 186 { 187 "BriefDescription": "Instruction-fetch bus transactions.", 188 "Counter": "0,1", 189 "EventCode": "0x68", 190 "EventName": "BUS_TRANS_IFETCH.ALL_AGENTS", 191 "SampleAfterValue": "200000", 192 "UMask": "0xe0" 193 }, 194 { 195 "BriefDescription": "Instruction-fetch bus transactions.", 196 "Counter": "0,1", 197 "EventCode": "0x68", 198 "EventName": "BUS_TRANS_IFETCH.SELF", 199 "SampleAfterValue": "200000", 200 "UMask": "0x40" 201 }, 202 { 203 "BriefDescription": "Invalidate bus transactions.", 204 "Counter": "0,1", 205 "EventCode": "0x69", 206 "EventName": "BUS_TRANS_INVAL.ALL_AGENTS", 207 "SampleAfterValue": "200000", 208 "UMask": "0xe0" 209 }, 210 { 211 "BriefDescription": "Invalidate bus transactions.", 212 "Counter": "0,1", 213 "EventCode": "0x69", 214 "EventName": "BUS_TRANS_INVAL.SELF", 215 "SampleAfterValue": "200000", 216 "UMask": "0x40" 217 }, 218 { 219 "BriefDescription": "IO bus transactions.", 220 "Counter": "0,1", 221 "EventCode": "0x6C", 222 "EventName": "BUS_TRANS_IO.ALL_AGENTS", 223 "SampleAfterValue": "200000", 224 "UMask": "0xe0" 225 }, 226 { 227 "BriefDescription": "IO bus transactions.", 228 "Counter": "0,1", 229 "EventCode": "0x6C", 230 "EventName": "BUS_TRANS_IO.SELF", 231 "SampleAfterValue": "200000", 232 "UMask": "0x40" 233 }, 234 { 235 "BriefDescription": "Memory bus transactions.", 236 "Counter": "0,1", 237 "EventCode": "0x6F", 238 "EventName": "BUS_TRANS_MEM.ALL_AGENTS", 239 "SampleAfterValue": "200000", 240 "UMask": "0xe0" 241 }, 242 { 243 "BriefDescription": "Memory bus transactions.", 244 "Counter": "0,1", 245 "EventCode": "0x6F", 246 "EventName": "BUS_TRANS_MEM.SELF", 247 "SampleAfterValue": "200000", 248 "UMask": "0x40" 249 }, 250 { 251 "BriefDescription": "Partial bus transactions.", 252 "Counter": "0,1", 253 "EventCode": "0x6B", 254 "EventName": "BUS_TRANS_P.ALL_AGENTS", 255 "SampleAfterValue": "200000", 256 "UMask": "0xe0" 257 }, 258 { 259 "BriefDescription": "Partial bus transactions.", 260 "Counter": "0,1", 261 "EventCode": "0x6B", 262 "EventName": "BUS_TRANS_P.SELF", 263 "SampleAfterValue": "200000", 264 "UMask": "0x40" 265 }, 266 { 267 "BriefDescription": "Partial write bus transaction.", 268 "Counter": "0,1", 269 "EventCode": "0x6A", 270 "EventName": "BUS_TRANS_PWR.ALL_AGENTS", 271 "SampleAfterValue": "200000", 272 "UMask": "0xe0" 273 }, 274 { 275 "BriefDescription": "Partial write bus transaction.", 276 "Counter": "0,1", 277 "EventCode": "0x6A", 278 "EventName": "BUS_TRANS_PWR.SELF", 279 "SampleAfterValue": "200000", 280 "UMask": "0x40" 281 }, 282 { 283 "BriefDescription": "RFO bus transactions.", 284 "Counter": "0,1", 285 "EventCode": "0x66", 286 "EventName": "BUS_TRANS_RFO.ALL_AGENTS", 287 "SampleAfterValue": "200000", 288 "UMask": "0xe0" 289 }, 290 { 291 "BriefDescription": "RFO bus transactions.", 292 "Counter": "0,1", 293 "EventCode": "0x66", 294 "EventName": "BUS_TRANS_RFO.SELF", 295 "SampleAfterValue": "200000", 296 "UMask": "0x40" 297 }, 298 { 299 "BriefDescription": "Explicit writeback bus transactions.", 300 "Counter": "0,1", 301 "EventCode": "0x67", 302 "EventName": "BUS_TRANS_WB.ALL_AGENTS", 303 "SampleAfterValue": "200000", 304 "UMask": "0xe0" 305 }, 306 { 307 "BriefDescription": "Explicit writeback bus transactions.", 308 "Counter": "0,1", 309 "EventCode": "0x67", 310 "EventName": "BUS_TRANS_WB.SELF", 311 "SampleAfterValue": "200000", 312 "UMask": "0x40" 313 }, 314 { 315 "BriefDescription": "Cycles during which interrupts are disabled.", 316 "Counter": "0,1", 317 "EventCode": "0xC6", 318 "EventName": "CYCLES_INT_MASKED.CYCLES_INT_MASKED", 319 "SampleAfterValue": "2000000", 320 "UMask": "0x1" 321 }, 322 { 323 "BriefDescription": "Cycles during which interrupts are pending and disabled.", 324 "Counter": "0,1", 325 "EventCode": "0xC6", 326 "EventName": "CYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKED", 327 "SampleAfterValue": "2000000", 328 "UMask": "0x2" 329 }, 330 { 331 "BriefDescription": "Memory cluster signals to block micro-op dispatch for any reason", 332 "Counter": "0,1", 333 "EventCode": "0x9", 334 "EventName": "DISPATCH_BLOCKED.ANY", 335 "SampleAfterValue": "200000", 336 "UMask": "0x20" 337 }, 338 { 339 "BriefDescription": "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", 340 "Counter": "0,1", 341 "EventCode": "0x3A", 342 "EventName": "EIST_TRANS", 343 "SampleAfterValue": "200000", 344 "UMask": "0x0" 345 }, 346 { 347 "BriefDescription": "External snoops.", 348 "Counter": "0,1", 349 "EventCode": "0x77", 350 "EventName": "EXT_SNOOP.ALL_AGENTS.ANY", 351 "SampleAfterValue": "200000", 352 "UMask": "0x2b" 353 }, 354 { 355 "BriefDescription": "External snoops.", 356 "Counter": "0,1", 357 "EventCode": "0x77", 358 "EventName": "EXT_SNOOP.ALL_AGENTS.CLEAN", 359 "SampleAfterValue": "200000", 360 "UMask": "0x21" 361 }, 362 { 363 "BriefDescription": "External snoops.", 364 "Counter": "0,1", 365 "EventCode": "0x77", 366 "EventName": "EXT_SNOOP.ALL_AGENTS.HIT", 367 "SampleAfterValue": "200000", 368 "UMask": "0x22" 369 }, 370 { 371 "BriefDescription": "External snoops.", 372 "Counter": "0,1", 373 "EventCode": "0x77", 374 "EventName": "EXT_SNOOP.ALL_AGENTS.HITM", 375 "SampleAfterValue": "200000", 376 "UMask": "0x28" 377 }, 378 { 379 "BriefDescription": "External snoops.", 380 "Counter": "0,1", 381 "EventCode": "0x77", 382 "EventName": "EXT_SNOOP.THIS_AGENT.ANY", 383 "SampleAfterValue": "200000", 384 "UMask": "0xb" 385 }, 386 { 387 "BriefDescription": "External snoops.", 388 "Counter": "0,1", 389 "EventCode": "0x77", 390 "EventName": "EXT_SNOOP.THIS_AGENT.CLEAN", 391 "SampleAfterValue": "200000", 392 "UMask": "0x1" 393 }, 394 { 395 "BriefDescription": "External snoops.", 396 "Counter": "0,1", 397 "EventCode": "0x77", 398 "EventName": "EXT_SNOOP.THIS_AGENT.HIT", 399 "SampleAfterValue": "200000", 400 "UMask": "0x2" 401 }, 402 { 403 "BriefDescription": "External snoops.", 404 "Counter": "0,1", 405 "EventCode": "0x77", 406 "EventName": "EXT_SNOOP.THIS_AGENT.HITM", 407 "SampleAfterValue": "200000", 408 "UMask": "0x8" 409 }, 410 { 411 "BriefDescription": "Hardware interrupts received.", 412 "Counter": "0,1", 413 "EventCode": "0xC8", 414 "EventName": "HW_INT_RCV", 415 "SampleAfterValue": "200000", 416 "UMask": "0x0" 417 }, 418 { 419 "BriefDescription": "Number of segment register loads.", 420 "Counter": "0,1", 421 "EventCode": "0x6", 422 "EventName": "SEGMENT_REG_LOADS.ANY", 423 "SampleAfterValue": "200000", 424 "UMask": "0x80" 425 }, 426 { 427 "BriefDescription": "Bus stalled for snoops.", 428 "Counter": "0,1", 429 "EventCode": "0x7E", 430 "EventName": "SNOOP_STALL_DRV.ALL_AGENTS", 431 "SampleAfterValue": "200000", 432 "UMask": "0xe0" 433 }, 434 { 435 "BriefDescription": "Bus stalled for snoops.", 436 "Counter": "0,1", 437 "EventCode": "0x7E", 438 "EventName": "SNOOP_STALL_DRV.SELF", 439 "SampleAfterValue": "200000", 440 "UMask": "0x40" 441 }, 442 { 443 "BriefDescription": "Number of thermal trips", 444 "Counter": "0,1", 445 "EventCode": "0x3B", 446 "EventName": "THERMAL_TRIP", 447 "SampleAfterValue": "200000", 448 "UMask": "0xc0" 449 } 450]