xref: /freebsd/lib/libpmc/pmu-events/arch/x86/bonnell/memory.json (revision 959826ca1bb0a42ddd624bf1803ae2957a3282f3)
1[
2    {
3        "EventCode": "0x5",
4        "Counter": "0,1",
5        "UMask": "0xf",
6        "EventName": "MISALIGN_MEM_REF.SPLIT",
7        "SampleAfterValue": "200000",
8        "BriefDescription": "Memory references that cross an 8-byte boundary."
9    },
10    {
11        "EventCode": "0x5",
12        "Counter": "0,1",
13        "UMask": "0x9",
14        "EventName": "MISALIGN_MEM_REF.LD_SPLIT",
15        "SampleAfterValue": "200000",
16        "BriefDescription": "Load splits"
17    },
18    {
19        "EventCode": "0x5",
20        "Counter": "0,1",
21        "UMask": "0xa",
22        "EventName": "MISALIGN_MEM_REF.ST_SPLIT",
23        "SampleAfterValue": "200000",
24        "BriefDescription": "Store splits"
25    },
26    {
27        "EventCode": "0x5",
28        "Counter": "0,1",
29        "UMask": "0x8f",
30        "EventName": "MISALIGN_MEM_REF.SPLIT.AR",
31        "SampleAfterValue": "200000",
32        "BriefDescription": "Memory references that cross an 8-byte boundary (At Retirement)"
33    },
34    {
35        "EventCode": "0x5",
36        "Counter": "0,1",
37        "UMask": "0x89",
38        "EventName": "MISALIGN_MEM_REF.LD_SPLIT.AR",
39        "SampleAfterValue": "200000",
40        "BriefDescription": "Load splits (At Retirement)"
41    },
42    {
43        "EventCode": "0x5",
44        "Counter": "0,1",
45        "UMask": "0x8a",
46        "EventName": "MISALIGN_MEM_REF.ST_SPLIT.AR",
47        "SampleAfterValue": "200000",
48        "BriefDescription": "Store splits (Ar Retirement)"
49    },
50    {
51        "EventCode": "0x5",
52        "Counter": "0,1",
53        "UMask": "0x8c",
54        "EventName": "MISALIGN_MEM_REF.RMW_SPLIT",
55        "SampleAfterValue": "200000",
56        "BriefDescription": "ld-op-st splits"
57    },
58    {
59        "EventCode": "0x5",
60        "Counter": "0,1",
61        "UMask": "0x97",
62        "EventName": "MISALIGN_MEM_REF.BUBBLE",
63        "SampleAfterValue": "200000",
64        "BriefDescription": "Nonzero segbase 1 bubble"
65    },
66    {
67        "EventCode": "0x5",
68        "Counter": "0,1",
69        "UMask": "0x91",
70        "EventName": "MISALIGN_MEM_REF.LD_BUBBLE",
71        "SampleAfterValue": "200000",
72        "BriefDescription": "Nonzero segbase load 1 bubble"
73    },
74    {
75        "EventCode": "0x5",
76        "Counter": "0,1",
77        "UMask": "0x92",
78        "EventName": "MISALIGN_MEM_REF.ST_BUBBLE",
79        "SampleAfterValue": "200000",
80        "BriefDescription": "Nonzero segbase store 1 bubble"
81    },
82    {
83        "EventCode": "0x5",
84        "Counter": "0,1",
85        "UMask": "0x94",
86        "EventName": "MISALIGN_MEM_REF.RMW_BUBBLE",
87        "SampleAfterValue": "200000",
88        "BriefDescription": "Nonzero segbase ld-op-st 1 bubble"
89    },
90    {
91        "EventCode": "0x7",
92        "Counter": "0,1",
93        "UMask": "0x81",
94        "EventName": "PREFETCH.PREFETCHT0",
95        "SampleAfterValue": "200000",
96        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed."
97    },
98    {
99        "EventCode": "0x7",
100        "Counter": "0,1",
101        "UMask": "0x82",
102        "EventName": "PREFETCH.PREFETCHT1",
103        "SampleAfterValue": "200000",
104        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 instructions executed."
105    },
106    {
107        "EventCode": "0x7",
108        "Counter": "0,1",
109        "UMask": "0x84",
110        "EventName": "PREFETCH.PREFETCHT2",
111        "SampleAfterValue": "200000",
112        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT2 instructions executed."
113    },
114    {
115        "EventCode": "0x7",
116        "Counter": "0,1",
117        "UMask": "0x86",
118        "EventName": "PREFETCH.SW_L2",
119        "SampleAfterValue": "200000",
120        "BriefDescription": "Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed"
121    },
122    {
123        "EventCode": "0x7",
124        "Counter": "0,1",
125        "UMask": "0x88",
126        "EventName": "PREFETCH.PREFETCHNTA",
127        "SampleAfterValue": "200000",
128        "BriefDescription": "Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed"
129    },
130    {
131        "EventCode": "0x7",
132        "Counter": "0,1",
133        "UMask": "0x10",
134        "EventName": "PREFETCH.HW_PREFETCH",
135        "SampleAfterValue": "2000000",
136        "BriefDescription": "L1 hardware prefetch request"
137    },
138    {
139        "EventCode": "0x7",
140        "Counter": "0,1",
141        "UMask": "0xf",
142        "EventName": "PREFETCH.SOFTWARE_PREFETCH",
143        "SampleAfterValue": "200000",
144        "BriefDescription": "Any Software prefetch"
145    },
146    {
147        "EventCode": "0x7",
148        "Counter": "0,1",
149        "UMask": "0x8f",
150        "EventName": "PREFETCH.SOFTWARE_PREFETCH.AR",
151        "SampleAfterValue": "200000",
152        "BriefDescription": "Any Software prefetch"
153    }
154]