xref: /freebsd/lib/libpmc/pmu-events/arch/arm64/fujitsu/a64fx/sve.json (revision 9d97138e2d138bcd03dc28f45e78b13c536bed84) 
1*9d97138eSMitchell Horne[
2*9d97138eSMitchell Horne  {
3*9d97138eSMitchell Horne    "ArchStdEvent": "SIMD_INST_RETIRED"
4*9d97138eSMitchell Horne  },
5*9d97138eSMitchell Horne  {
6*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_INST_RETIRED"
7*9d97138eSMitchell Horne  },
8*9d97138eSMitchell Horne  {
9*9d97138eSMitchell Horne    "ArchStdEvent": "UOP_SPEC"
10*9d97138eSMitchell Horne  },
11*9d97138eSMitchell Horne  {
12*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_MATH_SPEC"
13*9d97138eSMitchell Horne  },
14*9d97138eSMitchell Horne  {
15*9d97138eSMitchell Horne    "ArchStdEvent": "FP_SPEC"
16*9d97138eSMitchell Horne  },
17*9d97138eSMitchell Horne  {
18*9d97138eSMitchell Horne    "ArchStdEvent": "FP_FMA_SPEC"
19*9d97138eSMitchell Horne  },
20*9d97138eSMitchell Horne  {
21*9d97138eSMitchell Horne    "ArchStdEvent": "FP_RECPE_SPEC"
22*9d97138eSMitchell Horne  },
23*9d97138eSMitchell Horne  {
24*9d97138eSMitchell Horne    "ArchStdEvent": "FP_CVT_SPEC"
25*9d97138eSMitchell Horne  },
26*9d97138eSMitchell Horne  {
27*9d97138eSMitchell Horne    "ArchStdEvent": "ASE_SVE_INT_SPEC"
28*9d97138eSMitchell Horne  },
29*9d97138eSMitchell Horne  {
30*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_PRED_SPEC"
31*9d97138eSMitchell Horne  },
32*9d97138eSMitchell Horne  {
33*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_MOVPRFX_SPEC"
34*9d97138eSMitchell Horne  },
35*9d97138eSMitchell Horne  {
36*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_MOVPRFX_U_SPEC"
37*9d97138eSMitchell Horne  },
38*9d97138eSMitchell Horne  {
39*9d97138eSMitchell Horne    "ArchStdEvent": "ASE_SVE_LD_SPEC"
40*9d97138eSMitchell Horne  },
41*9d97138eSMitchell Horne  {
42*9d97138eSMitchell Horne    "ArchStdEvent": "ASE_SVE_ST_SPEC"
43*9d97138eSMitchell Horne  },
44*9d97138eSMitchell Horne  {
45*9d97138eSMitchell Horne    "ArchStdEvent": "PRF_SPEC"
46*9d97138eSMitchell Horne  },
47*9d97138eSMitchell Horne  {
48*9d97138eSMitchell Horne    "ArchStdEvent": "BASE_LD_REG_SPEC"
49*9d97138eSMitchell Horne  },
50*9d97138eSMitchell Horne  {
51*9d97138eSMitchell Horne    "ArchStdEvent": "BASE_ST_REG_SPEC"
52*9d97138eSMitchell Horne  },
53*9d97138eSMitchell Horne  {
54*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_LDR_REG_SPEC"
55*9d97138eSMitchell Horne  },
56*9d97138eSMitchell Horne  {
57*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_STR_REG_SPEC"
58*9d97138eSMitchell Horne  },
59*9d97138eSMitchell Horne  {
60*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_LDR_PREG_SPEC"
61*9d97138eSMitchell Horne  },
62*9d97138eSMitchell Horne  {
63*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_STR_PREG_SPEC"
64*9d97138eSMitchell Horne  },
65*9d97138eSMitchell Horne  {
66*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_PRF_CONTIG_SPEC"
67*9d97138eSMitchell Horne  },
68*9d97138eSMitchell Horne  {
69*9d97138eSMitchell Horne    "ArchStdEvent": "ASE_SVE_LD_MULTI_SPEC"
70*9d97138eSMitchell Horne  },
71*9d97138eSMitchell Horne  {
72*9d97138eSMitchell Horne    "ArchStdEvent": "ASE_SVE_ST_MULTI_SPEC"
73*9d97138eSMitchell Horne  },
74*9d97138eSMitchell Horne  {
75*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_LD_GATHER_SPEC"
76*9d97138eSMitchell Horne  },
77*9d97138eSMitchell Horne  {
78*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_ST_SCATTER_SPEC"
79*9d97138eSMitchell Horne  },
80*9d97138eSMitchell Horne  {
81*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_PRF_GATHER_SPEC"
82*9d97138eSMitchell Horne  },
83*9d97138eSMitchell Horne  {
84*9d97138eSMitchell Horne    "ArchStdEvent": "SVE_LDFF_SPEC"
85*9d97138eSMitchell Horne  },
86*9d97138eSMitchell Horne  {
87*9d97138eSMitchell Horne    "ArchStdEvent": "FP_SCALE_OPS_SPEC"
88*9d97138eSMitchell Horne  },
89*9d97138eSMitchell Horne  {
90*9d97138eSMitchell Horne    "ArchStdEvent": "FP_FIXED_OPS_SPEC"
91*9d97138eSMitchell Horne  },
92*9d97138eSMitchell Horne  {
93*9d97138eSMitchell Horne    "ArchStdEvent": "FP_HP_SCALE_OPS_SPEC"
94*9d97138eSMitchell Horne  },
95*9d97138eSMitchell Horne  {
96*9d97138eSMitchell Horne    "ArchStdEvent": "FP_HP_FIXED_OPS_SPEC"
97*9d97138eSMitchell Horne  },
98*9d97138eSMitchell Horne  {
99*9d97138eSMitchell Horne    "ArchStdEvent": "FP_SP_SCALE_OPS_SPEC"
100*9d97138eSMitchell Horne  },
101*9d97138eSMitchell Horne  {
102*9d97138eSMitchell Horne    "ArchStdEvent": "FP_SP_FIXED_OPS_SPEC"
103*9d97138eSMitchell Horne  },
104*9d97138eSMitchell Horne  {
105*9d97138eSMitchell Horne    "ArchStdEvent": "FP_DP_SCALE_OPS_SPEC"
106*9d97138eSMitchell Horne  },
107*9d97138eSMitchell Horne  {
108*9d97138eSMitchell Horne    "ArchStdEvent": "FP_DP_FIXED_OPS_SPEC"
109*9d97138eSMitchell Horne  }
110*9d97138eSMitchell Horne]
111