xref: /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/neoverse-n2/memory.json (revision 9d97138e2d138bcd03dc28f45e78b13c536bed84) 
1*9d97138eSMitchell Horne[
2*9d97138eSMitchell Horne    {
3*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS"
4*9d97138eSMitchell Horne    },
5*9d97138eSMitchell Horne    {
6*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS_RD"
7*9d97138eSMitchell Horne    },
8*9d97138eSMitchell Horne    {
9*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS_WR"
10*9d97138eSMitchell Horne    },
11*9d97138eSMitchell Horne    {
12*9d97138eSMitchell Horne        "ArchStdEvent": "UNALIGNED_LD_SPEC"
13*9d97138eSMitchell Horne    },
14*9d97138eSMitchell Horne    {
15*9d97138eSMitchell Horne        "ArchStdEvent": "UNALIGNED_ST_SPEC"
16*9d97138eSMitchell Horne    },
17*9d97138eSMitchell Horne    {
18*9d97138eSMitchell Horne        "ArchStdEvent": "UNALIGNED_LDST_SPEC"
19*9d97138eSMitchell Horne    },
20*9d97138eSMitchell Horne    {
21*9d97138eSMitchell Horne        "ArchStdEvent": "LDST_ALIGN_LAT"
22*9d97138eSMitchell Horne    },
23*9d97138eSMitchell Horne    {
24*9d97138eSMitchell Horne        "ArchStdEvent": "LD_ALIGN_LAT"
25*9d97138eSMitchell Horne    },
26*9d97138eSMitchell Horne    {
27*9d97138eSMitchell Horne        "ArchStdEvent": "ST_ALIGN_LAT"
28*9d97138eSMitchell Horne    },
29*9d97138eSMitchell Horne    {
30*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS_CHECKED"
31*9d97138eSMitchell Horne    },
32*9d97138eSMitchell Horne    {
33*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS_CHECKED_RD"
34*9d97138eSMitchell Horne    },
35*9d97138eSMitchell Horne    {
36*9d97138eSMitchell Horne        "ArchStdEvent": "MEM_ACCESS_CHECKED_WR"
37*9d97138eSMitchell Horne    }
38*9d97138eSMitchell Horne]
39