xref: /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/neoverse-e1/instruction.json (revision 9d97138e2d138bcd03dc28f45e78b13c536bed84) 
1*9d97138eSMitchell Horne[
2*9d97138eSMitchell Horne    {
3*9d97138eSMitchell Horne        "ArchStdEvent": "SW_INCR"
4*9d97138eSMitchell Horne    },
5*9d97138eSMitchell Horne    {
6*9d97138eSMitchell Horne        "ArchStdEvent": "LD_RETIRED"
7*9d97138eSMitchell Horne    },
8*9d97138eSMitchell Horne    {
9*9d97138eSMitchell Horne        "ArchStdEvent": "ST_RETIRED"
10*9d97138eSMitchell Horne    },
11*9d97138eSMitchell Horne    {
12*9d97138eSMitchell Horne        "ArchStdEvent": "INST_RETIRED"
13*9d97138eSMitchell Horne    },
14*9d97138eSMitchell Horne    {
15*9d97138eSMitchell Horne        "ArchStdEvent": "EXC_RETURN"
16*9d97138eSMitchell Horne    },
17*9d97138eSMitchell Horne    {
18*9d97138eSMitchell Horne        "ArchStdEvent": "CID_WRITE_RETIRED"
19*9d97138eSMitchell Horne    },
20*9d97138eSMitchell Horne    {
21*9d97138eSMitchell Horne        "ArchStdEvent": "PC_WRITE_RETIRED"
22*9d97138eSMitchell Horne    },
23*9d97138eSMitchell Horne    {
24*9d97138eSMitchell Horne        "ArchStdEvent": "BR_IMMED_RETIRED"
25*9d97138eSMitchell Horne    },
26*9d97138eSMitchell Horne    {
27*9d97138eSMitchell Horne        "ArchStdEvent": "BR_RETURN_RETIRED"
28*9d97138eSMitchell Horne    },
29*9d97138eSMitchell Horne    {
30*9d97138eSMitchell Horne        "ArchStdEvent": "INST_SPEC"
31*9d97138eSMitchell Horne    },
32*9d97138eSMitchell Horne    {
33*9d97138eSMitchell Horne        "ArchStdEvent": "TTBR_WRITE_RETIRED"
34*9d97138eSMitchell Horne    },
35*9d97138eSMitchell Horne    {
36*9d97138eSMitchell Horne        "ArchStdEvent": "BR_RETIRED"
37*9d97138eSMitchell Horne    },
38*9d97138eSMitchell Horne    {
39*9d97138eSMitchell Horne        "ArchStdEvent": "BR_MIS_PRED_RETIRED"
40*9d97138eSMitchell Horne    },
41*9d97138eSMitchell Horne    {
42*9d97138eSMitchell Horne        "ArchStdEvent": "LD_SPEC"
43*9d97138eSMitchell Horne    },
44*9d97138eSMitchell Horne    {
45*9d97138eSMitchell Horne        "ArchStdEvent": "ST_SPEC"
46*9d97138eSMitchell Horne    },
47*9d97138eSMitchell Horne    {
48*9d97138eSMitchell Horne        "ArchStdEvent": "LDST_SPEC"
49*9d97138eSMitchell Horne    },
50*9d97138eSMitchell Horne    {
51*9d97138eSMitchell Horne        "ArchStdEvent": "DP_SPEC"
52*9d97138eSMitchell Horne    },
53*9d97138eSMitchell Horne    {
54*9d97138eSMitchell Horne        "ArchStdEvent": "ASE_SPEC"
55*9d97138eSMitchell Horne    },
56*9d97138eSMitchell Horne    {
57*9d97138eSMitchell Horne        "ArchStdEvent": "VFP_SPEC"
58*9d97138eSMitchell Horne    },
59*9d97138eSMitchell Horne    {
60*9d97138eSMitchell Horne        "ArchStdEvent": "CRYPTO_SPEC"
61*9d97138eSMitchell Horne    },
62*9d97138eSMitchell Horne    {
63*9d97138eSMitchell Horne        "ArchStdEvent": "ISB_SPEC"
64*9d97138eSMitchell Horne    }
65*9d97138eSMitchell Horne]
66