1.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved. 2.\" 3.\" Redistribution and use in source and binary forms, with or without 4.\" modification, are permitted provided that the following conditions 5.\" are met: 6.\" 1. Redistributions of source code must retain the above copyright 7.\" notice, this list of conditions and the following disclaimer. 8.\" 2. Redistributions in binary form must reproduce the above copyright 9.\" notice, this list of conditions and the following disclaimer in the 10.\" documentation and/or other materials provided with the distribution. 11.\" 12.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 13.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 16.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22.\" SUCH DAMAGE. 23.\" 24.\" $FreeBSD$ 25.\" 26.Dd May 28, 2022 27.Dt PMC 3 28.Os 29.Sh NAME 30.Nm pmc 31.Nd library for accessing hardware performance monitoring counters 32.Sh LIBRARY 33.Lb libpmc 34.Sh SYNOPSIS 35.In pmc.h 36.Sh DESCRIPTION 37The 38.Lb libpmc 39provides a programming interface that allows applications to use 40hardware performance counters to gather performance data about 41specific processes or for the system as a whole. 42The library is implemented using the lower-level facilities offered by 43the 44.Xr hwpmc 4 45driver. 46.Ss Key Concepts 47Performance monitoring counters (PMCs) are represented by the library 48using a software abstraction. 49These 50.Dq abstract 51PMCs can have two scopes: 52.Bl -bullet 53.It 54System scope. 55These PMCs measure events in a whole-system manner, i.e., independent 56of the currently executing thread. 57System scope PMCs are allocated on specific CPUs and do not 58migrate between CPUs. 59Non-privileged process are allowed to allocate system scope PMCs if the 60.Xr hwpmc 4 61sysctl tunable: 62.Va security.bsd.unprivileged_syspmcs 63is non-zero. 64.It 65Process scope. 66These PMCs only measure hardware events when the processes they are 67attached to are executing on a CPU. 68In an SMP system, process scope PMCs migrate between CPUs along with 69their target processes. 70.El 71.Pp 72Orthogonal to PMC scope, PMCs may be allocated in one of two 73operational modes: 74.Bl -bullet 75.It 76Counting PMCs measure events according to their scope 77(system or process). 78The application needs to explicitly read these counters 79to retrieve their value. 80.It 81Sampling PMCs cause the CPU to be periodically interrupted 82and information about its state of execution to be collected. 83Sampling PMCs are used to profile specific processes and kernel 84threads or to profile the system as a whole. 85.El 86.Pp 87The scope and operational mode for a software PMC are specified at 88PMC allocation time. 89An application is allowed to allocate multiple PMCs subject 90to availability of hardware resources. 91.Pp 92The library uses human-readable strings to name the event being 93measured by hardware. 94The syntax used for specifying a hardware event along with additional 95event specific qualifiers (if any) is described in detail in section 96.Sx "EVENT SPECIFIERS" 97below. 98.Pp 99PMCs are associated with the process that allocated them and 100will be automatically reclaimed by the system when the process exits. 101Additionally, process-scope PMCs have to be attached to one or more 102target processes before they can perform measurements. 103A process-scope PMC may be attached to those target processes 104that its owner process would otherwise be permitted to debug. 105An owner process may attach PMCs to itself allowing 106it to measure its own behavior. 107Additionally, on some machine architectures, such self-attached PMCs 108may be read cheaply using specialized instructions supported by the 109processor. 110.Pp 111Certain kinds of PMCs require that a log file be configured before 112they may be started. 113These include: 114.Bl -bullet 115.It 116System scope sampling PMCs. 117.It 118Process scope sampling PMCs. 119.It 120Process scope counting PMCs that have been configured to report PMC 121readings on process context switches or process exits. 122.El 123.Pp 124Up to one log file may be configured per owner process. 125Events logged to a log file may be subsequently analyzed using the 126.Xr pmclog 3 127family of functions. 128.Ss Supported CPUs 129The CPUs known to the PMC library are named by the 130.Vt "enum pmc_cputype" 131enumeration. 132Supported CPUs include: 133.Pp 134.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact 135.It Li PMC_CPU_AMD_K7 136.Tn "AMD Athlon" 137CPUs. 138.It Li PMC_CPU_AMD_K8 139.Tn "AMD Athlon64" 140CPUs. 141.It Li PMC_CPU_INTEL_ATOM 142.Tn Intel 143.Tn Atom 144CPUs and other CPUs conforming to version 3 of the 145.Tn Intel 146performance measurement architecture. 147.It Li PMC_CPU_INTEL_CORE 148.Tn Intel 149.Tn Core Solo 150and 151.Tn Core Duo 152CPUs, and other CPUs conforming to version 1 of the 153.Tn Intel 154performance measurement architecture. 155.It Li PMC_CPU_INTEL_CORE2 156.Tn Intel 157.Tn "Core2 Solo" , 158.Tn "Core2 Duo" 159and 160.Tn "Core2 Extreme" 161CPUs, and other CPUs conforming to version 2 of the 162.Tn Intel 163performance measurement architecture. 164.El 165.Ss Supported PMCs 166PMC supported by this library are named by the 167.Vt enum pmc_class 168enumeration. 169Supported PMC kinds include: 170.Pp 171.Bl -tag -width "Li PMC_CLASS_IAF" -compact 172.It Li PMC_CLASS_IAF 173Fixed function hardware counters presents in CPUs conforming to the 174.Tn Intel 175performance measurement architecture version 2 and later. 176.It Li PMC_CLASS_IAP 177Programmable hardware counters present in CPUs conforming to the 178.Tn Intel 179performance measurement architecture version 1 and later. 180.It Li PMC_CLASS_K7 181Programmable hardware counters present in 182.Tn "AMD Athlon" 183CPUs. 184.It Li PMC_CLASS_K8 185Programmable hardware counters present in 186.Tn "AMD Athlon64" 187CPUs. 188.It Li PMC_CLASS_TSC 189The timestamp counter on i386 and amd64 architecture CPUs. 190.It Li PMC_CLASS_SOFT 191Software events. 192.El 193.Ss PMC Capabilities 194Capabilities of performance monitoring hardware are denoted using 195the 196.Vt "enum pmc_caps" 197enumeration. 198Supported capabilities include: 199.Pp 200.Bl -tag -width "Li PMC_CAP_INTERRUPT" -compact 201.It Li PMC_CAP_CASCADE 202The ability to cascade counters. 203.It Li PMC_CAP_DOMWIDE 204Separate counters tied to each NUMA domain. 205.It Li PMC_CAP_EDGE 206The ability to count negated to asserted transitions of the hardware 207conditions being probed for. 208.It Li PMC_CAP_INTERRUPT 209The ability to interrupt the CPU. 210.It Li PMC_CAP_INVERT 211The ability to invert the sense of the hardware conditions being 212measured. 213.It Li PMC_CAP_PRECISE 214The ability to perform precise sampling. 215.It Li PMC_CAP_QUALIFIER 216The hardware allows monitored to be further qualified in some 217system dependent way. 218.It Li PMC_CAP_READ 219The ability to read from performance counters. 220.It Li PMC_CAP_SYSTEM 221The ability to restrict counting of hardware events to when the CPU is 222running privileged code. 223.It Li PMC_CAP_SYSWIDE 224A single counter aggregating events for the whole system. 225.It Li PMC_CAP_THRESHOLD 226The ability to ignore simultaneous hardware events below a 227programmable threshold. 228.It Li PMC_CAP_USER 229The ability to restrict counting of hardware events to those when the 230CPU is running unprivileged code. 231.It Li PMC_CAP_WRITE 232The ability to write to performance counters. 233.El 234.Ss CPU Naming Conventions 235CPUs are named using small integers from zero up to, but 236excluding, the value returned by function 237.Fn pmc_ncpu . 238On platforms supporting sparsely numbered CPUs not all the numbers in 239this range will denote valid CPUs. 240Operations on non-existent CPUs will return an error. 241.Ss Functional Grouping of the API 242This section contains a brief overview of the available functionality 243in the PMC library. 244Each function listed here is described further in its own manual page. 245.Bl -tag -width 2n 246.It Administration 247.Bl -tag -width 6n -compact 248.It Fn pmc_disable , Fn pmc_enable 249Administratively disable (enable) specific performance monitoring 250counter hardware. 251Counters that are disabled will not be available to applications to 252use. 253.El 254.It "Convenience Functions" 255.Bl -tag -width 6n -compact 256.It Fn pmc_event_names_of_class 257Returns a list of event names supported by a given PMC type. 258.It Fn pmc_name_of_capability 259Convert a 260.Dv PMC_CAP_* 261flag to a human-readable string. 262.It Fn pmc_name_of_class 263Convert a 264.Dv PMC_CLASS_* 265constant to a human-readable string. 266.It Fn pmc_name_of_cputype 267Return a human-readable name for a CPU type. 268.It Fn pmc_name_of_disposition 269Return a human-readable string describing a PMC's disposition. 270.It Fn pmc_name_of_event 271Convert a numeric event code to a human-readable string. 272.It Fn pmc_name_of_mode 273Convert a 274.Dv PMC_MODE_* 275constant to a human-readable name. 276.It Fn pmc_name_of_state 277Return a human-readable string describing a PMC's current state. 278.El 279.It "Library Initialization" 280.Bl -tag -width 6n -compact 281.It Fn pmc_init 282Initialize the library. 283This function must be called before any other library function. 284.El 285.It "Log File Handling" 286.Bl -tag -width 6n -compact 287.It Fn pmc_configure_logfile 288Configure a log file for 289.Xr hwpmc 4 290to write logged events to. 291.It Fn pmc_flush_logfile 292Flush all pending log data in 293.Xr hwpmc 4 Ns Ap s 294buffers. 295.It Fn pmc_close_logfile 296Flush all pending log data and close 297.Xr hwpmc 4 Ns Ap s 298side of the stream. 299.It Fn pmc_writelog 300Append arbitrary user data to the current log file. 301.El 302.It "PMC Management" 303.Bl -tag -width 6n -compact 304.It Fn pmc_allocate , Fn pmc_release 305Allocate (free) a PMC. 306.It Fn pmc_attach , Fn pmc_detach 307Attach (detach) a process scope PMC to a target. 308.It Fn pmc_read , Fn pmc_write , Fn pmc_rw 309Read (write) a value from (to) a PMC. 310.It Fn pmc_start , Fn pmc_stop 311Start (stop) a software PMC. 312.It Fn pmc_set 313Set the reload value for a sampling PMC. 314.El 315.It "Queries" 316.Bl -tag -width 6n -compact 317.It Fn pmc_capabilities 318Retrieve the capabilities for a given PMC. 319.It Fn pmc_cpuinfo 320Retrieve information about the CPUs and PMC hardware present in the 321system. 322.It Fn pmc_get_driver_stats 323Retrieve statistics maintained by 324.Xr hwpmc 4 . 325.It Fn pmc_ncpu 326Determine the greatest possible CPU number on the system. 327.It Fn pmc_npmc 328Return the number of hardware PMCs present in a given CPU. 329.It Fn pmc_pmcinfo 330Return information about the state of a given CPU's PMCs. 331.It Fn pmc_width 332Determine the width of a hardware counter in bits. 333.El 334.It "x86 Architecture Specific API" 335.Bl -tag -width 6n -compact 336.It Fn pmc_get_msr 337Returns the processor model specific register number 338associated with 339.Fa pmc . 340Applications may then use the x86 341.Ic RDPMC 342instruction to directly read the contents of the PMC. 343.El 344.El 345.Ss Signal Handling Requirements 346Applications using PMCs are required to handle the following signals: 347.Bl -tag -width ".Dv SIGBUS" 348.It Dv SIGBUS 349When the 350.Xr hwpmc 4 351module is unloaded using 352.Xr kldunload 8 , 353processes that have PMCs allocated to them will be sent a 354.Dv SIGBUS 355signal. 356.It Dv SIGIO 357The 358.Xr hwpmc 4 359driver will send a PMC owning process a 360.Dv SIGIO 361signal if: 362.Bl -bullet 363.It 364If any process-mode PMC allocated by it loses all its 365target processes. 366.It 367If the driver encounters an error when writing log data to a 368configured log file. 369This error may be retrieved by a subsequent call to 370.Fn pmc_flush_logfile . 371.El 372.El 373.Ss Typical Program Flow 374.Bl -enum 375.It 376An application would first invoke function 377.Fn pmc_init 378to allow the library to initialize itself. 379.It 380Signal handling would then be set up. 381.It 382Next the application would allocate the PMCs it desires using function 383.Fn pmc_allocate . 384.It 385Initial values for PMCs may be set using function 386.Fn pmc_set . 387.It 388If a log file is necessary for the PMCs to work, it would 389be configured using function 390.Fn pmc_configure_logfile . 391.It 392Process scope PMCs would then be attached to their target processes 393using function 394.Fn pmc_attach . 395.It 396The PMCs would then be started using function 397.Fn pmc_start . 398.It 399Once started, the values of counting PMCs may be read using function 400.Fn pmc_read . 401For PMCs that write events to the log file, this logged data would be 402read and parsed using the 403.Xr pmclog 3 404family of functions. 405.It 406PMCs are stopped using function 407.Fn pmc_stop , 408and process scope PMCs are detached from their targets using 409function 410.Fn pmc_detach . 411.It 412Before the process exits, its may release its PMCs using function 413.Fn pmc_release . 414Any configured log file may be closed using function 415.Fn pmc_configure_logfile . 416.El 417.Sh EVENT SPECIFIERS 418Event specifiers are strings comprising of an event name, followed by 419optional parameters modifying the semantics of the hardware event 420being probed. 421Event names are PMC architecture dependent, but the PMC library defines 422machine independent aliases for commonly used events. 423.Pp 424Event specifiers spellings are case-insensitive and space characters, 425periods, underscores and hyphens are considered equivalent to each other. 426Thus the event specifiers 427.Qq "Example Event" , 428.Qq "example-event" , 429and 430.Qq "EXAMPLE_EVENT" 431are equivalent. 432.Ss PMC Architecture Dependent Events 433PMC architecture dependent event specifiers are described in the 434following manual pages: 435.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE " 436.It Em "PMC Class" Ta Em "Manual Page" 437.It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3 438.It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3 439.It Li PMC_CLASS_K7 Ta Xr pmc.k7 3 440.It Li PMC_CLASS_K8 Ta Xr pmc.k8 3 441.It Li PMC_CLASS_TSC Ta Xr pmc.tsc 3 442.El 443.Ss Event Name Aliases 444Event name aliases are PMC-independent names for commonly used events. 445The following aliases are known to this version of the 446.Nm pmc 447library: 448.Bl -tag -width indent 449.It Li branches 450Measure the number of branches retired. 451.It Li branch-mispredicts 452Measure the number of retired branches that were mispredicted. 453.It Li cycles 454Measure processor cycles. 455This event is implemented using the processor's Time Stamp Counter 456register. 457.It Li dc-misses 458Measure the number of data cache misses. 459.It Li ic-misses 460Measure the number of instruction cache misses. 461.It Li instructions 462Measure the number of instructions retired. 463.It Li interrupts 464Measure the number of interrupts seen. 465.It Li unhalted-cycles 466Measure the number of cycles the processor is not in a halted 467or sleep state. 468.El 469.Sh COMPATIBILITY 470The interface between the 471.Nm pmc 472library and the 473.Xr hwpmc 4 474driver is intended to be private to the implementation and may 475change. 476In order to ease forward compatibility with future versions of the 477.Xr hwpmc 4 478driver, applications are urged to dynamically link with the 479.Nm pmc 480library. 481.Pp 482The 483.Nm pmc 484API is 485.Ud 486.Sh SEE ALSO 487.Xr pmc.atom 3 , 488.Xr pmc.core 3 , 489.Xr pmc.core2 3 , 490.Xr pmc.haswell 3 , 491.Xr pmc.haswelluc 3 , 492.Xr pmc.haswellxeon 3 , 493.Xr pmc.iaf 3 , 494.Xr pmc.ivybridge 3 , 495.Xr pmc.ivybridgexeon 3 , 496.Xr pmc.k7 3 , 497.Xr pmc.k8 3 , 498.Xr pmc.sandybridge 3 , 499.Xr pmc.sandybridgeuc 3 , 500.Xr pmc.sandybridgexeon 3 , 501.Xr pmc.soft 3 , 502.Xr pmc.tsc 3 , 503.Xr pmc.westmere 3 , 504.Xr pmc.westmereuc 3 , 505.Xr pmc_allocate 3 , 506.Xr pmc_attach 3 , 507.Xr pmc_capabilities 3 , 508.Xr pmc_configure_logfile 3 , 509.Xr pmc_disable 3 , 510.Xr pmc_event_names_of_class 3 , 511.Xr pmc_get_driver_stats 3 , 512.Xr pmc_get_msr 3 , 513.Xr pmc_init 3 , 514.Xr pmc_name_of_capability 3 , 515.Xr pmc_read 3 , 516.Xr pmc_set 3 , 517.Xr pmc_start 3 , 518.Xr pmclog 3 , 519.Xr hwpmc 4 , 520.Xr pmccontrol 8 , 521.Xr pmcstat 8 522.Sh HISTORY 523The 524.Nm pmc 525library first appeared in 526.Fx 6.0 . 527.Sh AUTHORS 528The 529.Lb libpmc 530library was written by 531.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . 532