xref: /freebsd/lib/libpmc/pmc.3 (revision 4c8945a06b01a5c8122cdeb402af36bb46a06acc)
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24.\" $FreeBSD$
25.\"
26.Dd November 24, 2008
27.Dt PMC 3
28.Os
29.Sh NAME
30.Nm pmc
31.Nd library for accessing hardware performance monitoring counters
32.Sh LIBRARY
33.Lb libpmc
34.Sh SYNOPSIS
35.In pmc.h
36.Sh DESCRIPTION
37The
38.Lb libpmc
39provides a programming interface that allows applications to use
40hardware performance counters to gather performance data about
41specific processes or for the system as a whole.
42The library is implemented using the lower-level facilities offered by
43the
44.Xr hwpmc 4
45driver.
46.Ss Key Concepts
47Performance monitoring counters (PMCs) are represented by the library
48using a software abstraction.
49These
50.Dq abstract
51PMCs can have two scopes:
52.Bl -bullet
53.It
54System scope.
55These PMCs measure events in a whole-system manner, i.e., independent
56of the currently executing thread.
57System scope PMCs are allocated on specific CPUs and do not
58migrate between CPUs.
59Non-privileged process are allowed to allocate system scope PMCs if the
60.Xr hwpmc 4
61sysctl tunable:
62.Va security.bsd.unprivileged_syspmcs
63is non-zero.
64.It
65Process scope.
66These PMCs only measure hardware events when the processes they are
67attached to are executing on a CPU.
68In an SMP system, process scope PMCs migrate between CPUs along with
69their target processes.
70.El
71.Pp
72Orthogonal to PMC scope, PMCs may be allocated in one of two
73operational modes:
74.Bl -bullet
75.It
76Counting PMCs measure events according to their scope
77(system or process).
78The application needs to explicitly read these counters
79to retrieve their value.
80.It
81Sampling PMCs cause the CPU to be periodically interrupted
82and information about its state of execution to be collected.
83Sampling PMCs are used to profile specific processes and kernel
84threads or to profile the system as a whole.
85.El
86.Pp
87The scope and operational mode for a software PMC are specified at
88PMC allocation time.
89An application is allowed to allocate multiple PMCs subject
90to availability of hardware resources.
91.Pp
92The library uses human-readable strings to name the event being
93measured by hardware.
94The syntax used for specifying a hardware event along with additional
95event specific qualifiers (if any) is described in detail in section
96.Sx "EVENT SPECIFIERS"
97below.
98.Pp
99PMCs are associated with the process that allocated them and
100will be automatically reclaimed by the system when the process exits.
101Additionally, process-scope PMCs have to be attached to one or more
102target processes before they can perform measurements.
103A process-scope PMC may be attached to those target processes
104that its owner process would otherwise be permitted to debug.
105An owner process may attach PMCs to itself allowing
106it to measure its own behavior.
107Additionally, on some machine architectures, such self-attached PMCs
108may be read cheaply using specialized instructions supported by the
109processor.
110.Pp
111Certain kinds of PMCs require that a log file be configured before
112they may be started.
113These include:
114.Bl -bullet -compact
115.It
116System scope sampling PMCs.
117.It
118Process scope sampling PMCs.
119.It
120Process scope counting PMCs that have been configured to report PMC
121readings on process context switches or process exits.
122.El
123Up to one log file may be configured per owner process.
124Events logged to a log file may be subsequently analyzed using the
125.Xr pmclog 3
126family of functions.
127.Ss Supported CPUs
128The CPUs known to the PMC library are named by the
129.Vt "enum pmc_cputype"
130enumeration.
131Supported CPUs include:
132.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact
133.It Li PMC_CPU_AMD_K7
134.Tn "AMD Athlon"
135CPUs.
136.It Li PMC_CPU_AMD_K8
137.Tn "AMD Athlon64"
138CPUs.
139.It Li PMC_CPU_INTEL_ATOM
140.Tn Intel
141.Tn Atom
142CPUs and other CPUs conforming to version 3 of the
143.Tn Intel
144performance measurement architecture.
145.It Li PMC_CPU_INTEL_CORE
146.Tn Intel
147.Tn Core Solo
148and
149.Tn Core Duo
150CPUs, and other CPUs conforming to version 1 of the
151.Tn Intel
152performance measurement architecture.
153.It Li PMC_CPU_INTEL_CORE2
154.Tn Intel
155.Tn "Core2 Solo" ,
156.Tn "Core2 Duo"
157and
158.Tn "Core2 Extreme"
159CPUs, and other CPUs conforming to version 2 of the
160.Tn Intel
161performance measurement architecture.
162.It Li PMC_CPU_INTEL_P5
163.Tn Intel
164.Tn "Pentium"
165CPUs.
166.It Li PMC_CPU_INTEL_P6
167.Tn Intel
168.Tn "Pentium Pro"
169CPUs.
170.It Li PMC_CPU_INTEL_PII
171.Tn "Intel Pentium II"
172CPUs.
173.It Li PMC_CPU_INTEL_PIII
174.Tn "Intel Pentium III"
175CPUs.
176.It Li PMC_CPU_INTEL_PIV
177.Tn "Intel Pentium 4"
178CPUs.
179.It Li PMC_CPU_INTEL_PM
180.Tn "Intel Pentium M"
181CPUs.
182.El
183.Ss Supported PMCs
184PMC supported by this library are named by the
185.Vt enum pmc_class
186enumeration.
187Supported PMC kinds include:
188.Bl -tag -width "Li PMC_CLASS_IAF" -compact
189.It Li PMC_CLASS_IAF
190Fixed function hardware counters presents in CPUs conforming to the
191.Tn Intel
192performance measurement architecture version 2 and later.
193.It Li PMC_CLASS_IAP
194Programmable hardware counters present in CPUs conforming to the
195.Tn Intel
196performance measurement architecture version 1 and later.
197.It Li PMC_CLASS_K7
198Programmable hardware counters present in
199.Tn "AMD Athlon"
200CPUs.
201.It Li PMC_CLASS_K8
202Programmable hardware counters present in
203.Tn "AMD Athlon64"
204CPUs.
205.It Li PMC_CLASS_P4
206Programmable hardware counters present in
207.Tn "Intel Pentium 4"
208CPUs.
209.It Li PMC_CLASS_P5
210Programmable hardware counters present in
211.Tn Intel
212.Tn Pentium
213CPUs.
214.It Li PMC_CLASS_P6
215Programmable hardware counters present in
216.Tn Intel
217.Tn "Pentium Pro" ,
218.Tn "Pentium II" ,
219.Tn "Pentium III" ,
220.Tn "Celeron" ,
221and
222.Tn "Pentium M"
223CPUs.
224.It Li PMC_CLASS_TSC
225The timestamp counter on i386 and amd64 architecture CPUs.
226.El
227.Ss PMC Capabilities
228.Pp
229Capabilities of performance monitoring hardware are denoted using
230the
231.Vt "enum pmc_caps"
232enumeration.
233Supported capabilities include:
234.Bl -tag -width "Li PMC_CAP_INTERRUPT" -compact
235.It Li PMC_CAP_CASCADE
236The ability to cascade counters.
237.It Li PMC_CAP_EDGE
238The ability to count negated to asserted transitions of the hardware
239conditions being probed for.
240.It Li PMC_CAP_INTERRUPT
241The ability to interrupt the CPU.
242.It Li PMC_CAP_INVERT
243The ability to invert the sense of the hardware conditions being
244measured.
245.It Li PMC_CAP_PRECISE
246The ability to perform precise sampling.
247.It Li PMC_CAP_QUALIFIER
248The hardware allows monitored to be further qualified in some
249system dependent way.
250.It Li PMC_CAP_READ
251The ability to read from performance counters.
252.It Li PMC_CAP_SYSTEM
253The ability to restrict counting of hardware events to when the CPU is
254running privileged code.
255.It Li PMC_CAP_THRESHOLD
256The ability to ignore simultaneous hardware events below a
257programmable threshold.
258.It Li PMC_CAP_USER
259The ability to restrict counting of hardware events to those when the
260CPU is running unprivileged code.
261.It Li PMC_CAP_WRITE
262The ability to write to performance counters.
263.El
264.Ss CPU Naming Conventions
265CPUs are named using small integers from zero up to, but
266excluding, the value returned by function
267.Fn pmc_ncpu .
268On platforms supporting sparsely numbered CPUs not all the numbers in
269this range will denote valid CPUs.
270Operations on non-existent CPUs will return an error.
271.Ss Functional Grouping of the API
272This section contains a brief overview of the available functionality
273in the PMC library.
274Each function listed here is described further in its own manual page.
275.Bl -tag -width indent
276.It Administration
277.Bl -tag -compact
278.It Fn pmc_disable , Fn pmc_enable
279Administratively disable (enable) specific performance monitoring
280counter hardware.
281Counters that are disabled will not be available to applications to
282use.
283.El
284.It "Convenience Functions"
285.Bl -tag -compact
286.It Fn pmc_event_names_of_class
287Returns a list of event names supported by a given PMC type.
288.It Fn pmc_name_of_capability
289Convert a
290.Dv PMC_CAP_*
291flag to a human-readable string.
292.It Fn pmc_name_of_class
293Convert a
294.Dv PMC_CLASS_*
295constant to a human-readable string.
296.It Fn pmc_name_of_cputype
297Return a human-readable name for a CPU type.
298.It Fn pmc_name_of_disposition
299Return a human-readable string describing a PMC's disposition.
300.It Fn pmc_name_of_event
301Convert a numeric event code to a human-readable string.
302.It Fn pmc_name_of_mode
303Convert a
304.Dv PMC_MODE_*
305constant to a human-readable name.
306.It Fn pmc_name_of_state
307Return a human-readable string describing a PMC's current state.
308.El
309.It "Library Initialization"
310.Bl -tag -compact
311.It Fn pmc_init
312Initialize the library.
313This function must be called before any other library function.
314.El
315.It "Log File Handling"
316.Bl -tag -compact
317.It Fn pmc_configure_logfile
318Configure a log file for
319.Xr hwpmc 4
320to write logged events to.
321.It Fn pmc_flush_logfile
322Flush all pending log data in
323.Xr hwpmc 4 Ns Ap s
324buffers.
325.It Fn pmc_writelog
326Append arbitrary user data to the current log file.
327.El
328.It "PMC Management"
329.Bl -tag -compact
330.It Fn pmc_allocate , Fn pmc_release
331Allocate (free) a PMC.
332.It Fn pmc_attach , Fn pmc_detach
333Attach (detach) a process scope PMC to a target.
334.It Fn pmc_read , Fn pmc_write , Fn pmc_rw
335Read (write) a value from (to) a PMC.
336.It Fn pmc_start , Fn pmc_stop
337Start (stop) a software PMC.
338.It Fn pmc_set
339Set the reload value for a sampling PMC.
340.El
341.It "Queries"
342.Bl -tag -compact
343.It Fn pmc_capabilities
344Retrieve the capabilities for a given PMC.
345.It Fn pmc_cpuinfo
346Retrieve information about the CPUs and PMC hardware present in the
347system.
348.It Fn pmc_get_driver_stats
349Retrieve statistics maintained by
350.Xr hwpmc 4 .
351.It Fn pmc_ncpu
352Determine the greatest possible CPU number on the system.
353.It Fn pmc_npmc
354Return the number of hardware PMCs present in a given CPU.
355.It Fn pmc_pmcinfo
356Return information about the state of a given CPU's PMCs.
357.It Fn pmc_width
358Determine the width of a hardware counter in bits.
359.El
360.It "x86 Architecture Specific API"
361.Bl -tag -compact
362.It Fn pmc_get_msr
363Returns the processor model specific register number
364associated with
365.Fa pmc .
366Applications may then use the x86
367.Ic RDPMC
368instruction to directly read the contents of the PMC.
369.El
370.El
371.Ss Signal Handling Requirements
372Applications using PMCs are required to handle the following signals:
373.Bl -tag -width ".Dv SIGBUS"
374.It Dv SIGBUS
375When the
376.Xr hwpmc 4
377module is unloaded using
378.Xr kldunload 8 ,
379processes that have PMCs allocated to them will be sent a
380.Dv SIGBUS
381signal.
382.It Dv SIGIO
383The
384.Xr hwpmc 4
385driver will send a PMC owning process a
386.Dv SIGIO
387signal if:
388.Bl -bullet
389.It
390If any process-mode PMC allocated by it loses all its
391target processes.
392.It
393If the driver encounters an error when writing log data to a
394configured log file.
395This error may be retrieved by a subsequent call to
396.Fn pmc_flush_logfile .
397.El
398.El
399.Ss Typical Program Flow
400.Bl -enum
401.It
402An application would first invoke function
403.Fn pmc_init
404to allow the library to initialize itself.
405.It
406Signal handling would then be set up.
407.It
408Next the application would allocate the PMCs it desires using function
409.Fn pmc_allocate .
410.It
411Initial values for PMCs may be set using function
412.Fn pmc_set .
413.It
414If a log file is necessary for the PMCs to work, it would
415be configured using function
416.Fn pmc_configure_logfile .
417.It
418Process scope PMCs would then be attached to their target processes
419using function
420.Fn pmc_attach .
421.It
422The PMCs would then be started using function
423.Fn pmc_start .
424.It
425Once started, the values of counting PMCs may be read using function
426.Fn pmc_read .
427For PMCs that write events to the log file, this logged data would be
428read and parsed using the
429.Xr pmclog 3
430family of functions.
431.It
432PMCs are stopped using function
433.Fn pmc_stop ,
434and process scope PMCs are detached from their targets using
435function
436.Fn pmc_detach .
437.It
438Before the process exits, its may release its PMCs using function
439.Fn pmc_release .
440Any configured log file may be closed using function
441.Fn pmc_configure_logfile .
442.El
443.Sh EVENT SPECIFIERS
444Event specifiers are strings comprising of an event name, followed by
445optional parameters modifying the semantics of the hardware event
446being probed.
447Event names are PMC architecture dependent, but the PMC library defines
448machine independent aliases for commonly used events.
449.Pp
450Event specifiers spellings are case-insensitive and space characters,
451periods, underscores and hyphens are considered equivalent to each other.
452Thus the event specifiers
453.Qq "Example Event" ,
454.Qq "example-event" ,
455and
456.Qq "EXAMPLE_EVENT"
457are equivalent.
458.Ss PMC Architecture Dependent Events
459PMC architecture dependent event specifiers are described in the
460following manual pages:
461.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE "
462.It Em "PMC Class"      Ta Em "Manual Page"
463.It Li PMC_CLASS_IAF    Ta Xr pmc.iaf 3
464.It Li PMC_CLASS_IAP    Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3
465.It Li PMC_CLASS_K7     Ta Xr pmc.k7 3
466.It Li PMC_CLASS_K8     Ta Xr pmc.k8 3
467.It Li PMC_CLASS_P4     Ta Xr pmc.p4 3
468.It Li PMC_CLASS_P5     Ta Xr pmc.p5 3
469.It Li PMC_CLASS_P6     Ta Xr pmc.p6 3
470.It Li PMC_CLASS_TSC    Ta Xr pmc.tsc 3
471.El
472.Ss Event Name Aliases
473Event name aliases are PMC-independent names for commonly used events.
474The following aliases are known to this version of the
475.Nm pmc
476library:
477.Bl -tag -width indent
478.It Li branches
479Measure the number of branches retired.
480.It Li branch-mispredicts
481Measure the number of retired branches that were mispredicted.
482.It Li cycles
483Measure processor cycles.
484This event is implemented using the processor's Time Stamp Counter
485register.
486.It Li dc-misses
487Measure the number of data cache misses.
488.It Li ic-misses
489Measure the number of instruction cache misses.
490.It Li instructions
491Measure the number of instructions retired.
492.It Li interrupts
493Measure the number of interrupts seen.
494.It Li unhalted-cycles
495Measure the number of cycles the processor is not in a halted
496or sleep state.
497.El
498.Sh COMPATIBILITY
499The interface between the
500.Nm pmc
501library and the
502.Xr hwpmc 4
503driver is intended to be private to the implementation and may
504change.
505In order to ease forward compatibility with future versions of the
506.Xr hwpmc 4
507driver, applications are urged to dynamically link with the
508.Nm pmc
509library.
510.Pp
511The
512.Nm pmc
513API is
514.Ud
515.Sh SEE ALSO
516.Xr pmc.atom 3 ,
517.Xr pmc.core 3 ,
518.Xr pmc.core2 3 ,
519.Xr pmc.iaf 3 ,
520.Xr pmc.k7 3 ,
521.Xr pmc.k8 3 ,
522.Xr pmc.p4 3 ,
523.Xr pmc.p5 3 ,
524.Xr pmc.p6 3 ,
525.Xr pmc.tsc 3 ,
526.Xr pmclog 3 ,
527.Xr hwpmc 4 ,
528.Xr pmccontrol 8 ,
529.Xr pmcstat 8
530.Sh HISTORY
531The
532.Nm pmc
533library first appeared in
534.Fx 6.0 .
535.Sh AUTHORS
536The
537.Lb libpmc
538library was written by
539.An "Joseph Koshy"
540.Aq jkoshy@FreeBSD.org .
541