1.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved. 2.\" 3.\" Redistribution and use in source and binary forms, with or without 4.\" modification, are permitted provided that the following conditions 5.\" are met: 6.\" 1. Redistributions of source code must retain the above copyright 7.\" notice, this list of conditions and the following disclaimer. 8.\" 2. Redistributions in binary form must reproduce the above copyright 9.\" notice, this list of conditions and the following disclaimer in the 10.\" documentation and/or other materials provided with the distribution. 11.\" 12.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 13.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 14.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 15.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 16.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 17.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 18.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 19.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 20.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 21.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 22.\" SUCH DAMAGE. 23.\" 24.\" $FreeBSD$ 25.\" 26.Dd November 24, 2008 27.Dt PMC 3 28.Os 29.Sh NAME 30.Nm pmc 31.Nd library for accessing hardware performance monitoring counters 32.Sh LIBRARY 33.Lb libpmc 34.Sh SYNOPSIS 35.In pmc.h 36.Sh DESCRIPTION 37The 38.Lb libpmc 39provides a programming interface that allows applications to use 40hardware performance counters to gather performance data about 41specific processes or for the system as a whole. 42The library is implemented using the lower-level facilities offered by 43the 44.Xr hwpmc 4 45driver. 46.Ss Key Concepts 47Performance monitoring counters (PMCs) are represented by the library 48using a software abstraction. 49These 50.Dq abstract 51PMCs can have two scopes: 52.Bl -bullet 53.It 54System scope. 55These PMCs measure events in a whole-system manner, i.e., independent 56of the currently executing thread. 57System scope PMCs are allocated on specific CPUs and do not 58migrate between CPUs. 59Non-privileged process are allowed to allocate system scope PMCs if the 60.Xr hwpmc 4 61sysctl tunable: 62.Va security.bsd.unprivileged_syspmcs 63is non-zero. 64.It 65Process scope. 66These PMCs only measure hardware events when the processes they are 67attached to are executing on a CPU. 68In an SMP system, process scope PMCs migrate between CPUs along with 69their target processes. 70.El 71.Pp 72Orthogonal to PMC scope, PMCs may be allocated in one of two 73operational modes: 74.Bl -bullet 75.It 76Counting PMCs measure events according to their scope 77(system or process). 78The application needs to explicitly read these counters 79to retrieve their value. 80.It 81Sampling PMCs cause the CPU to be periodically interrupted 82and information about its state of execution to be collected. 83Sampling PMCs are used to profile specific processes and kernel 84threads or to profile the system as a whole. 85.El 86.Pp 87The scope and operational mode for a software PMC are specified at 88PMC allocation time. 89An application is allowed to allocate multiple PMCs subject 90to availability of hardware resources. 91.Pp 92The library uses human-readable strings to name the event being 93measured by hardware. 94The syntax used for specifying a hardware event along with additional 95event specific qualifiers (if any) is described in detail in section 96.Sx "EVENT SPECIFIERS" 97below. 98.Pp 99PMCs are associated with the process that allocated them and 100will be automatically reclaimed by the system when the process exits. 101Additionally, process-scope PMCs have to be attached to one or more 102target processes before they can perform measurements. 103A process-scope PMC may be attached to those target processes 104that its owner process would otherwise be permitted to debug. 105An owner process may attach PMCs to itself allowing 106it to measure its own behavior. 107Additionally, on some machine architectures, such self-attached PMCs 108may be read cheaply using specialized instructions supported by the 109processor. 110.Pp 111Certain kinds of PMCs require that a log file be configured before 112they may be started. 113These include: 114.Bl -bullet -compact 115.It 116System scope sampling PMCs. 117.It 118Process scope sampling PMCs. 119.It 120Process scope counting PMCs that have been configured to report PMC 121readings on process context switches or process exits. 122.El 123Up to one log file may be configured per owner process. 124Events logged to a log file may be subsequently analyzed using the 125.Xr pmclog 3 126family of functions. 127.Ss Supported CPUs 128The CPUs known to the PMC library are named by the 129.Vt "enum pmc_cputype" 130enumeration. 131Supported CPUs include: 132.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact 133.It Li PMC_CPU_AMD_K7 134.Tn "AMD Athlon" 135CPUs. 136.It Li PMC_CPU_AMD_K8 137.Tn "AMD Athlon64" 138CPUs. 139.It Li PMC_CPU_INTEL_ATOM 140.Tn Intel 141.Tn Atom 142CPUs and other CPUs conforming to version 3 of the 143.Tn Intel 144performance measurement architecture. 145.It Li PMC_CPU_INTEL_CORE 146.Tn Intel 147.Tn Core Solo 148and 149.Tn Core Duo 150CPUs, and other CPUs conforming to version 1 of the 151.Tn Intel 152performance measurement architecture. 153.It Li PMC_CPU_INTEL_CORE2 154.Tn Intel 155.Tn "Core2 Solo" , 156.Tn "Core2 Duo" 157and 158.Tn "Core2 Extreme" 159CPUs, and other CPUs conforming to version 2 of the 160.Tn Intel 161performance measurement architecture. 162.It Li PMC_CPU_INTEL_P5 163.Tn Intel 164.Tn "Pentium" 165CPUs. 166.It Li PMC_CPU_INTEL_P6 167.Tn Intel 168.Tn "Pentium Pro" 169CPUs. 170.It Li PMC_CPU_INTEL_PII 171.Tn "Intel Pentium II" 172CPUs. 173.It Li PMC_CPU_INTEL_PIII 174.Tn "Intel Pentium III" 175CPUs. 176.It Li PMC_CPU_INTEL_PIV 177.Tn "Intel Pentium 4" 178CPUs. 179.It Li PMC_CPU_INTEL_PM 180.Tn "Intel Pentium M" 181CPUs. 182.El 183.Ss Supported PMCs 184PMC supported by this library are named by the 185.Vt enum pmc_class 186enumeration. 187Supported PMC kinds include: 188.Bl -tag -width "Li PMC_CLASS_IAF" -compact 189.It Li PMC_CLASS_IAF 190Fixed function hardware counters presents in CPUs conforming to the 191.Tn Intel 192performance measurement architecture version 2 and later. 193.It Li PMC_CLASS_IAP 194Programmable hardware counters present in CPUs conforming to the 195.Tn Intel 196performance measurement architecture version 1 and later. 197.It Li PMC_CLASS_K7 198Programmable hardware counters present in 199.Tn "AMD Athlon" 200CPUs. 201.It Li PMC_CLASS_K8 202Programmable hardware counters present in 203.Tn "AMD Athlon64" 204CPUs. 205.It Li PMC_CLASS_P4 206Programmable hardware counters present in 207.Tn "Intel Pentium 4" 208CPUs. 209.It Li PMC_CLASS_P5 210Programmable hardware counters present in 211.Tn Intel 212.Tn Pentium 213CPUs. 214.It Li PMC_CLASS_P6 215Programmable hardware counters present in 216.Tn Intel 217.Tn "Pentium Pro" , 218.Tn "Pentium II" , 219.Tn "Pentium III" , 220.Tn "Celeron" , 221and 222.Tn "Pentium M" 223CPUs. 224.It Li PMC_CLASS_TSC 225The timestamp counter on i386 and amd64 architecture CPUs. 226.It Li PMC_CLASS_SOFT 227Software events. 228.El 229.Ss PMC Capabilities 230Capabilities of performance monitoring hardware are denoted using 231the 232.Vt "enum pmc_caps" 233enumeration. 234Supported capabilities include: 235.Bl -tag -width "Li PMC_CAP_INTERRUPT" -compact 236.It Li PMC_CAP_CASCADE 237The ability to cascade counters. 238.It Li PMC_CAP_EDGE 239The ability to count negated to asserted transitions of the hardware 240conditions being probed for. 241.It Li PMC_CAP_INTERRUPT 242The ability to interrupt the CPU. 243.It Li PMC_CAP_INVERT 244The ability to invert the sense of the hardware conditions being 245measured. 246.It Li PMC_CAP_PRECISE 247The ability to perform precise sampling. 248.It Li PMC_CAP_QUALIFIER 249The hardware allows monitored to be further qualified in some 250system dependent way. 251.It Li PMC_CAP_READ 252The ability to read from performance counters. 253.It Li PMC_CAP_SYSTEM 254The ability to restrict counting of hardware events to when the CPU is 255running privileged code. 256.It Li PMC_CAP_THRESHOLD 257The ability to ignore simultaneous hardware events below a 258programmable threshold. 259.It Li PMC_CAP_USER 260The ability to restrict counting of hardware events to those when the 261CPU is running unprivileged code. 262.It Li PMC_CAP_WRITE 263The ability to write to performance counters. 264.El 265.Ss CPU Naming Conventions 266CPUs are named using small integers from zero up to, but 267excluding, the value returned by function 268.Fn pmc_ncpu . 269On platforms supporting sparsely numbered CPUs not all the numbers in 270this range will denote valid CPUs. 271Operations on non-existent CPUs will return an error. 272.Ss Functional Grouping of the API 273This section contains a brief overview of the available functionality 274in the PMC library. 275Each function listed here is described further in its own manual page. 276.Bl -tag -width indent 277.It Administration 278.Bl -tag -compact 279.It Fn pmc_disable , Fn pmc_enable 280Administratively disable (enable) specific performance monitoring 281counter hardware. 282Counters that are disabled will not be available to applications to 283use. 284.El 285.It "Convenience Functions" 286.Bl -tag -compact 287.It Fn pmc_event_names_of_class 288Returns a list of event names supported by a given PMC type. 289.It Fn pmc_name_of_capability 290Convert a 291.Dv PMC_CAP_* 292flag to a human-readable string. 293.It Fn pmc_name_of_class 294Convert a 295.Dv PMC_CLASS_* 296constant to a human-readable string. 297.It Fn pmc_name_of_cputype 298Return a human-readable name for a CPU type. 299.It Fn pmc_name_of_disposition 300Return a human-readable string describing a PMC's disposition. 301.It Fn pmc_name_of_event 302Convert a numeric event code to a human-readable string. 303.It Fn pmc_name_of_mode 304Convert a 305.Dv PMC_MODE_* 306constant to a human-readable name. 307.It Fn pmc_name_of_state 308Return a human-readable string describing a PMC's current state. 309.El 310.It "Library Initialization" 311.Bl -tag -compact 312.It Fn pmc_init 313Initialize the library. 314This function must be called before any other library function. 315.El 316.It "Log File Handling" 317.Bl -tag -compact 318.It Fn pmc_configure_logfile 319Configure a log file for 320.Xr hwpmc 4 321to write logged events to. 322.It Fn pmc_flush_logfile 323Flush all pending log data in 324.Xr hwpmc 4 Ns Ap s 325buffers. 326.It Fn pmc_close_logfile 327Flush all pending log data and close 328.Xr hwpmc 4 Ns Ap s 329side of the stream. 330.It Fn pmc_writelog 331Append arbitrary user data to the current log file. 332.El 333.It "PMC Management" 334.Bl -tag -compact 335.It Fn pmc_allocate , Fn pmc_release 336Allocate (free) a PMC. 337.It Fn pmc_attach , Fn pmc_detach 338Attach (detach) a process scope PMC to a target. 339.It Fn pmc_read , Fn pmc_write , Fn pmc_rw 340Read (write) a value from (to) a PMC. 341.It Fn pmc_start , Fn pmc_stop 342Start (stop) a software PMC. 343.It Fn pmc_set 344Set the reload value for a sampling PMC. 345.El 346.It "Queries" 347.Bl -tag -compact 348.It Fn pmc_capabilities 349Retrieve the capabilities for a given PMC. 350.It Fn pmc_cpuinfo 351Retrieve information about the CPUs and PMC hardware present in the 352system. 353.It Fn pmc_get_driver_stats 354Retrieve statistics maintained by 355.Xr hwpmc 4 . 356.It Fn pmc_ncpu 357Determine the greatest possible CPU number on the system. 358.It Fn pmc_npmc 359Return the number of hardware PMCs present in a given CPU. 360.It Fn pmc_pmcinfo 361Return information about the state of a given CPU's PMCs. 362.It Fn pmc_width 363Determine the width of a hardware counter in bits. 364.El 365.It "x86 Architecture Specific API" 366.Bl -tag -compact 367.It Fn pmc_get_msr 368Returns the processor model specific register number 369associated with 370.Fa pmc . 371Applications may then use the x86 372.Ic RDPMC 373instruction to directly read the contents of the PMC. 374.El 375.El 376.Ss Signal Handling Requirements 377Applications using PMCs are required to handle the following signals: 378.Bl -tag -width ".Dv SIGBUS" 379.It Dv SIGBUS 380When the 381.Xr hwpmc 4 382module is unloaded using 383.Xr kldunload 8 , 384processes that have PMCs allocated to them will be sent a 385.Dv SIGBUS 386signal. 387.It Dv SIGIO 388The 389.Xr hwpmc 4 390driver will send a PMC owning process a 391.Dv SIGIO 392signal if: 393.Bl -bullet 394.It 395If any process-mode PMC allocated by it loses all its 396target processes. 397.It 398If the driver encounters an error when writing log data to a 399configured log file. 400This error may be retrieved by a subsequent call to 401.Fn pmc_flush_logfile . 402.El 403.El 404.Ss Typical Program Flow 405.Bl -enum 406.It 407An application would first invoke function 408.Fn pmc_init 409to allow the library to initialize itself. 410.It 411Signal handling would then be set up. 412.It 413Next the application would allocate the PMCs it desires using function 414.Fn pmc_allocate . 415.It 416Initial values for PMCs may be set using function 417.Fn pmc_set . 418.It 419If a log file is necessary for the PMCs to work, it would 420be configured using function 421.Fn pmc_configure_logfile . 422.It 423Process scope PMCs would then be attached to their target processes 424using function 425.Fn pmc_attach . 426.It 427The PMCs would then be started using function 428.Fn pmc_start . 429.It 430Once started, the values of counting PMCs may be read using function 431.Fn pmc_read . 432For PMCs that write events to the log file, this logged data would be 433read and parsed using the 434.Xr pmclog 3 435family of functions. 436.It 437PMCs are stopped using function 438.Fn pmc_stop , 439and process scope PMCs are detached from their targets using 440function 441.Fn pmc_detach . 442.It 443Before the process exits, its may release its PMCs using function 444.Fn pmc_release . 445Any configured log file may be closed using function 446.Fn pmc_configure_logfile . 447.El 448.Sh EVENT SPECIFIERS 449Event specifiers are strings comprising of an event name, followed by 450optional parameters modifying the semantics of the hardware event 451being probed. 452Event names are PMC architecture dependent, but the PMC library defines 453machine independent aliases for commonly used events. 454.Pp 455Event specifiers spellings are case-insensitive and space characters, 456periods, underscores and hyphens are considered equivalent to each other. 457Thus the event specifiers 458.Qq "Example Event" , 459.Qq "example-event" , 460and 461.Qq "EXAMPLE_EVENT" 462are equivalent. 463.Ss PMC Architecture Dependent Events 464PMC architecture dependent event specifiers are described in the 465following manual pages: 466.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE " 467.It Em "PMC Class" Ta Em "Manual Page" 468.It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3 469.It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3 470.It Li PMC_CLASS_K7 Ta Xr pmc.k7 3 471.It Li PMC_CLASS_K8 Ta Xr pmc.k8 3 472.It Li PMC_CLASS_P4 Ta Xr pmc.p4 3 473.It Li PMC_CLASS_P5 Ta Xr pmc.p5 3 474.It Li PMC_CLASS_P6 Ta Xr pmc.p6 3 475.It Li PMC_CLASS_TSC Ta Xr pmc.tsc 3 476.El 477.Ss Event Name Aliases 478Event name aliases are PMC-independent names for commonly used events. 479The following aliases are known to this version of the 480.Nm pmc 481library: 482.Bl -tag -width indent 483.It Li branches 484Measure the number of branches retired. 485.It Li branch-mispredicts 486Measure the number of retired branches that were mispredicted. 487.It Li cycles 488Measure processor cycles. 489This event is implemented using the processor's Time Stamp Counter 490register. 491.It Li dc-misses 492Measure the number of data cache misses. 493.It Li ic-misses 494Measure the number of instruction cache misses. 495.It Li instructions 496Measure the number of instructions retired. 497.It Li interrupts 498Measure the number of interrupts seen. 499.It Li unhalted-cycles 500Measure the number of cycles the processor is not in a halted 501or sleep state. 502.El 503.Sh COMPATIBILITY 504The interface between the 505.Nm pmc 506library and the 507.Xr hwpmc 4 508driver is intended to be private to the implementation and may 509change. 510In order to ease forward compatibility with future versions of the 511.Xr hwpmc 4 512driver, applications are urged to dynamically link with the 513.Nm pmc 514library. 515.Pp 516The 517.Nm pmc 518API is 519.Ud 520.Sh SEE ALSO 521.Xr pmc.atom 3 , 522.Xr pmc.core 3 , 523.Xr pmc.core2 3 , 524.Xr pmc.iaf 3 , 525.Xr pmc.k7 3 , 526.Xr pmc.k8 3 , 527.Xr pmc.p4 3 , 528.Xr pmc.p5 3 , 529.Xr pmc.p6 3 , 530.Xr pmc.soft 3 , 531.Xr pmc.tsc 3 , 532.Xr pmclog 3 , 533.Xr hwpmc 4 , 534.Xr pmccontrol 8 , 535.Xr pmcstat 8 536.Sh HISTORY 537The 538.Nm pmc 539library first appeared in 540.Fx 6.0 . 541.Sh AUTHORS 542The 543.Lb libpmc 544library was written by 545.An "Joseph Koshy" 546.Aq jkoshy@FreeBSD.org . 547