1# $FreeBSD$ 2 3CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/} 4 5CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins 6 7.PATH: ${CRTSRC}/${CRTARCH} 8.PATH: ${CRTSRC} 9 10SRCF+= absvdi2 11SRCF+= absvsi2 12SRCF+= absvti2 13SRCF+= addvdi3 14SRCF+= addvsi3 15SRCF+= addvti3 16SRCF+= apple_versioning 17SRCF+= ashldi3 18SRCF+= ashlti3 19SRCF+= ashrdi3 20SRCF+= ashrti3 21SRCF+= atomic 22SRCF+= bswapdi2 23SRCF+= bswapsi2 24SRCF+= clear_cache 25SRCF+= clzdi2 26SRCF+= clzsi2 27SRCF+= clzti2 28SRCF+= cmpdi2 29SRCF+= cmpti2 30SRCF+= ctzdi2 31SRCF+= ctzsi2 32SRCF+= ctzti2 33SRCF+= divdc3 34SRCF+= divdi3 35SRCF+= divmoddi4 36SRCF+= divmodsi4 37SRCF+= divsc3 38SRCF+= divsi3 39SRCF+= divtc3 40SRCF+= divti3 41SRCF+= divxc3 42SRCF+= enable_execute_stack 43SRCF+= eprintf 44SRCF+= extendhfsf2 45SRCF+= ffsdi2 46SRCF+= ffssi2 47SRCF+= ffsti2 48SRCF+= fixdfdi 49SRCF+= fixdfti 50SRCF+= fixsfdi 51SRCF+= fixsfti 52SRCF+= fixunsdfdi 53SRCF+= fixunsdfsi 54SRCF+= fixunsdfti 55SRCF+= fixunssfdi 56SRCF+= fixunssfsi 57SRCF+= fixunssfti 58SRCF+= fixunsxfdi 59SRCF+= fixunsxfsi 60SRCF+= fixunsxfti 61SRCF+= fixxfdi 62SRCF+= fixxfti 63SRCF+= floatditf 64SRCF+= floattidf 65SRCF+= floattisf 66SRCF+= floattixf 67SRCF+= floatunditf 68SRCF+= floatunsidf 69SRCF+= floatunsisf 70SRCF+= floatuntidf 71SRCF+= floatuntisf 72SRCF+= floatuntixf 73SRCF+= int_util 74SRCF+= lshrdi3 75SRCF+= lshrti3 76SRCF+= moddi3 77SRCF+= modsi3 78SRCF+= modti3 79SRCF+= muldc3 80SRCF+= muldi3 81SRCF+= mulodi4 82SRCF+= mulosi4 83SRCF+= muloti4 84SRCF+= mulsc3 85SRCF+= multc3 86SRCF+= multi3 87SRCF+= mulvdi3 88SRCF+= mulvsi3 89SRCF+= mulvti3 90SRCF+= mulxc3 91SRCF+= negdf2 92SRCF+= negdi2 93SRCF+= negsf2 94SRCF+= negti2 95SRCF+= negvdi2 96SRCF+= negvsi2 97SRCF+= negvti2 98SRCF+= paritydi2 99SRCF+= paritysi2 100SRCF+= parityti2 101SRCF+= popcountdi2 102SRCF+= popcountsi2 103SRCF+= popcountti2 104SRCF+= powidf2 105SRCF+= powisf2 106SRCF+= powitf2 107SRCF+= powixf2 108SRCF+= subvdi3 109SRCF+= subvsi3 110SRCF+= subvti3 111SRCF+= trampoline_setup 112SRCF+= truncdfhf2 113SRCF+= truncsfhf2 114SRCF+= ucmpdi2 115SRCF+= ucmpti2 116SRCF+= udivdi3 117SRCF+= udivmoddi4 118SRCF+= udivmodsi4 119SRCF+= udivmodti4 120SRCF+= udivsi3 121SRCF+= udivti3 122SRCF+= umoddi3 123SRCF+= umodsi3 124SRCF+= umodti3 125 126# Avoid using SSE2 instructions on i386, if unsupported. 127.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2) 128SRCS+= floatdidf.c 129SRCS+= floatdisf.c 130SRCS+= floatdixf.c 131SRCS+= floatundidf.c 132SRCS+= floatundisf.c 133SRCS+= floatundixf.c 134.else 135SRCF+= floatdidf 136SRCF+= floatdisf 137SRCF+= floatdixf 138SRCF+= floatundidf 139SRCF+= floatundisf 140SRCF+= floatundixf 141.endif 142 143# __cpu_model support, only used on x86 144.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 145SRCF+= cpu_model 146.endif 147 148# The fp_mode implementation for amd64 and i386 is shared, while other 149# architectures use the regular approach. 150.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 151SRCS+= i386/fp_mode.c 152.else 153SRCF+= fp_mode 154.endif 155 156# 157# 128-bit quad precision long double support, 158# only used on some architectures. 159# 160.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" 161SRCF+= addtf3 162SRCF+= comparetf2 163SRCF+= divtf3 164SRCF+= extenddftf2 165SRCF+= extendsftf2 166SRCF+= fixtfdi 167SRCF+= fixtfsi 168SRCF+= fixtfti 169SRCF+= fixunstfdi 170SRCF+= fixunstfsi 171SRCF+= fixunstfti 172SRCF+= floatsitf 173SRCF+= floattitf 174SRCF+= floatunsitf 175SRCF+= floatuntitf 176SRCF+= multf3 177SRCF+= subtf3 178SRCF+= trunctfdf2 179SRCF+= trunctfsf2 180.endif 181 182# These are already shipped by libc.a on some architectures. 183.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \ 184 ${MACHINE_CPUARCH} != "riscv" 185SRCF+= adddf3 186SRCF+= addsf3 187SRCF+= divdf3 188SRCF+= divsf3 189SRCF+= extendsfdf2 190SRCF+= fixdfsi 191SRCF+= fixsfsi 192SRCF+= floatsidf 193SRCF+= floatsisf 194SRCF+= muldf3 195SRCF+= mulsf3 196SRCF+= subdf3 197SRCF+= subsf3 198SRCF+= truncdfsf2 199.endif 200 201.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" 202SRCF+= comparedf2 203SRCF+= comparesf2 204.endif 205 206# FreeBSD-specific atomic intrinsics. 207.if ${MACHINE_CPUARCH} == "arm" 208.PATH: ${SRCTOP}/sys/arm/arm 209 210SRCF+= stdatomic 211CFLAGS+= -DEMIT_SYNC_ATOMICS 212.elif ${MACHINE_CPUARCH} == "mips" 213.PATH: ${SRCTOP}/sys/mips/mips 214 215SRCF+= stdatomic 216.endif 217 218.for file in ${SRCF} 219.if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \ 220 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S) 221SRCS+= ${file}vfp.S 222. elif exists(${CRTSRC}/${CRTARCH}/${file}.S) 223SRCS+= ${file}.S 224. else 225SRCS+= ${file}.c 226. endif 227.endfor 228 229.if ${MACHINE_CPUARCH} == "arm" 230SRCS+= aeabi_div0.c 231SRCS+= aeabi_idivmod.S 232SRCS+= aeabi_ldivmod.S 233SRCS+= aeabi_memcmp.S 234SRCS+= aeabi_memcpy.S 235SRCS+= aeabi_memmove.S 236SRCS+= aeabi_memset.S 237SRCS+= aeabi_uidivmod.S 238SRCS+= aeabi_uldivmod.S 239SRCS+= switch16.S 240SRCS+= switch32.S 241SRCS+= switch8.S 242SRCS+= switchu8.S 243SRCS+= sync_synchronize.S 244.endif 245 246.if ${MACHINE_ARCH:Mriscv*sf} 247CFLAGS+= -D__SOFT_FP__ 248.endif 249