1 2CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/:C/powerpc/ppc/} 3 4CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins 5 6.PATH: ${CRTSRC}/${CRTARCH} 7.PATH: ${CRTSRC} 8 9SRCF+= absvdi2 10SRCF+= absvsi2 11SRCF+= absvti2 12SRCF+= addvdi3 13SRCF+= addvsi3 14SRCF+= addvti3 15SRCF+= apple_versioning 16SRCF+= ashldi3 17SRCF+= ashlti3 18SRCF+= ashrdi3 19SRCF+= ashrti3 20SRCF+= bswapdi2 21SRCF+= bswapsi2 22SRCF+= clear_cache 23SRCF+= clzdi2 24SRCF+= clzsi2 25SRCF+= clzti2 26SRCF+= cmpdi2 27SRCF+= cmpti2 28SRCF+= ctzdi2 29SRCF+= ctzsi2 30SRCF+= ctzti2 31SRCF+= divdc3 32SRCF+= divdi3 33SRCF+= divmoddi4 34SRCF+= divmodsi4 35SRCF+= divmodti4 36SRCF+= divsc3 37SRCF+= divsi3 38SRCF+= divti3 39SRCF+= enable_execute_stack 40SRCF+= extendhfsf2 41SRCF+= ffsdi2 42SRCF+= ffssi2 43SRCF+= ffsti2 44SRCF+= fixdfdi 45SRCF+= fixdfti 46SRCF+= fixsfdi 47SRCF+= fixsfti 48SRCF+= fixunsdfdi 49SRCF+= fixunsdfsi 50SRCF+= fixunsdfti 51SRCF+= fixunssfdi 52SRCF+= fixunssfsi 53SRCF+= fixunssfti 54SRCF+= floattidf 55SRCF+= floattisf 56SRCF+= floatunsidf 57SRCF+= floatunsisf 58SRCF+= floatuntidf 59SRCF+= floatuntisf 60SRCF+= int_util 61SRCF+= lshrdi3 62SRCF+= lshrti3 63SRCF+= moddi3 64SRCF+= modsi3 65SRCF+= modti3 66SRCF+= muldc3 67SRCF+= muldi3 68SRCF+= mulodi4 69SRCF+= mulosi4 70SRCF+= muloti4 71SRCF+= mulsc3 72SRCF+= multi3 73SRCF+= mulvdi3 74SRCF+= mulvsi3 75SRCF+= mulvti3 76SRCF+= negdf2 77SRCF+= negdi2 78SRCF+= negsf2 79SRCF+= negti2 80SRCF+= negvdi2 81SRCF+= negvsi2 82SRCF+= negvti2 83SRCF+= paritydi2 84SRCF+= paritysi2 85SRCF+= parityti2 86SRCF+= popcountdi2 87SRCF+= popcountsi2 88SRCF+= popcountti2 89SRCF+= powidf2 90SRCF+= powisf2 91SRCF+= subvdi3 92SRCF+= subvsi3 93SRCF+= subvti3 94SRCF+= trampoline_setup 95SRCF+= truncdfhf2 96SRCF+= truncsfhf2 97SRCF+= ucmpdi2 98SRCF+= ucmpti2 99SRCF+= udivdi3 100SRCF+= udivmoddi4 101SRCF+= udivmodsi4 102SRCF+= udivmodti4 103SRCF+= udivsi3 104SRCF+= udivti3 105SRCF+= umoddi3 106SRCF+= umodsi3 107SRCF+= umodti3 108 109# Enable compiler-rt's atomic implementation only for clang, as it uses clang 110# specific builtins, and gcc packages usually come with their own libatomic. 111# Exclude arm which has its own implementations of atomic functions, below. 112.if "${COMPILER_TYPE}" == "clang" && ${MACHINE_CPUARCH} != "arm" 113SRCF+= atomic 114.endif 115 116# Avoid using SSE2 instructions on i386, if unsupported. 117.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2) 118SRCS+= floatdidf.c 119SRCS+= floatdisf.c 120SRCS+= floatundidf.c 121SRCS+= floatundisf.c 122.else 123SRCF+= floatdidf 124SRCF+= floatdisf 125SRCF+= floatundidf 126SRCF+= floatundisf 127.endif 128 129# 130# 80-bit long double functions, only used on x86. 131# 132.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 133SRCF+= divxc3 134SRCF+= extendxftf2 135SRCF+= fixxfdi 136SRCF+= fixxfti 137SRCF+= fixunsxfdi 138SRCF+= fixunsxfsi 139SRCF+= fixunsxfti 140SRCF+= floattixf 141SRCF+= floatuntixf 142SRCF+= mulxc3 143SRCF+= powixf2 144SRCF+= trunctfxf2 145 146# Avoid using SSE2 instructions on i386, if unsupported. 147.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2) 148SRCS+= floatdixf.c 149SRCS+= floatundixf.c 150.else 151SRCF+= floatdixf 152SRCF+= floatundixf 153.endif 154.endif 155 156# __cpu_model support, only used on aarch64 and x86 157.if ${MACHINE_CPUARCH} == "aarch64" 158SRCS+= cpu_model/aarch64.c 159.elif ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 160SRCS+= cpu_model/x86.c 161.endif 162 163# The fp_mode implementation for amd64 and i386 is shared, while other 164# architectures use the regular approach. 165.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 166SRCS+= i386/fp_mode.c 167.else 168SRCF+= fp_mode 169.endif 170 171# 172# 128-bit quad precision long double support, 173# only used on some architectures. 174# 175.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ 176 ${MACHINE_CPUARCH} == "riscv" 177SRCF+= addtf3 178SRCF+= comparetf2 179SRCF+= divtc3 180SRCF+= divtf3 181SRCF+= extenddftf2 182SRCF+= extendhftf2 183SRCF+= extendsftf2 184SRCF+= fixtfdi 185SRCF+= fixtfsi 186SRCF+= fixtfti 187SRCF+= fixunstfdi 188SRCF+= fixunstfsi 189SRCF+= fixunstfti 190SRCF+= floatditf 191SRCF+= floatsitf 192SRCF+= floattitf 193SRCF+= floatunditf 194SRCF+= floatunsitf 195SRCF+= floatuntitf 196SRCF+= multc3 197SRCF+= multf3 198SRCF+= powitf2 199SRCF+= subtf3 200SRCF+= trunctfdf2 201SRCF+= trunctfhf2 202SRCF+= trunctfsf2 203.endif 204 205# These are already shipped by libc.a on some architectures. 206.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "riscv" 207SRCF+= adddf3 208SRCF+= addsf3 209SRCF+= divdf3 210SRCF+= divsf3 211SRCF+= extendsfdf2 212SRCF+= fixdfsi 213SRCF+= fixsfsi 214SRCF+= floatsidf 215SRCF+= floatsisf 216SRCF+= muldf3 217SRCF+= mulsf3 218SRCF+= subdf3 219SRCF+= subsf3 220SRCF+= truncdfsf2 221.endif 222 223.if ${MACHINE_CPUARCH} != "arm" 224SRCF+= comparedf2 225SRCF+= comparesf2 226.endif 227 228# 229# bfloat16 support, only used on some architectures. 230# 231.if (${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ 232 ${MACHINE_CPUARCH} == "arm" || (${MACHINE_CPUARCH} == "i386" && \ 233 !empty(MACHINE_CPU:Msse2)) || ${MACHINE_CPUARCH} == "riscv") && \ 234 !(${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} < 130000) 235SRCF+= truncdfbf2 236SRCF+= truncsfbf2 237.endif 238 239# FreeBSD-specific atomic intrinsics. 240.if ${MACHINE_CPUARCH} == "arm" 241.PATH: ${SRCTOP}/sys/arm/arm 242 243SRCF+= stdatomic 244CFLAGS+= -DEMIT_SYNC_ATOMICS 245.endif 246 247.for file in ${SRCF} 248.if ${MACHINE_CPUARCH} == "arm" && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \ 249 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S) 250SRCS+= ${file}vfp.S 251. elif exists(${CRTSRC}/${CRTARCH}/${file}.S) 252SRCS+= ${file}.S 253. else 254SRCS+= ${file}.c 255. endif 256.endfor 257 258.if ${MACHINE_CPUARCH} == "arm" 259SRCS+= aeabi_div0.c 260SRCS+= aeabi_idivmod.S 261SRCS+= aeabi_ldivmod.S 262SRCS+= aeabi_memcmp.S 263SRCS+= aeabi_memcpy.S 264SRCS+= aeabi_memmove.S 265SRCS+= aeabi_memset.S 266SRCS+= aeabi_uidivmod.S 267SRCS+= aeabi_uldivmod.S 268SRCS+= switch16.S 269SRCS+= switch32.S 270SRCS+= switch8.S 271SRCS+= switchu8.S 272SRCS+= sync_synchronize.S 273.endif 274