xref: /freebsd/lib/libcompiler_rt/Makefile.inc (revision efe67f33c322265eb303ec0ab40275100795b22a)
1040b3049SEd Maste# $FreeBSD$
2040b3049SEd Maste
3040b3049SEd MasteCRTARCH=	${MACHINE_CPUARCH:C/amd64/x86_64/}
4040b3049SEd Maste
50b57cec5SDimitry AndricCRTSRC=		${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins
6040b3049SEd Maste
7040b3049SEd Maste.PATH:		${CRTSRC}/${CRTARCH}
8040b3049SEd Maste.PATH:		${CRTSRC}
9040b3049SEd Maste
10040b3049SEd MasteSRCF+=		absvdi2
11040b3049SEd MasteSRCF+=		absvsi2
12040b3049SEd MasteSRCF+=		absvti2
13040b3049SEd MasteSRCF+=		addvdi3
14040b3049SEd MasteSRCF+=		addvsi3
15040b3049SEd MasteSRCF+=		addvti3
16040b3049SEd MasteSRCF+=		apple_versioning
17040b3049SEd MasteSRCF+=		ashldi3
18040b3049SEd MasteSRCF+=		ashlti3
19040b3049SEd MasteSRCF+=		ashrdi3
20040b3049SEd MasteSRCF+=		ashrti3
2146c8c554SDimitry AndricSRCF+=		bswapdi2
2246c8c554SDimitry AndricSRCF+=		bswapsi2
23040b3049SEd MasteSRCF+=		clear_cache
24040b3049SEd MasteSRCF+=		clzdi2
25040b3049SEd MasteSRCF+=		clzsi2
26040b3049SEd MasteSRCF+=		clzti2
27040b3049SEd MasteSRCF+=		cmpdi2
28040b3049SEd MasteSRCF+=		cmpti2
29040b3049SEd MasteSRCF+=		ctzdi2
30040b3049SEd MasteSRCF+=		ctzsi2
31040b3049SEd MasteSRCF+=		ctzti2
32040b3049SEd MasteSRCF+=		divdc3
33040b3049SEd MasteSRCF+=		divdi3
34040b3049SEd MasteSRCF+=		divmoddi4
35040b3049SEd MasteSRCF+=		divmodsi4
36040b3049SEd MasteSRCF+=		divsc3
3704a91333SJohn BaldwinSRCF+=		divsi3
38040b3049SEd MasteSRCF+=		divtc3
39040b3049SEd MasteSRCF+=		divti3
40040b3049SEd MasteSRCF+=		divxc3
41040b3049SEd MasteSRCF+=		enable_execute_stack
42040b3049SEd MasteSRCF+=		eprintf
43040b3049SEd MasteSRCF+=		extendhfsf2
44040b3049SEd MasteSRCF+=		ffsdi2
45289fa303SDimitry AndricSRCF+=		ffssi2
46040b3049SEd MasteSRCF+=		ffsti2
47040b3049SEd MasteSRCF+=		fixdfdi
48040b3049SEd MasteSRCF+=		fixdfti
49040b3049SEd MasteSRCF+=		fixsfdi
50040b3049SEd MasteSRCF+=		fixsfti
51040b3049SEd MasteSRCF+=		fixunsdfdi
52040b3049SEd MasteSRCF+=		fixunsdfsi
53040b3049SEd MasteSRCF+=		fixunsdfti
54040b3049SEd MasteSRCF+=		fixunssfdi
55040b3049SEd MasteSRCF+=		fixunssfsi
56040b3049SEd MasteSRCF+=		fixunssfti
57040b3049SEd MasteSRCF+=		fixunsxfdi
58040b3049SEd MasteSRCF+=		fixunsxfsi
59040b3049SEd MasteSRCF+=		fixunsxfti
60040b3049SEd MasteSRCF+=		fixxfdi
61040b3049SEd MasteSRCF+=		fixxfti
62040b3049SEd MasteSRCF+=		floatditf
63040b3049SEd MasteSRCF+=		floattidf
64040b3049SEd MasteSRCF+=		floattisf
65040b3049SEd MasteSRCF+=		floattixf
66040b3049SEd MasteSRCF+=		floatunditf
67040b3049SEd MasteSRCF+=		floatunsidf
68040b3049SEd MasteSRCF+=		floatunsisf
69040b3049SEd MasteSRCF+=		floatuntidf
70040b3049SEd MasteSRCF+=		floatuntisf
71040b3049SEd MasteSRCF+=		floatuntixf
72040b3049SEd MasteSRCF+=		int_util
73040b3049SEd MasteSRCF+=		lshrdi3
74040b3049SEd MasteSRCF+=		lshrti3
75040b3049SEd MasteSRCF+=		moddi3
7604a91333SJohn BaldwinSRCF+=		modsi3
77040b3049SEd MasteSRCF+=		modti3
78040b3049SEd MasteSRCF+=		muldc3
79040b3049SEd MasteSRCF+=		muldi3
80040b3049SEd MasteSRCF+=		mulodi4
81040b3049SEd MasteSRCF+=		mulosi4
82040b3049SEd MasteSRCF+=		muloti4
83040b3049SEd MasteSRCF+=		mulsc3
848bc12a7eSDimitry AndricSRCF+=		multc3
85040b3049SEd MasteSRCF+=		multi3
86040b3049SEd MasteSRCF+=		mulvdi3
87040b3049SEd MasteSRCF+=		mulvsi3
88040b3049SEd MasteSRCF+=		mulvti3
89040b3049SEd MasteSRCF+=		mulxc3
90040b3049SEd MasteSRCF+=		negdf2
91040b3049SEd MasteSRCF+=		negdi2
92040b3049SEd MasteSRCF+=		negsf2
93040b3049SEd MasteSRCF+=		negti2
94040b3049SEd MasteSRCF+=		negvdi2
95040b3049SEd MasteSRCF+=		negvsi2
96040b3049SEd MasteSRCF+=		negvti2
97040b3049SEd MasteSRCF+=		paritydi2
98040b3049SEd MasteSRCF+=		paritysi2
99040b3049SEd MasteSRCF+=		parityti2
100040b3049SEd MasteSRCF+=		popcountdi2
101040b3049SEd MasteSRCF+=		popcountsi2
102040b3049SEd MasteSRCF+=		popcountti2
103040b3049SEd MasteSRCF+=		powidf2
104040b3049SEd MasteSRCF+=		powisf2
105040b3049SEd MasteSRCF+=		powitf2
106040b3049SEd MasteSRCF+=		powixf2
107040b3049SEd MasteSRCF+=		subvdi3
108040b3049SEd MasteSRCF+=		subvsi3
109040b3049SEd MasteSRCF+=		subvti3
110040b3049SEd MasteSRCF+=		trampoline_setup
111040b3049SEd MasteSRCF+=		truncdfhf2
112040b3049SEd MasteSRCF+=		truncsfhf2
113040b3049SEd MasteSRCF+=		ucmpdi2
114040b3049SEd MasteSRCF+=		ucmpti2
115040b3049SEd MasteSRCF+=		udivdi3
116040b3049SEd MasteSRCF+=		udivmoddi4
117040b3049SEd MasteSRCF+=		udivmodsi4
118040b3049SEd MasteSRCF+=		udivmodti4
11904a91333SJohn BaldwinSRCF+=		udivsi3
120040b3049SEd MasteSRCF+=		udivti3
121040b3049SEd MasteSRCF+=		umoddi3
12204a91333SJohn BaldwinSRCF+=		umodsi3
123040b3049SEd MasteSRCF+=		umodti3
124040b3049SEd Maste
125c90cb435SDimitry Andric# Enable compiler-rt's atomic implementation only for clang, as it uses clang
126c90cb435SDimitry Andric# specific builtins, and gcc packages usually come with their own libatomic.
12718ed63b8SDimitry Andric# Exclude arm which has its own implementations of atomic functions, below.
12818ed63b8SDimitry Andric.if "${COMPILER_TYPE}" == "clang" && ${MACHINE_CPUARCH} != "arm"
129c90cb435SDimitry AndricSRCF+=		atomic
130c90cb435SDimitry Andric.endif
131c90cb435SDimitry Andric
1322b12718bSDimitry Andric# Avoid using SSE2 instructions on i386, if unsupported.
1332b12718bSDimitry Andric.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2)
134e1ca2b88SDimitry AndricSRCS+=		floatdidf.c
135e1ca2b88SDimitry AndricSRCS+=		floatdisf.c
136e1ca2b88SDimitry AndricSRCS+=		floatdixf.c
137e1ca2b88SDimitry AndricSRCS+=		floatundidf.c
138e1ca2b88SDimitry AndricSRCS+=		floatundisf.c
139e1ca2b88SDimitry AndricSRCS+=		floatundixf.c
140e1ca2b88SDimitry Andric.else
141e1ca2b88SDimitry AndricSRCF+=		floatdidf
142e1ca2b88SDimitry AndricSRCF+=		floatdisf
143e1ca2b88SDimitry AndricSRCF+=		floatdixf
144e1ca2b88SDimitry AndricSRCF+=		floatundidf
145e1ca2b88SDimitry AndricSRCF+=		floatundisf
146e1ca2b88SDimitry AndricSRCF+=		floatundixf
147e1ca2b88SDimitry Andric.endif
148e1ca2b88SDimitry Andric
149*efe67f33SDimitry Andric# __cpu_model support, only used on aarch64 and x86
150*efe67f33SDimitry Andric.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \
151*efe67f33SDimitry Andric    ${MACHINE_CPUARCH} == "i386"
152335bcabeSEd MasteSRCF+=		cpu_model
153335bcabeSEd Maste.endif
154335bcabeSEd Maste
155a92579cfSDimitry Andric# The fp_mode implementation for amd64 and i386 is shared, while other
156a92579cfSDimitry Andric# architectures use the regular approach.
157a92579cfSDimitry Andric.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
158a92579cfSDimitry AndricSRCS+=		i386/fp_mode.c
159a92579cfSDimitry Andric.else
160a92579cfSDimitry AndricSRCF+=		fp_mode
161a92579cfSDimitry Andric.endif
162a92579cfSDimitry Andric
1632ad1d09fSRuslan Bukin#
1642ad1d09fSRuslan Bukin# 128-bit quad precision long double support,
1657804dd52SRuslan Bukin# only used on some architectures.
1662ad1d09fSRuslan Bukin#
1672ad1d09fSRuslan Bukin.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
168040b3049SEd MasteSRCF+=		addtf3
169040b3049SEd MasteSRCF+=		comparetf2
170040b3049SEd MasteSRCF+=		divtf3
171040b3049SEd MasteSRCF+=		extenddftf2
172040b3049SEd MasteSRCF+=		extendsftf2
173040b3049SEd MasteSRCF+=		fixtfdi
174040b3049SEd MasteSRCF+=		fixtfsi
175040b3049SEd MasteSRCF+=		fixtfti
176040b3049SEd MasteSRCF+=		fixunstfdi
177040b3049SEd MasteSRCF+=		fixunstfsi
178040b3049SEd MasteSRCF+=		fixunstfti
17991baa744SDimitry AndricSRCF+=		floatsitf
18091baa744SDimitry AndricSRCF+=		floattitf
181040b3049SEd MasteSRCF+=		floatunsitf
18291baa744SDimitry AndricSRCF+=		floatuntitf
183040b3049SEd MasteSRCF+=		multf3
184040b3049SEd MasteSRCF+=		subtf3
185040b3049SEd MasteSRCF+=		trunctfdf2
186040b3049SEd MasteSRCF+=		trunctfsf2
187040b3049SEd Maste.endif
188040b3049SEd Maste
1897804dd52SRuslan Bukin# These are already shipped by libc.a on some architectures.
1907804dd52SRuslan Bukin.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \
1917804dd52SRuslan Bukin    ${MACHINE_CPUARCH} != "riscv"
192040b3049SEd MasteSRCF+=		adddf3
193040b3049SEd MasteSRCF+=		addsf3
194040b3049SEd MasteSRCF+=		divdf3
195040b3049SEd MasteSRCF+=		divsf3
196040b3049SEd MasteSRCF+=		extendsfdf2
197040b3049SEd MasteSRCF+=		fixdfsi
198040b3049SEd MasteSRCF+=		fixsfsi
199040b3049SEd MasteSRCF+=		floatsidf
200040b3049SEd MasteSRCF+=		floatsisf
201040b3049SEd MasteSRCF+=		muldf3
202040b3049SEd MasteSRCF+=		mulsf3
203040b3049SEd MasteSRCF+=		subdf3
204040b3049SEd MasteSRCF+=		subsf3
205040b3049SEd MasteSRCF+=		truncdfsf2
206040b3049SEd Maste.endif
207040b3049SEd Maste
2080fd19f4aSWarner Losh.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips"
209040b3049SEd MasteSRCF+=		comparedf2
210040b3049SEd MasteSRCF+=		comparesf2
211040b3049SEd Maste.endif
212040b3049SEd Maste
213040b3049SEd Maste# FreeBSD-specific atomic intrinsics.
214b53a8df3SWarner Losh.if ${MACHINE_CPUARCH} == "arm"
215040b3049SEd Maste.PATH:		${SRCTOP}/sys/arm/arm
216040b3049SEd Maste
217040b3049SEd MasteSRCF+=		stdatomic
218040b3049SEd MasteCFLAGS+=	-DEMIT_SYNC_ATOMICS
219040b3049SEd Maste.elif ${MACHINE_CPUARCH} == "mips"
220040b3049SEd Maste.PATH:		${SRCTOP}/sys/mips/mips
221040b3049SEd Maste
222040b3049SEd MasteSRCF+=		stdatomic
223040b3049SEd Maste.endif
224040b3049SEd Maste
225040b3049SEd Maste.for file in ${SRCF}
2260b972ac9SWarner Losh.if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \
227040b3049SEd Maste    && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
228040b3049SEd MasteSRCS+=		${file}vfp.S
229040b3049SEd Maste. elif exists(${CRTSRC}/${CRTARCH}/${file}.S)
230040b3049SEd MasteSRCS+=		${file}.S
231040b3049SEd Maste. else
232040b3049SEd MasteSRCS+=		${file}.c
233040b3049SEd Maste. endif
234040b3049SEd Maste.endfor
235040b3049SEd Maste
236040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm"
237040b3049SEd MasteSRCS+=		aeabi_div0.c
238040b3049SEd MasteSRCS+=		aeabi_idivmod.S
239040b3049SEd MasteSRCS+=		aeabi_ldivmod.S
240040b3049SEd MasteSRCS+=		aeabi_memcmp.S
241040b3049SEd MasteSRCS+=		aeabi_memcpy.S
242040b3049SEd MasteSRCS+=		aeabi_memmove.S
243040b3049SEd MasteSRCS+=		aeabi_memset.S
244040b3049SEd MasteSRCS+=		aeabi_uidivmod.S
245040b3049SEd MasteSRCS+=		aeabi_uldivmod.S
246040b3049SEd MasteSRCS+=		switch16.S
247040b3049SEd MasteSRCS+=		switch32.S
248040b3049SEd MasteSRCS+=		switch8.S
249040b3049SEd MasteSRCS+=		switchu8.S
250040b3049SEd MasteSRCS+=		sync_synchronize.S
251040b3049SEd Maste.endif
25266ed7741SAdrian Chadd
2533487d668SJohn Baldwin.if ${MACHINE_ARCH:Mriscv*sf}
2543487d668SJohn BaldwinCFLAGS+=	-D__SOFT_FP__
2553487d668SJohn Baldwin.endif
256