xref: /freebsd/lib/libcompiler_rt/Makefile.inc (revision 6e75b2fbf9a03e6876e0a3c089e0b3ad71876125)
1040b3049SEd Maste# $FreeBSD$
2040b3049SEd Maste
3040b3049SEd MasteCRTARCH=	${MACHINE_CPUARCH:C/amd64/x86_64/}
4040b3049SEd Maste
50b57cec5SDimitry AndricCRTSRC=		${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins
6040b3049SEd Maste
7040b3049SEd Maste.PATH:		${CRTSRC}/${CRTARCH}
8040b3049SEd Maste.PATH:		${CRTSRC}
9040b3049SEd Maste
10040b3049SEd MasteSRCF+=		absvdi2
11040b3049SEd MasteSRCF+=		absvsi2
12040b3049SEd MasteSRCF+=		absvti2
13040b3049SEd MasteSRCF+=		addvdi3
14040b3049SEd MasteSRCF+=		addvsi3
15040b3049SEd MasteSRCF+=		addvti3
16040b3049SEd MasteSRCF+=		apple_versioning
17040b3049SEd MasteSRCF+=		ashldi3
18040b3049SEd MasteSRCF+=		ashlti3
19040b3049SEd MasteSRCF+=		ashrdi3
20040b3049SEd MasteSRCF+=		ashrti3
2146c8c554SDimitry AndricSRCF+=		bswapdi2
2246c8c554SDimitry AndricSRCF+=		bswapsi2
23040b3049SEd MasteSRCF+=		clear_cache
24040b3049SEd MasteSRCF+=		clzdi2
25040b3049SEd MasteSRCF+=		clzsi2
26040b3049SEd MasteSRCF+=		clzti2
27040b3049SEd MasteSRCF+=		cmpdi2
28040b3049SEd MasteSRCF+=		cmpti2
29040b3049SEd MasteSRCF+=		ctzdi2
30040b3049SEd MasteSRCF+=		ctzsi2
31040b3049SEd MasteSRCF+=		ctzti2
32040b3049SEd MasteSRCF+=		divdc3
33040b3049SEd MasteSRCF+=		divdi3
34040b3049SEd MasteSRCF+=		divmoddi4
35040b3049SEd MasteSRCF+=		divmodsi4
36*6e75b2fbSDimitry AndricSRCF+=		divmodti4
37040b3049SEd MasteSRCF+=		divsc3
3804a91333SJohn BaldwinSRCF+=		divsi3
39040b3049SEd MasteSRCF+=		divtc3
40040b3049SEd MasteSRCF+=		divti3
41040b3049SEd MasteSRCF+=		divxc3
42040b3049SEd MasteSRCF+=		enable_execute_stack
43040b3049SEd MasteSRCF+=		eprintf
44040b3049SEd MasteSRCF+=		extendhfsf2
45040b3049SEd MasteSRCF+=		ffsdi2
46289fa303SDimitry AndricSRCF+=		ffssi2
47040b3049SEd MasteSRCF+=		ffsti2
48040b3049SEd MasteSRCF+=		fixdfdi
49040b3049SEd MasteSRCF+=		fixdfti
50040b3049SEd MasteSRCF+=		fixsfdi
51040b3049SEd MasteSRCF+=		fixsfti
52040b3049SEd MasteSRCF+=		fixunsdfdi
53040b3049SEd MasteSRCF+=		fixunsdfsi
54040b3049SEd MasteSRCF+=		fixunsdfti
55040b3049SEd MasteSRCF+=		fixunssfdi
56040b3049SEd MasteSRCF+=		fixunssfsi
57040b3049SEd MasteSRCF+=		fixunssfti
58040b3049SEd MasteSRCF+=		fixunsxfdi
59040b3049SEd MasteSRCF+=		fixunsxfsi
60040b3049SEd MasteSRCF+=		fixunsxfti
61040b3049SEd MasteSRCF+=		fixxfdi
62040b3049SEd MasteSRCF+=		fixxfti
63040b3049SEd MasteSRCF+=		floatditf
64040b3049SEd MasteSRCF+=		floattidf
65040b3049SEd MasteSRCF+=		floattisf
66040b3049SEd MasteSRCF+=		floattixf
67040b3049SEd MasteSRCF+=		floatunditf
68040b3049SEd MasteSRCF+=		floatunsidf
69040b3049SEd MasteSRCF+=		floatunsisf
70040b3049SEd MasteSRCF+=		floatuntidf
71040b3049SEd MasteSRCF+=		floatuntisf
72040b3049SEd MasteSRCF+=		floatuntixf
73040b3049SEd MasteSRCF+=		int_util
74040b3049SEd MasteSRCF+=		lshrdi3
75040b3049SEd MasteSRCF+=		lshrti3
76040b3049SEd MasteSRCF+=		moddi3
7704a91333SJohn BaldwinSRCF+=		modsi3
78040b3049SEd MasteSRCF+=		modti3
79040b3049SEd MasteSRCF+=		muldc3
80040b3049SEd MasteSRCF+=		muldi3
81040b3049SEd MasteSRCF+=		mulodi4
82040b3049SEd MasteSRCF+=		mulosi4
83040b3049SEd MasteSRCF+=		muloti4
84040b3049SEd MasteSRCF+=		mulsc3
858bc12a7eSDimitry AndricSRCF+=		multc3
86040b3049SEd MasteSRCF+=		multi3
87040b3049SEd MasteSRCF+=		mulvdi3
88040b3049SEd MasteSRCF+=		mulvsi3
89040b3049SEd MasteSRCF+=		mulvti3
90040b3049SEd MasteSRCF+=		mulxc3
91040b3049SEd MasteSRCF+=		negdf2
92040b3049SEd MasteSRCF+=		negdi2
93040b3049SEd MasteSRCF+=		negsf2
94040b3049SEd MasteSRCF+=		negti2
95040b3049SEd MasteSRCF+=		negvdi2
96040b3049SEd MasteSRCF+=		negvsi2
97040b3049SEd MasteSRCF+=		negvti2
98040b3049SEd MasteSRCF+=		paritydi2
99040b3049SEd MasteSRCF+=		paritysi2
100040b3049SEd MasteSRCF+=		parityti2
101040b3049SEd MasteSRCF+=		popcountdi2
102040b3049SEd MasteSRCF+=		popcountsi2
103040b3049SEd MasteSRCF+=		popcountti2
104040b3049SEd MasteSRCF+=		powidf2
105040b3049SEd MasteSRCF+=		powisf2
106040b3049SEd MasteSRCF+=		powitf2
107040b3049SEd MasteSRCF+=		powixf2
108040b3049SEd MasteSRCF+=		subvdi3
109040b3049SEd MasteSRCF+=		subvsi3
110040b3049SEd MasteSRCF+=		subvti3
111040b3049SEd MasteSRCF+=		trampoline_setup
112040b3049SEd MasteSRCF+=		truncdfhf2
113040b3049SEd MasteSRCF+=		truncsfhf2
114040b3049SEd MasteSRCF+=		ucmpdi2
115040b3049SEd MasteSRCF+=		ucmpti2
116040b3049SEd MasteSRCF+=		udivdi3
117040b3049SEd MasteSRCF+=		udivmoddi4
118040b3049SEd MasteSRCF+=		udivmodsi4
119040b3049SEd MasteSRCF+=		udivmodti4
12004a91333SJohn BaldwinSRCF+=		udivsi3
121040b3049SEd MasteSRCF+=		udivti3
122040b3049SEd MasteSRCF+=		umoddi3
12304a91333SJohn BaldwinSRCF+=		umodsi3
124040b3049SEd MasteSRCF+=		umodti3
125040b3049SEd Maste
126c90cb435SDimitry Andric# Enable compiler-rt's atomic implementation only for clang, as it uses clang
127c90cb435SDimitry Andric# specific builtins, and gcc packages usually come with their own libatomic.
12818ed63b8SDimitry Andric# Exclude arm which has its own implementations of atomic functions, below.
12918ed63b8SDimitry Andric.if "${COMPILER_TYPE}" == "clang" && ${MACHINE_CPUARCH} != "arm"
130c90cb435SDimitry AndricSRCF+=		atomic
131c90cb435SDimitry Andric.endif
132c90cb435SDimitry Andric
1332b12718bSDimitry Andric# Avoid using SSE2 instructions on i386, if unsupported.
1342b12718bSDimitry Andric.if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2)
135e1ca2b88SDimitry AndricSRCS+=		floatdidf.c
136e1ca2b88SDimitry AndricSRCS+=		floatdisf.c
137e1ca2b88SDimitry AndricSRCS+=		floatdixf.c
138e1ca2b88SDimitry AndricSRCS+=		floatundidf.c
139e1ca2b88SDimitry AndricSRCS+=		floatundisf.c
140e1ca2b88SDimitry AndricSRCS+=		floatundixf.c
141e1ca2b88SDimitry Andric.else
142e1ca2b88SDimitry AndricSRCF+=		floatdidf
143e1ca2b88SDimitry AndricSRCF+=		floatdisf
144e1ca2b88SDimitry AndricSRCF+=		floatdixf
145e1ca2b88SDimitry AndricSRCF+=		floatundidf
146e1ca2b88SDimitry AndricSRCF+=		floatundisf
147e1ca2b88SDimitry AndricSRCF+=		floatundixf
148e1ca2b88SDimitry Andric.endif
149e1ca2b88SDimitry Andric
150efe67f33SDimitry Andric# __cpu_model support, only used on aarch64 and x86
151efe67f33SDimitry Andric.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \
152efe67f33SDimitry Andric    ${MACHINE_CPUARCH} == "i386"
153335bcabeSEd MasteSRCF+=		cpu_model
154335bcabeSEd Maste.endif
155335bcabeSEd Maste
156a92579cfSDimitry Andric# The fp_mode implementation for amd64 and i386 is shared, while other
157a92579cfSDimitry Andric# architectures use the regular approach.
158a92579cfSDimitry Andric.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
159a92579cfSDimitry AndricSRCS+=		i386/fp_mode.c
160a92579cfSDimitry Andric.else
161a92579cfSDimitry AndricSRCF+=		fp_mode
162a92579cfSDimitry Andric.endif
163a92579cfSDimitry Andric
1642ad1d09fSRuslan Bukin#
1652ad1d09fSRuslan Bukin# 128-bit quad precision long double support,
1667804dd52SRuslan Bukin# only used on some architectures.
1672ad1d09fSRuslan Bukin#
1682ad1d09fSRuslan Bukin.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
169040b3049SEd MasteSRCF+=		addtf3
170040b3049SEd MasteSRCF+=		comparetf2
171040b3049SEd MasteSRCF+=		divtf3
172040b3049SEd MasteSRCF+=		extenddftf2
173*6e75b2fbSDimitry AndricSRCF+=		extendhftf2
174040b3049SEd MasteSRCF+=		extendsftf2
175040b3049SEd MasteSRCF+=		fixtfdi
176040b3049SEd MasteSRCF+=		fixtfsi
177040b3049SEd MasteSRCF+=		fixtfti
178040b3049SEd MasteSRCF+=		fixunstfdi
179040b3049SEd MasteSRCF+=		fixunstfsi
180040b3049SEd MasteSRCF+=		fixunstfti
18191baa744SDimitry AndricSRCF+=		floatsitf
18291baa744SDimitry AndricSRCF+=		floattitf
183040b3049SEd MasteSRCF+=		floatunsitf
18491baa744SDimitry AndricSRCF+=		floatuntitf
185040b3049SEd MasteSRCF+=		multf3
186040b3049SEd MasteSRCF+=		subtf3
187040b3049SEd MasteSRCF+=		trunctfdf2
188*6e75b2fbSDimitry AndricSRCF+=		trunctfhf2
189040b3049SEd MasteSRCF+=		trunctfsf2
190040b3049SEd Maste.endif
191040b3049SEd Maste
1927804dd52SRuslan Bukin# These are already shipped by libc.a on some architectures.
1937804dd52SRuslan Bukin.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \
1947804dd52SRuslan Bukin    ${MACHINE_CPUARCH} != "riscv"
195040b3049SEd MasteSRCF+=		adddf3
196040b3049SEd MasteSRCF+=		addsf3
197040b3049SEd MasteSRCF+=		divdf3
198040b3049SEd MasteSRCF+=		divsf3
199040b3049SEd MasteSRCF+=		extendsfdf2
200040b3049SEd MasteSRCF+=		fixdfsi
201040b3049SEd MasteSRCF+=		fixsfsi
202040b3049SEd MasteSRCF+=		floatsidf
203040b3049SEd MasteSRCF+=		floatsisf
204040b3049SEd MasteSRCF+=		muldf3
205040b3049SEd MasteSRCF+=		mulsf3
206040b3049SEd MasteSRCF+=		subdf3
207040b3049SEd MasteSRCF+=		subsf3
208040b3049SEd MasteSRCF+=		truncdfsf2
209040b3049SEd Maste.endif
210040b3049SEd Maste
2110fd19f4aSWarner Losh.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips"
212040b3049SEd MasteSRCF+=		comparedf2
213040b3049SEd MasteSRCF+=		comparesf2
214040b3049SEd Maste.endif
215040b3049SEd Maste
216040b3049SEd Maste# FreeBSD-specific atomic intrinsics.
217b53a8df3SWarner Losh.if ${MACHINE_CPUARCH} == "arm"
218040b3049SEd Maste.PATH:		${SRCTOP}/sys/arm/arm
219040b3049SEd Maste
220040b3049SEd MasteSRCF+=		stdatomic
221040b3049SEd MasteCFLAGS+=	-DEMIT_SYNC_ATOMICS
222040b3049SEd Maste.elif ${MACHINE_CPUARCH} == "mips"
223040b3049SEd Maste.PATH:		${SRCTOP}/sys/mips/mips
224040b3049SEd Maste
225040b3049SEd MasteSRCF+=		stdatomic
226040b3049SEd Maste.endif
227040b3049SEd Maste
228040b3049SEd Maste.for file in ${SRCF}
2290b972ac9SWarner Losh.if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \
230040b3049SEd Maste    && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
231040b3049SEd MasteSRCS+=		${file}vfp.S
232040b3049SEd Maste. elif exists(${CRTSRC}/${CRTARCH}/${file}.S)
233040b3049SEd MasteSRCS+=		${file}.S
234040b3049SEd Maste. else
235040b3049SEd MasteSRCS+=		${file}.c
236040b3049SEd Maste. endif
237040b3049SEd Maste.endfor
238040b3049SEd Maste
239040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm"
240040b3049SEd MasteSRCS+=		aeabi_div0.c
241040b3049SEd MasteSRCS+=		aeabi_idivmod.S
242040b3049SEd MasteSRCS+=		aeabi_ldivmod.S
243040b3049SEd MasteSRCS+=		aeabi_memcmp.S
244040b3049SEd MasteSRCS+=		aeabi_memcpy.S
245040b3049SEd MasteSRCS+=		aeabi_memmove.S
246040b3049SEd MasteSRCS+=		aeabi_memset.S
247040b3049SEd MasteSRCS+=		aeabi_uidivmod.S
248040b3049SEd MasteSRCS+=		aeabi_uldivmod.S
249040b3049SEd MasteSRCS+=		switch16.S
250040b3049SEd MasteSRCS+=		switch32.S
251040b3049SEd MasteSRCS+=		switch8.S
252040b3049SEd MasteSRCS+=		switchu8.S
253040b3049SEd MasteSRCS+=		sync_synchronize.S
254040b3049SEd Maste.endif
25566ed7741SAdrian Chadd
2563487d668SJohn Baldwin.if ${MACHINE_ARCH:Mriscv*sf}
2573487d668SJohn BaldwinCFLAGS+=	-D__SOFT_FP__
2583487d668SJohn Baldwin.endif
259