1040b3049SEd Maste# $FreeBSD$ 2040b3049SEd Maste 3040b3049SEd MasteCRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/} 4040b3049SEd Maste 5040b3049SEd MasteCRTSRC= ${SRCTOP}/contrib/compiler-rt/lib/builtins 6040b3049SEd Maste 7040b3049SEd Maste.PATH: ${CRTSRC}/${CRTARCH} 8040b3049SEd Maste.PATH: ${CRTSRC} 9040b3049SEd Maste 10040b3049SEd MasteSRCF+= absvdi2 11040b3049SEd MasteSRCF+= absvsi2 12040b3049SEd MasteSRCF+= absvti2 13040b3049SEd MasteSRCF+= addvdi3 14040b3049SEd MasteSRCF+= addvsi3 15040b3049SEd MasteSRCF+= addvti3 16040b3049SEd MasteSRCF+= apple_versioning 17040b3049SEd MasteSRCF+= ashldi3 18040b3049SEd MasteSRCF+= ashlti3 19040b3049SEd MasteSRCF+= ashrdi3 20040b3049SEd MasteSRCF+= ashrti3 21040b3049SEd MasteSRCF+= clear_cache 22040b3049SEd MasteSRCF+= clzdi2 23040b3049SEd MasteSRCF+= clzsi2 24040b3049SEd MasteSRCF+= clzti2 25040b3049SEd MasteSRCF+= cmpdi2 26040b3049SEd MasteSRCF+= cmpti2 27040b3049SEd MasteSRCF+= ctzdi2 28040b3049SEd MasteSRCF+= ctzsi2 29040b3049SEd MasteSRCF+= ctzti2 30040b3049SEd MasteSRCF+= divdc3 31040b3049SEd MasteSRCF+= divdi3 32040b3049SEd MasteSRCF+= divmoddi4 33040b3049SEd MasteSRCF+= divmodsi4 34040b3049SEd MasteSRCF+= divsc3 35040b3049SEd MasteSRCF+= divtc3 36040b3049SEd MasteSRCF+= divti3 37040b3049SEd MasteSRCF+= divxc3 38040b3049SEd MasteSRCF+= enable_execute_stack 39040b3049SEd MasteSRCF+= eprintf 40040b3049SEd MasteSRCF+= extendhfsf2 41040b3049SEd MasteSRCF+= ffsdi2 42040b3049SEd MasteSRCF+= ffsti2 43040b3049SEd MasteSRCF+= fixdfdi 44040b3049SEd MasteSRCF+= fixdfti 45040b3049SEd MasteSRCF+= fixsfdi 46040b3049SEd MasteSRCF+= fixsfti 47040b3049SEd MasteSRCF+= fixunsdfdi 48040b3049SEd MasteSRCF+= fixunsdfsi 49040b3049SEd MasteSRCF+= fixunsdfti 50040b3049SEd MasteSRCF+= fixunssfdi 51040b3049SEd MasteSRCF+= fixunssfsi 52040b3049SEd MasteSRCF+= fixunssfti 53040b3049SEd MasteSRCF+= fixunsxfdi 54040b3049SEd MasteSRCF+= fixunsxfsi 55040b3049SEd MasteSRCF+= fixunsxfti 56040b3049SEd MasteSRCF+= fixxfdi 57040b3049SEd MasteSRCF+= fixxfti 58040b3049SEd MasteSRCF+= floatdidf 59040b3049SEd MasteSRCF+= floatdisf 60040b3049SEd MasteSRCF+= floatditf 61040b3049SEd MasteSRCF+= floatdixf 62040b3049SEd MasteSRCF+= floatsitf 63040b3049SEd MasteSRCF+= floattidf 64040b3049SEd MasteSRCF+= floattisf 65040b3049SEd MasteSRCF+= floattixf 66040b3049SEd MasteSRCF+= floatundidf 67040b3049SEd MasteSRCF+= floatundisf 68040b3049SEd MasteSRCF+= floatunditf 69040b3049SEd MasteSRCF+= floatundixf 70040b3049SEd MasteSRCF+= floatunsidf 71040b3049SEd MasteSRCF+= floatunsisf 72040b3049SEd MasteSRCF+= floatuntidf 73040b3049SEd MasteSRCF+= floatuntisf 74040b3049SEd MasteSRCF+= floatuntixf 75040b3049SEd MasteSRCF+= gcc_personality_v0 76040b3049SEd MasteSRCF+= int_util 77040b3049SEd MasteSRCF+= lshrdi3 78040b3049SEd MasteSRCF+= lshrti3 79040b3049SEd MasteSRCF+= moddi3 80040b3049SEd MasteSRCF+= modti3 81040b3049SEd MasteSRCF+= muldc3 82040b3049SEd MasteSRCF+= muldi3 83040b3049SEd MasteSRCF+= mulodi4 84040b3049SEd MasteSRCF+= mulosi4 85040b3049SEd MasteSRCF+= muloti4 86040b3049SEd MasteSRCF+= mulsc3 87040b3049SEd MasteSRCF+= multi3 88040b3049SEd MasteSRCF+= mulvdi3 89040b3049SEd MasteSRCF+= mulvsi3 90040b3049SEd MasteSRCF+= mulvti3 91040b3049SEd MasteSRCF+= multc3 92040b3049SEd MasteSRCF+= mulxc3 93040b3049SEd MasteSRCF+= negdf2 94040b3049SEd MasteSRCF+= negdi2 95040b3049SEd MasteSRCF+= negsf2 96040b3049SEd MasteSRCF+= negti2 97040b3049SEd MasteSRCF+= negvdi2 98040b3049SEd MasteSRCF+= negvsi2 99040b3049SEd MasteSRCF+= negvti2 100040b3049SEd MasteSRCF+= paritydi2 101040b3049SEd MasteSRCF+= paritysi2 102040b3049SEd MasteSRCF+= parityti2 103040b3049SEd MasteSRCF+= popcountdi2 104040b3049SEd MasteSRCF+= popcountsi2 105040b3049SEd MasteSRCF+= popcountti2 106040b3049SEd MasteSRCF+= powidf2 107040b3049SEd MasteSRCF+= powisf2 108040b3049SEd MasteSRCF+= powitf2 109040b3049SEd MasteSRCF+= powixf2 110040b3049SEd MasteSRCF+= subvdi3 111040b3049SEd MasteSRCF+= subvsi3 112040b3049SEd MasteSRCF+= subvti3 113040b3049SEd MasteSRCF+= trampoline_setup 114040b3049SEd MasteSRCF+= truncdfhf2 115040b3049SEd MasteSRCF+= truncsfhf2 116040b3049SEd MasteSRCF+= ucmpdi2 117040b3049SEd MasteSRCF+= ucmpti2 118040b3049SEd MasteSRCF+= udivdi3 119040b3049SEd MasteSRCF+= udivmoddi4 120040b3049SEd MasteSRCF+= udivmodsi4 121040b3049SEd MasteSRCF+= udivmodti4 122040b3049SEd MasteSRCF+= udivti3 123040b3049SEd MasteSRCF+= umoddi3 124040b3049SEd MasteSRCF+= umodti3 125040b3049SEd Maste 126*335bcabeSEd Maste# __cpu_model support, only used on x86 127*335bcabeSEd Maste.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" 128*335bcabeSEd MasteSRCF+= cpu_model 129*335bcabeSEd Maste.endif 130*335bcabeSEd Maste 131040b3049SEd Maste# 128-bit quad precision long double support, only used on arm64 132040b3049SEd Maste.if ${MACHINE_CPUARCH} == "aarch64" 133040b3049SEd MasteSRCF+= addtf3 134040b3049SEd MasteSRCF+= comparetf2 135040b3049SEd MasteSRCF+= divtf3 136040b3049SEd MasteSRCF+= extenddftf2 137040b3049SEd MasteSRCF+= extendsftf2 138040b3049SEd MasteSRCF+= fixtfdi 139040b3049SEd MasteSRCF+= fixtfsi 140040b3049SEd MasteSRCF+= fixtfti 141040b3049SEd MasteSRCF+= fixunstfdi 142040b3049SEd MasteSRCF+= fixunstfsi 143040b3049SEd MasteSRCF+= fixunstfti 144040b3049SEd MasteSRCF+= floatunsitf 145040b3049SEd MasteSRCF+= multf3 146040b3049SEd MasteSRCF+= subtf3 147040b3049SEd MasteSRCF+= trunctfdf2 148040b3049SEd MasteSRCF+= trunctfsf2 149040b3049SEd Maste.endif 150040b3049SEd Maste 151040b3049SEd Maste# These are already shipped by libc.a on arm and mips 152040b3049SEd Maste.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" 153040b3049SEd MasteSRCF+= adddf3 154040b3049SEd MasteSRCF+= addsf3 155040b3049SEd MasteSRCF+= divdf3 156040b3049SEd MasteSRCF+= divsf3 157040b3049SEd MasteSRCF+= extendsfdf2 158040b3049SEd MasteSRCF+= fixdfsi 159040b3049SEd MasteSRCF+= fixsfsi 160040b3049SEd MasteSRCF+= floatsidf 161040b3049SEd MasteSRCF+= floatsisf 162040b3049SEd MasteSRCF+= muldf3 163040b3049SEd MasteSRCF+= mulsf3 164040b3049SEd MasteSRCF+= subdf3 165040b3049SEd MasteSRCF+= subsf3 166040b3049SEd MasteSRCF+= truncdfsf2 167040b3049SEd Maste.endif 168040b3049SEd Maste 169040b3049SEd Maste.if ${MACHINE_CPUARCH} != "arm" 170040b3049SEd MasteSRCF+= comparedf2 171040b3049SEd MasteSRCF+= comparesf2 172040b3049SEd Maste.endif 173040b3049SEd Maste 174040b3049SEd Maste.if ${MACHINE_CPUARCH} != "mips" 175040b3049SEd MasteSRCF+= divsi3 176040b3049SEd MasteSRCF+= modsi3 177040b3049SEd MasteSRCF+= udivsi3 178040b3049SEd MasteSRCF+= umodsi3 179040b3049SEd Maste.endif 180040b3049SEd Maste 181040b3049SEd Maste# FreeBSD-specific atomic intrinsics. 182040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "armv6" 183040b3049SEd Maste.PATH: ${SRCTOP}/sys/arm/arm 184040b3049SEd Maste 185040b3049SEd MasteSRCF+= stdatomic 186040b3049SEd MasteCFLAGS+= -DEMIT_SYNC_ATOMICS 187040b3049SEd Maste.elif ${MACHINE_CPUARCH} == "mips" 188040b3049SEd Maste.PATH: ${SRCTOP}/sys/mips/mips 189040b3049SEd Maste 190040b3049SEd MasteSRCF+= stdatomic 191040b3049SEd Maste.endif 192040b3049SEd Maste 193040b3049SEd Maste.for file in ${SRCF} 194040b3049SEd Maste.if ${MACHINE_ARCH:Marmv6*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \ 195040b3049SEd Maste && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S) 196040b3049SEd MasteSRCS+= ${file}vfp.S 197040b3049SEd Maste. elif exists(${CRTSRC}/${CRTARCH}/${file}.S) 198040b3049SEd MasteSRCS+= ${file}.S 199040b3049SEd Maste. else 200040b3049SEd MasteSRCS+= ${file}.c 201040b3049SEd Maste. endif 202040b3049SEd Maste.endfor 203040b3049SEd Maste 204040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm" 205040b3049SEd MasteSRCS+= aeabi_div0.c 206040b3049SEd MasteSRCS+= aeabi_idivmod.S 207040b3049SEd MasteSRCS+= aeabi_ldivmod.S 208040b3049SEd MasteSRCS+= aeabi_memcmp.S 209040b3049SEd MasteSRCS+= aeabi_memcpy.S 210040b3049SEd MasteSRCS+= aeabi_memmove.S 211040b3049SEd MasteSRCS+= aeabi_memset.S 212040b3049SEd MasteSRCS+= aeabi_uidivmod.S 213040b3049SEd MasteSRCS+= aeabi_uldivmod.S 214040b3049SEd MasteSRCS+= bswapdi2.S 215040b3049SEd MasteSRCS+= bswapsi2.S 216040b3049SEd MasteSRCS+= switch16.S 217040b3049SEd MasteSRCS+= switch32.S 218040b3049SEd MasteSRCS+= switch8.S 219040b3049SEd MasteSRCS+= switchu8.S 220040b3049SEd MasteSRCS+= sync_synchronize.S 221040b3049SEd Maste.endif 222