1*040b3049SEd Maste# $FreeBSD$ 2*040b3049SEd Maste 3*040b3049SEd MasteCRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/} 4*040b3049SEd Maste 5*040b3049SEd MasteCRTSRC= ${SRCTOP}/contrib/compiler-rt/lib/builtins 6*040b3049SEd Maste 7*040b3049SEd Maste.PATH: ${CRTSRC}/${CRTARCH} 8*040b3049SEd Maste.PATH: ${CRTSRC} 9*040b3049SEd Maste 10*040b3049SEd MasteSRCF+= absvdi2 11*040b3049SEd MasteSRCF+= absvsi2 12*040b3049SEd MasteSRCF+= absvti2 13*040b3049SEd MasteSRCF+= addvdi3 14*040b3049SEd MasteSRCF+= addvsi3 15*040b3049SEd MasteSRCF+= addvti3 16*040b3049SEd MasteSRCF+= apple_versioning 17*040b3049SEd MasteSRCF+= ashldi3 18*040b3049SEd MasteSRCF+= ashlti3 19*040b3049SEd MasteSRCF+= ashrdi3 20*040b3049SEd MasteSRCF+= ashrti3 21*040b3049SEd MasteSRCF+= clear_cache 22*040b3049SEd MasteSRCF+= clzdi2 23*040b3049SEd MasteSRCF+= clzsi2 24*040b3049SEd MasteSRCF+= clzti2 25*040b3049SEd MasteSRCF+= cmpdi2 26*040b3049SEd MasteSRCF+= cmpti2 27*040b3049SEd MasteSRCF+= ctzdi2 28*040b3049SEd MasteSRCF+= ctzsi2 29*040b3049SEd MasteSRCF+= ctzti2 30*040b3049SEd MasteSRCF+= divdc3 31*040b3049SEd MasteSRCF+= divdi3 32*040b3049SEd MasteSRCF+= divmoddi4 33*040b3049SEd MasteSRCF+= divmodsi4 34*040b3049SEd MasteSRCF+= divsc3 35*040b3049SEd MasteSRCF+= divtc3 36*040b3049SEd MasteSRCF+= divti3 37*040b3049SEd MasteSRCF+= divxc3 38*040b3049SEd MasteSRCF+= enable_execute_stack 39*040b3049SEd MasteSRCF+= eprintf 40*040b3049SEd MasteSRCF+= extendhfsf2 41*040b3049SEd MasteSRCF+= ffsdi2 42*040b3049SEd MasteSRCF+= ffsti2 43*040b3049SEd MasteSRCF+= fixdfdi 44*040b3049SEd MasteSRCF+= fixdfti 45*040b3049SEd MasteSRCF+= fixsfdi 46*040b3049SEd MasteSRCF+= fixsfti 47*040b3049SEd MasteSRCF+= fixunsdfdi 48*040b3049SEd MasteSRCF+= fixunsdfsi 49*040b3049SEd MasteSRCF+= fixunsdfti 50*040b3049SEd MasteSRCF+= fixunssfdi 51*040b3049SEd MasteSRCF+= fixunssfsi 52*040b3049SEd MasteSRCF+= fixunssfti 53*040b3049SEd MasteSRCF+= fixunsxfdi 54*040b3049SEd MasteSRCF+= fixunsxfsi 55*040b3049SEd MasteSRCF+= fixunsxfti 56*040b3049SEd MasteSRCF+= fixxfdi 57*040b3049SEd MasteSRCF+= fixxfti 58*040b3049SEd MasteSRCF+= floatdidf 59*040b3049SEd MasteSRCF+= floatdisf 60*040b3049SEd MasteSRCF+= floatditf 61*040b3049SEd MasteSRCF+= floatdixf 62*040b3049SEd MasteSRCF+= floatsitf 63*040b3049SEd MasteSRCF+= floattidf 64*040b3049SEd MasteSRCF+= floattisf 65*040b3049SEd MasteSRCF+= floattixf 66*040b3049SEd MasteSRCF+= floatundidf 67*040b3049SEd MasteSRCF+= floatundisf 68*040b3049SEd MasteSRCF+= floatunditf 69*040b3049SEd MasteSRCF+= floatundixf 70*040b3049SEd MasteSRCF+= floatunsidf 71*040b3049SEd MasteSRCF+= floatunsisf 72*040b3049SEd MasteSRCF+= floatuntidf 73*040b3049SEd MasteSRCF+= floatuntisf 74*040b3049SEd MasteSRCF+= floatuntixf 75*040b3049SEd MasteSRCF+= gcc_personality_v0 76*040b3049SEd MasteSRCF+= int_util 77*040b3049SEd MasteSRCF+= lshrdi3 78*040b3049SEd MasteSRCF+= lshrti3 79*040b3049SEd MasteSRCF+= moddi3 80*040b3049SEd MasteSRCF+= modti3 81*040b3049SEd MasteSRCF+= muldc3 82*040b3049SEd MasteSRCF+= muldi3 83*040b3049SEd MasteSRCF+= mulodi4 84*040b3049SEd MasteSRCF+= mulosi4 85*040b3049SEd MasteSRCF+= muloti4 86*040b3049SEd MasteSRCF+= mulsc3 87*040b3049SEd MasteSRCF+= multi3 88*040b3049SEd MasteSRCF+= mulvdi3 89*040b3049SEd MasteSRCF+= mulvsi3 90*040b3049SEd MasteSRCF+= mulvti3 91*040b3049SEd MasteSRCF+= multc3 92*040b3049SEd MasteSRCF+= mulxc3 93*040b3049SEd MasteSRCF+= negdf2 94*040b3049SEd MasteSRCF+= negdi2 95*040b3049SEd MasteSRCF+= negsf2 96*040b3049SEd MasteSRCF+= negti2 97*040b3049SEd MasteSRCF+= negvdi2 98*040b3049SEd MasteSRCF+= negvsi2 99*040b3049SEd MasteSRCF+= negvti2 100*040b3049SEd MasteSRCF+= paritydi2 101*040b3049SEd MasteSRCF+= paritysi2 102*040b3049SEd MasteSRCF+= parityti2 103*040b3049SEd MasteSRCF+= popcountdi2 104*040b3049SEd MasteSRCF+= popcountsi2 105*040b3049SEd MasteSRCF+= popcountti2 106*040b3049SEd MasteSRCF+= powidf2 107*040b3049SEd MasteSRCF+= powisf2 108*040b3049SEd MasteSRCF+= powitf2 109*040b3049SEd MasteSRCF+= powixf2 110*040b3049SEd MasteSRCF+= subvdi3 111*040b3049SEd MasteSRCF+= subvsi3 112*040b3049SEd MasteSRCF+= subvti3 113*040b3049SEd MasteSRCF+= trampoline_setup 114*040b3049SEd MasteSRCF+= truncdfhf2 115*040b3049SEd MasteSRCF+= truncsfhf2 116*040b3049SEd MasteSRCF+= ucmpdi2 117*040b3049SEd MasteSRCF+= ucmpti2 118*040b3049SEd MasteSRCF+= udivdi3 119*040b3049SEd MasteSRCF+= udivmoddi4 120*040b3049SEd MasteSRCF+= udivmodsi4 121*040b3049SEd MasteSRCF+= udivmodti4 122*040b3049SEd MasteSRCF+= udivti3 123*040b3049SEd MasteSRCF+= umoddi3 124*040b3049SEd MasteSRCF+= umodti3 125*040b3049SEd Maste 126*040b3049SEd Maste# 128-bit quad precision long double support, only used on arm64 127*040b3049SEd Maste.if ${MACHINE_CPUARCH} == "aarch64" 128*040b3049SEd MasteSRCF+= addtf3 129*040b3049SEd MasteSRCF+= comparetf2 130*040b3049SEd MasteSRCF+= divtf3 131*040b3049SEd MasteSRCF+= extenddftf2 132*040b3049SEd MasteSRCF+= extendsftf2 133*040b3049SEd MasteSRCF+= fixtfdi 134*040b3049SEd MasteSRCF+= fixtfsi 135*040b3049SEd MasteSRCF+= fixtfti 136*040b3049SEd MasteSRCF+= fixunstfdi 137*040b3049SEd MasteSRCF+= fixunstfsi 138*040b3049SEd MasteSRCF+= fixunstfti 139*040b3049SEd MasteSRCF+= floatunsitf 140*040b3049SEd MasteSRCF+= multf3 141*040b3049SEd MasteSRCF+= subtf3 142*040b3049SEd MasteSRCF+= trunctfdf2 143*040b3049SEd MasteSRCF+= trunctfsf2 144*040b3049SEd Maste.endif 145*040b3049SEd Maste 146*040b3049SEd Maste# These are already shipped by libc.a on arm and mips 147*040b3049SEd Maste.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" 148*040b3049SEd MasteSRCF+= adddf3 149*040b3049SEd MasteSRCF+= addsf3 150*040b3049SEd MasteSRCF+= divdf3 151*040b3049SEd MasteSRCF+= divsf3 152*040b3049SEd MasteSRCF+= extendsfdf2 153*040b3049SEd MasteSRCF+= fixdfsi 154*040b3049SEd MasteSRCF+= fixsfsi 155*040b3049SEd MasteSRCF+= floatsidf 156*040b3049SEd MasteSRCF+= floatsisf 157*040b3049SEd MasteSRCF+= muldf3 158*040b3049SEd MasteSRCF+= mulsf3 159*040b3049SEd MasteSRCF+= subdf3 160*040b3049SEd MasteSRCF+= subsf3 161*040b3049SEd MasteSRCF+= truncdfsf2 162*040b3049SEd Maste.endif 163*040b3049SEd Maste 164*040b3049SEd Maste.if ${MACHINE_CPUARCH} != "arm" 165*040b3049SEd MasteSRCF+= comparedf2 166*040b3049SEd MasteSRCF+= comparesf2 167*040b3049SEd Maste.endif 168*040b3049SEd Maste 169*040b3049SEd Maste.if ${MACHINE_CPUARCH} != "mips" 170*040b3049SEd MasteSRCF+= divsi3 171*040b3049SEd MasteSRCF+= modsi3 172*040b3049SEd MasteSRCF+= udivsi3 173*040b3049SEd MasteSRCF+= umodsi3 174*040b3049SEd Maste.endif 175*040b3049SEd Maste 176*040b3049SEd Maste# FreeBSD-specific atomic intrinsics. 177*040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "armv6" 178*040b3049SEd Maste.PATH: ${SRCTOP}/sys/arm/arm 179*040b3049SEd Maste 180*040b3049SEd MasteSRCF+= stdatomic 181*040b3049SEd MasteCFLAGS+= -DEMIT_SYNC_ATOMICS 182*040b3049SEd Maste.elif ${MACHINE_CPUARCH} == "mips" 183*040b3049SEd Maste.PATH: ${SRCTOP}/sys/mips/mips 184*040b3049SEd Maste 185*040b3049SEd MasteSRCF+= stdatomic 186*040b3049SEd Maste.endif 187*040b3049SEd Maste 188*040b3049SEd Maste.for file in ${SRCF} 189*040b3049SEd Maste.if ${MACHINE_ARCH:Marmv6*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \ 190*040b3049SEd Maste && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S) 191*040b3049SEd MasteSRCS+= ${file}vfp.S 192*040b3049SEd Maste. elif exists(${CRTSRC}/${CRTARCH}/${file}.S) 193*040b3049SEd MasteSRCS+= ${file}.S 194*040b3049SEd Maste. else 195*040b3049SEd MasteSRCS+= ${file}.c 196*040b3049SEd Maste. endif 197*040b3049SEd Maste.endfor 198*040b3049SEd Maste 199*040b3049SEd Maste.if ${MACHINE_CPUARCH} == "arm" 200*040b3049SEd MasteSRCS+= aeabi_div0.c 201*040b3049SEd MasteSRCS+= aeabi_idivmod.S 202*040b3049SEd MasteSRCS+= aeabi_ldivmod.S 203*040b3049SEd MasteSRCS+= aeabi_memcmp.S 204*040b3049SEd MasteSRCS+= aeabi_memcpy.S 205*040b3049SEd MasteSRCS+= aeabi_memmove.S 206*040b3049SEd MasteSRCS+= aeabi_memset.S 207*040b3049SEd MasteSRCS+= aeabi_uidivmod.S 208*040b3049SEd MasteSRCS+= aeabi_uldivmod.S 209*040b3049SEd MasteSRCS+= bswapdi2.S 210*040b3049SEd MasteSRCS+= bswapsi2.S 211*040b3049SEd MasteSRCS+= switch16.S 212*040b3049SEd MasteSRCS+= switch32.S 213*040b3049SEd MasteSRCS+= switch8.S 214*040b3049SEd MasteSRCS+= switchu8.S 215*040b3049SEd MasteSRCS+= sync_synchronize.S 216*040b3049SEd Maste.endif 217